Frequently Asked Question

What does the PULS field in the EDMOD registers do?

The ADV202/212 allows the DREQ/ pulse to be configured in two ways:

  1. DREQ/ is asserted until the host processor responds with a DACK/ assert. This requires the DRxPULS bits in the EDMODx register to be set to '0000'.
  2. DREQ/ pulse width is programmable and does not require a DACK/ for DREQ/ de-assertion. The pulse width is set with the DRxPULS bits in the EDMODx registers.

Refer to the datasheet for timing diagrams for both modes.