New High-Speed, Low-Power Data-Acquisition ICs

Applications for high-resolution data converters and op amps operating in the multi-megasample-per-second region are rapidly increasing as cost, size, and power demand decrease. Between the covers of this special "High Speed" issue of Analog Dialogue, you can read about some of the applications they make possible, about test methods for noise and settling time—and (the focus of this article) some things you ought to know about typical leading-edge devices to help you better use them.

The recently introduced AD8011 op amp* and AD876 sampling analog-to-digital (A/D) converter* make available high-speed and accurate data acquisition at reduced power and cost. Together, they can deliver 10-bit, 20-MSPS data conversion using < 165 mW at prices attractive to designers of consumer equipment. This performance is available using a single +5-V supply.

Historical Perspective: Over the last two decades, the design and manufacture of high-speed (>1 MSPS) ADCs and op amps has changed drastically. Figure 1 shows A/D converter cost reductionrepresented by mW/MHzin the past 10 years. Such major reductions are driven by evolving market forces, which have shaped the electronics industry over the past two decades.

In the mid-1980s, the Cold War was the major driver of progress in electronic devices and equipment. Military contractorsthe technically leading customersneeded high performance, plus hermetic packages, stringent shock and vibration specs, thermal cycling, and radiation hardness-and cost seemed no object.

With monolithic ICs not yet available, vendors were driven to either card-mounted kludges or hybrid assembly. But such manufacturing processes were expensive, requiring a high degree of human assembly and extensive testing at each step. Large hermetic packages were expensive; military certification required time, technology, manpower, and extensive record-keeping.

The first monolithic 10-bit-or-better high-speed ADCs appeared by about 1990. The AD9020, culmination of an evolving series of IC pure flash converters, offered a huge reduction of size and power compared to the 5"x7" card-mounted CAV1020 10-bit, 20-MHz ADC. Low power consumption was achieved by an innovative flash architecture, employing half the number of comparators required by conventional flash architectures.1

Power consumption had to be low to keep equipment from getting too hot and to minimize thermal drifts. 2.8 W was considered "low power." The major applicationsradar warning and guidance, digital oscilloscopes, medical imaging, infrared systems, and professional video could be line-powered.

Figure 1
Figure 1. Trends in high speed ADC power consumption (mW/MHz).

But the '90s explosion of battery-operated equipment (camcorders, cellular telephones, portable computers, etc.) has led to a rapidly increasing need for designers to reduce power consumption. To meet these needs, a new ADC architecture emerged. Multi-stage pipeline converters (1990) employed a BiCMOS process, which allowed sample/holds to be incorporated on the monolithic chip. ADC suppliers could increase performance and reduce both power consumption and cost. In 1993 the AD875, the first 1-µm CMOS 15-MSPS ADC, helped reduce camcorder size & power.

Now, two years later, a new generation of small-geometry devices includes the CMOS AD876 A/D converter and the XFCB (extra fast complementary bipolar) AD8011 op amp. Lower junction capacitance reduces power and allows higher speed at lower voltage; and small die size leads to a cost structure well-suited to demanding consumer products. Single-supply avoids cost, size, and weight of additional supplies. This improvement coincides with the shift of application focus from military to commercial and consumer. Examples: in portable video cameras, high performance, low cost and long battery life are vital needs; in communications equipment, such as cable set-top boxes, speed and resolution are vital for decent-quality video from the receiver; but to succeed, the equipment must be offered at low cost.

1 See Analog Dialogue 24-1.

* Analog Dialogue 29-1, page 7 and page 19.


  1. "Drive circuitry is critical to high-speed sampling ADCs," by Walt Kester. Electronic Design, November 7, 1994, p. 43.
  2. Technical data, AD8011 and AD876.
  3. System Applications Guide. Norwood MA: Analog Devices (1993), p. 16-12, "Techniques For Verifying High-Speed ADC Performance."