AN-1495: Converting a Single-Ended Signal with the AD7984 Differential PulSAR ADC
AN-1495: Converting a Single-Ended Signal with the AD7984 Differential PulSAR ADC
Circuit Function and Benefits
There are many applications that require a single-ended analog signal, either bipolar or unipolar, to be converted by a high resolution, differential input analog-to-digital converter (ADC). This dc-coupled circuit converts a single-ended input signal to a differential signal suitable for driving the AD7984, an 18-bit, 1.33 MSPS member of the PulSAR® family of ADCs. This circuit uses the ADA4941-1 single-ended to differential ADC driver and the ADR435 ultralow noise 5.0 V voltage reference. The circuit can accept many types of single-ended input signals, including bipolar or unipolar, ranging from high voltage to low voltage. Direct coupling is maintained throughout. If board space is at a premium, all the ICs shown in Figure 1 come in small packages; either 3 mm × 3 mm lead frame chip scale package (LFCSP) or 3 mm × 5 mm micro small outline package (MSOP).
Circuit Description
The differential input voltage range of the AD7984 is set by the voltage on the REF pin. For VREF = 5 V, the differential input voltage range is ±VREF = ±5 V. The voltage gain (or attenuation) from the single-ended source, VIN, to the OUT+ pin of the ADA4941-1 is set by the ratio of the R2 resistor to the R1 resistor. The ratio of R2 to R1 is equal to the ratio of VREF to the peak-topeak input voltage at VIN. For a peak-to-peak, single-ended input voltage of 10 V and VREF = 5 V, the ratio of R2 to R1 is 0.5. The signal at the OUT+ pin is inverted (gain = −1) by the upper half of the ADA4941-1, which supplies the opposite phase output signal at the OUT− pin. The absolute value of the R1 resistor determines the input impedance of the circuit. The CF feedback capacitor is chosen based on the desired signal bandwidth, which is approximately 1/(2πR2CF). The 20 Ω resistors and the 2.7 nF capacitors act as a 3 MHz, single-pole, low-pass noise filter.
Resistors R3 and R4 set the common-mode voltage on the IN− input of the AD7984. The value of this common-mode voltage is VOFFSET2 × (1 + R2/R1), where VOFFSET2 = VREF × R3/(R3 + R4). Resistors R5 and R6 set the common-mode voltage on the IN+ input of the ADC. This voltage is equal to VOFFSET1 = VREF × R5/ (R5 + R6). The common-mode voltage of the ADC, which is equal to VOFFSET1, is close to VREF/2. This presumption implies that R5 = R6. Table 1 shows some possible standard 1% values for the resistors for popular input voltage ranges.
The ADA4941-1 operates on supply voltages of +7 V and −2 V. Because each output must swing from 0 V to 5 V, the positive supply voltage must be a few hundred millivolts greater than 5 V, and the negative supply must be a few hundred millivolts more negative than 0 V. For this circuit, supply voltages of +7 V and −2 V are chosen.
The 7 V supply also provides sufficient headroom to power the ADR435. Other voltages are possible, provided the absolute maximum total supply voltage on the ADA4941-1 does not exceed 12 V, and the headroom requirement of the ADR435 is observed.
The AD7984 requires a 2.5 V supply for VDD as well as a VIO supply (not shown in Figure 1), which can range between 1.8 V and 5 V, depending on the input/output logic interface levels.
This circuit is not sensitive to power supply sequencing. The AD7984 inputs can withstand up to ±130 mA maximum during momentary overvoltage conditions.
The AD7984 serial peripheral interface (SPI)-compatible serial interface (not shown in Figure 1) has the ability to daisy-chain several ADCs on a single 3-wire bus and provides an optional busy indicator via the SDI input pin. The SPI is compatible with 1.8 V, 2.5 V, 3 V, and 5 V logic, using the separate VIO supply. For full details on the SPI interface, digital modes, and logic power options, see the AD7984 data sheet.
Use proper layout, grounding, and decoupling techniques to achieve the desired performance from the circuits discussed in this application note. As a minimum, use a 4-layer printed circuit board (PCB) with one ground plane layer, one power plane layer, and two signal layers.
All IC power pins must be decoupled to the ground plane with low inductance, multilayer ceramic capacitors (MLCC) of 0.01 µF to 0.1 µF (this is not shown in Figure 1 for simplicity).
Consult the EVAL-AD7984 and EVAL-FDA-1 evaluation board user guides for the recommended layout and critical component placement of each product.
| VIN (V) | VOFFSET1 (V) | VOFFSET2 (V) | OUT+ (V) | OUT− (V) | R1 (kΩ) | R2 (kΩ) | R4 (kΩ) | R3, R5, R6 (kΩ) |
| +20, −20 | 2.5 | 2.203 | −0.01, 4.96 | 5.01, 0.04 | 8.06 | 1.00 | 12.70 | 10.00 |
| +10, −10 | 2.5 | 2.000 | 0.01, 4.99 | 4.99, 0.01 | 4.02 | 1.00 | 15.0 | 10.00 |
| +5, −5 | 2.5 | 1.667 | 0.00, 5.00 | 5.00, 0.00 | 2.00 | 1.00 | 20.0 | 10.00 |
Common Variations
For different reference voltages, the ADR430, ADR431, ADR433, ADR434, and ADR435 family of references has a wide range of values that can interface with the ADC.
References
Kester, Walt. 2005. Chapter 6 and Chapter 7. The Data Conversion Handbook. Analog Devices.
MT-035 Tutorial, Op Amp Inputs, Outputs, Single-Supply, and Rail-to-Rail Issues. Analog Devices.
MT-074 Tutorial, Differential Drivers for Precision ADCs. Analog Devices.