The AD5110 provides a nonvolatile solution for 128-position adjustment applications, offering guaranteed low resistor tolerance errors of ±8% and up to ±6 mA current density in the A, B, and W pins. The low resistor tolerance, low nominal temperature coefficient and high bandwidth simplify open-loop applications, as well as tolerance matching applications.
The new low wiper resistance feature minimizes the wiper resistance in the extremes of the resistor array to only 45 Ω, typical.
The wiper settings are controllable through an I2C-compatible digital interface that is also used to readback the wiper register and EEPROM content. Resistor tolerance is stored within EEPROM, providing an end-to-end tolerance accuracy of 0.1%.
The AD5110 is available in a 2 mm × 2 mm LFCSP package. The parts are guaranteed to operate over the extended industrial temperature range of −40°C to +125°C.
|Title||Content Type||File Type|
|AD5110/AD5112/AD5114: Single-Channel, 128-/64-/32-Position, I2C, ±8% Resistor Tolerance, Nonvolatile Digital Potentiometer Datasheet (Rev B, 11/2012) (pdf, 517 kB)||Data Sheets|
|Choosing the Correct digiPOT for Your Application (pdf, 1701 kB)||Design Handbooks|
Understanding and Applying Digital Potentiometers
In this webcast our experts will explain the differences between Pots and DigiPots and DACs, and present considerations for successful designs for many applications.
|UG-378: Overview of AD5110/AD5112/AD5114 Connections and Functionality (pdf, 149 kB)||User Guides|
|UG-322: Evaluation Board for the AD5110 Digital Potentiometer (pdf, 505 kB)||User Guides|
|New Single-channel Digital Potentiometers from Analog Devices Provide Range of Resolution, Interface and Resistance Options (16 Nov 2011)||Press Releases||HTML|
|Choosing the Correct digiPOT for Your Application (pdf, 1701 kB)||Overview|
|Is there a power up sequence I should follow?||FAQs/RAQs||HTML|
|For dual supply digital potentiometers, if VDD/VSS are +2.5V/-2.5V respectively, can digital inputs be fed from a standard 3.3V CMOS logic component without logic level translation? What are the logic level thresholds when VDD is +2.5V and VSS is -2.5V?||FAQs/RAQs||HTML|
|Is there a dependency between the logic level and power consumption?||FAQs/RAQs||HTML|
|Is digital potentiometer a real replacement for mechanical potentiometer or are there restrictions regarding voltage potentials?||FAQs/RAQs||HTML|
|Are all digital potentiometers limited to |5V|?||FAQs/RAQs||HTML|
|Do digital potentiometers handle bipolar and AC operations?||FAQs/RAQs||HTML|
|Can I achieve a 15V signal swing when using a 5V digital potentiometer?||FAQs/RAQs||HTML|
|For digital potentiometers that do not have nonvolatile memory, what is the state during power up?||FAQs/RAQs||HTML|
|Is there a particularly low-power digital potentiometer?||FAQs/RAQs||HTML|
|Does the memory allow the device to return to the last stored value without an update from a micro?||FAQs/RAQs||HTML|
|Will the data in the EEMEM need to be refreshed after 15 yrs when it is operated at 55°C?||FAQs/RAQs||HTML|
|How many write cycles can the EEMEM go through before it fails?||FAQs/RAQs||HTML|
|After the specified EEMEM data retention timeout period, can the power be turned off and back on so that the part is considered "refreshed"?||FAQs/RAQs||HTML|
|Why are some digital potentiometers' maximum operating temperature only 85°C instead of the standard 125°C?||FAQs/RAQs||HTML|
|How good is the resistance matching between Ch1 and Ch2 in the dual digital potentiometer?||FAQs/RAQs||HTML|
|How is the resistance matching device to device?||FAQs/RAQs||HTML|
|What is the resistance tolerance of the digital potentiometers?||FAQs/RAQs||HTML|
|Can I cascade, serialize, or parallel multiple digital potentiometers to get the resistance or resolution I need? My requirement is for a 250 Ω digital potentiometer with approximately 1 Ω/step. I plan to use four 1 kΩ AD8403 in parallel with each set to nominally the same value.||FAQs/RAQs||HTML|
|I would like to know how the digital potentiometer is built. How ideal are the wiper switches?||FAQs/RAQs||HTML|
|What is the tempco of the digital potentiometer?||FAQs/RAQs||HTML|
|What is the maximum current I can force into the digital potentiometer?||FAQs/RAQs||HTML|
|Can a digitally controlled variable resistor withstand greater than 20mA?||FAQs/RAQs||HTML|
|Can a digipot be used to construct a programmable high current source?||FAQs/RAQs||HTML|
|If I use the digital potentiometer in a "dry" circuit (current through wiper < 1 pA), will it behave as a linear resistor in rheostat mode?||FAQs/RAQs||HTML|
|Are ADI's digital potentiometers suitable for use in photodetector amplifiers and will they suffer from leakage currents which could affect the gain of the circuit?||FAQs/RAQs||HTML|
|Regarding the spec on R-DNL, I am only concerned with relative adjustments. I'm not concerned with the actual value of the resistor in the digipot but need the digipot to be monotonic.||FAQs/RAQs||HTML|
|RAQs index||Rarely Asked Questions||HTML|
|Glossary of EE Terms||Glossary||HTML|
|Title||Content Type||File Type|
|AD5110 IBIS Model (ibs)||IBIS Models||IBS|
|AD5110 - Microcontroller No-OS Driver||Device Drivers||HTML|
|BeMicro FPGA Project for AD5110 with Nios driver||FPGA HDL||HTML|
|AD5110 FMC-SDP Interposer & Evaluation Board / Xilinx KC705 Reference Design||FPGA HDL||HTML|
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