HMC729

RECOMMENDED FOR NEW DESIGNS

26 GHz, T Flip-Flop w/Reset

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Overview

  • Supports Clock Frequencies up to 26 GHz
  • Differential & Singe-Ended Operation
  • Fast Rise and Fall Times: 18/17 ps
  • Low Power Consumption: 270 mW typ.
  • Propagation Delay: 95 ps
  • Single Supply: -3.3V
  • 16 Lead Ceramic 3×3mm SMT Package: 9mm2

The HMC729LC3C is a T Flip-Flop w/Reset designed to support clock frequencies as high as 26 GHz. During normal operation, with the reset pin not asserted, the output toggles from its prior state on the positive edge of the clock. This results in a divide-by-two function of the clock input. Asserting the reset pin forces the Q output low regardless of the clock edge state (asynchronous reset assertion). Reversing the clock inputs allows for negative-edge triggered applications.

All input signals to the HMC729LC3C are terminated with 50 to ground on-chip, and may be either AC or DC coupled. Outputs can be connected directly to a 50 terminated system, while DC blocking capacitors may be used if the terminating system is 50 to a non-ground DC voltage. The HMC729LC3C operates from a single -3.3V DC supply and is available in a ceramic RoHS compliant 3x3 mm SMT package.

APPLICATIONS

  • Serial Data Transmission up to 26 Gbps
  • High Speed Frequency Divider (up to 26 GHz)
  • Broadband Test & Measurement
  • RF ATE Applications

HMC729
26 GHz, T Flip-Flop w/Reset
HMC729 Functional Block Diagram
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Documentation

Data Sheet 1

Data Sheet

This is the most up-to-date revision of the Data Sheet.

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Tools & Simulations


Evaluation Kits

EVAL-HMC729LC3C
HMC729LC3C Evaluation Board

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