AD5383

PRODUCTION

32-Channel 12-Bit 3 V/5 V Single-Supply Voltage-Output DAC

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Overview

  • Guaranteed Monotonic
  • High Accuracy (INL = ±1 LSB)
  • On-chip 1.25 V/2.5 V, 10 ppm/°C reference
  • Temperature range: –40°C to +85°C
  • Rail-to-rail output amplifier
  • Power-down mode
  • Package type: 100-lead LQFP (14 mm × 14 mm)
  • User Interfaces
    - Parallel
    - Serial (SPI®-/QSPI-/MICROWIRE-/DSP-compatible, featuring data readback)
    - I2C-compatible
  • Robust 6.5 kV HBM and 2 kV FICDM ESD rating

The AD5383 is a complete, single-supply, 32-channel, 12-bit denseDAC® available in a 100-lead LQFP package. All 32 channels have an on-chip output amplifier with rail-to-rail operation. The AD5383 includes a programmable internal 1.25 V/2.5 V, 10 ppm/°C reference; an on-chip channel monitor function that multiplexes the analog outputs to a common MON_OUT pin for external monitoring; and an output amplifier boost mode that allows optimization of the amplifier slew rate. The AD5383 features:

  • Double-buffered parallel interface with a 20 ns WR pulse width.
  • SPI-/QSPI-/MICROWIRE-/DSP-compatible serial interface with interface speeds in excess of 30 MHz
  • I2C-compatible interface that supports a 400 kHz data transfer rate.

An input register followed by a DAC register provides double buffering, allowing the DAC outputs to be updated independently or simultaneously using the LDAC input.

Each channel has a programmable gain and offset adjust register that allows the user to fully calibrate any DAC channel. With boost off, power consumption is typically 0.25 mA/channel.

APPLICATIONS

  • Variable optical attenuators (VOA)
  • Level setting (ATE)
  • Optical microelectro-mechanical systems (MEMS)
  • Control systems
  • Instrumentation

AD5383
32-Channel 12-Bit 3 V/5 V Single-Supply Voltage-Output DAC
AD5383 Functional Block Diagram AD5383 Pin Configuration
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Tools & Simulations

Precision DAC Error Budget Tool

The Precision DAC Error Budget Tool is a web application that calculates the DC Accuracy of precision DAC signal chains. It shows how the static errors accumulate throughout your signal chain to quickly evaluate the design tradeoffs. Calculations include the DC errors introduced by Voltage References, Operation Amplifiers and Precision DACs.

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