top Project Status
Project File: top.xise Parser Errors: No Errors
Module Name: top Implementation State: New
Target Device: xc6slx9-2csg324
  • Errors:
 
Product Version:ISE 14.2
  • Warnings:
 
Design Goal: Balanced
  • Routing Results:
 
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
 
Environment: System Settings
  • Final Timing Score:
  
 
XPS Reports [-]
Report NameGenerated ErrorsWarningsInfos
Platgen Log FileTue Aug 27 17:07:56 20130028 Infos (28 new)
Simgen Log File    
BitInit Log FileTue Aug 27 18:06:18 20130011 Infos (11 new)
System Log File    
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis Report     
Translation Report     
Map Report     
Place and Route Report     
Power Report     
Post-PAR Static Timing Report     
Bitgen Report     
 
Secondary Reports [-]
Report NameStatusGenerated
WebTalk ReportCurrentTue Aug 27 18:05:47 2013
WebTalk Log FileCurrentTue Aug 27 18:05:59 2013

Date Generated: 08/27/2013 - 18:06:20