Core Statistics |
Core Type=axi_gpio |
C_ALL_INPUTS=0 |
C_ALL_INPUTS_2=0 |
C_DOUT_DEFAULT=00000000000000000000000000000000 |
C_DOUT_DEFAULT_2=00000000000000000000000000000000 |
C_FAMILY=zynq |
C_GPIO2_WIDTH=32 |
C_GPIO_WIDTH=8 |
C_INSTANCE=axi_gpio_0 |
C_INTERRUPT_PRESENT=0 |
C_IS_DUAL=0 |
C_S_AXI_DATA_WIDTH=32 |
C_TRI_DEFAULT=11111111111111111111111111111111 |
C_TRI_DEFAULT_2=11111111111111111111111111111111 |
Core Type=axi_gpio |
C_ALL_INPUTS=0 |
C_ALL_INPUTS_2=0 |
C_DOUT_DEFAULT=00000000000000000000000000000000 |
C_DOUT_DEFAULT_2=00000000000000000000000000000000 |
C_FAMILY=zynq |
C_GPIO2_WIDTH=32 |
C_GPIO_WIDTH=8 |
C_INSTANCE=axi_gpio_1 |
C_INTERRUPT_PRESENT=0 |
C_IS_DUAL=0 |
C_S_AXI_DATA_WIDTH=32 |
C_TRI_DEFAULT=11111111111111111111111111111111 |
C_TRI_DEFAULT_2=11111111111111111111111111111111 |
Core Type=axi_gpio |
C_ALL_INPUTS=0 |
C_ALL_INPUTS_2=0 |
C_DOUT_DEFAULT=00000000000000000000000000000000 |
C_DOUT_DEFAULT_2=00000000000000000000000000000000 |
C_FAMILY=zynq |
C_GPIO2_WIDTH=32 |
C_GPIO_WIDTH=8 |
C_INSTANCE=axi_gpio_2 |
C_INTERRUPT_PRESENT=0 |
C_IS_DUAL=0 |
C_S_AXI_DATA_WIDTH=32 |
C_TRI_DEFAULT=11111111111111111111111111111111 |
C_TRI_DEFAULT_2=11111111111111111111111111111111 |
Core Type=axi_gpio |
C_ALL_INPUTS=0 |
C_ALL_INPUTS_2=0 |
C_DOUT_DEFAULT=00000000000000000000000000000000 |
C_DOUT_DEFAULT_2=00000000000000000000000000000000 |
C_FAMILY=zynq |
C_GPIO2_WIDTH=32 |
C_GPIO_WIDTH=8 |
C_INSTANCE=axi_gpio_3 |
C_INTERRUPT_PRESENT=0 |
C_IS_DUAL=0 |
C_S_AXI_DATA_WIDTH=32 |
C_TRI_DEFAULT=11111111111111111111111111111111 |
C_TRI_DEFAULT_2=11111111111111111111111111111111 |
Core Type=axi_gpio |
C_ALL_INPUTS=0 |
C_ALL_INPUTS_2=0 |
C_DOUT_DEFAULT=00000000000000000000000000000000 |
C_DOUT_DEFAULT_2=00000000000000000000000000000000 |
C_FAMILY=zynq |
C_GPIO2_WIDTH=32 |
C_GPIO_WIDTH=8 |
C_INSTANCE=axi_gpio_led |
C_INTERRUPT_PRESENT=0 |
C_IS_DUAL=0 |
C_S_AXI_DATA_WIDTH=32 |
C_TRI_DEFAULT=11111111111111111111111111111111 |
C_TRI_DEFAULT_2=11111111111111111111111111111111 |
Core Type=axi_gpio |
C_ALL_INPUTS=0 |
C_ALL_INPUTS_2=0 |
C_DOUT_DEFAULT=00000000000000000000000000000000 |
C_DOUT_DEFAULT_2=00000000000000000000000000000000 |
C_FAMILY=zynq |
C_GPIO2_WIDTH=32 |
C_GPIO_WIDTH=8 |
C_INSTANCE=axi_gpio_oled |
C_INTERRUPT_PRESENT=0 |
C_IS_DUAL=0 |
C_S_AXI_DATA_WIDTH=32 |
C_TRI_DEFAULT=11111111111111111111111111111111 |
C_TRI_DEFAULT_2=11111111111111111111111111111111 |
Core Type=axi_gpio |
C_ALL_INPUTS=0 |
C_ALL_INPUTS_2=0 |
C_DOUT_DEFAULT=00000000000000000000000000000000 |
C_DOUT_DEFAULT_2=00000000000000000000000000000000 |
C_FAMILY=zynq |
C_GPIO2_WIDTH=32 |
C_GPIO_WIDTH=8 |
C_INSTANCE=axi_gpio_pmodPortMux |
C_INTERRUPT_PRESENT=0 |
C_IS_DUAL=0 |
C_S_AXI_DATA_WIDTH=32 |
C_TRI_DEFAULT=11111111111111111111111111111111 |
C_TRI_DEFAULT_2=11111111111111111111111111111111 |
Core Type=axi_iic |
c_family=zynq |
c_gpo_width=1 |
c_iic_freq=100000 |
c_instance=axi_iic_0 |
c_s_axi_aclk_freq_hz=100000000 |
c_scl_inertial_delay=0 |
c_sda_inertial_delay=0 |
c_sda_level=1 |
c_ten_bit_adr=0 |
Core Type=axi_iic |
c_family=zynq |
c_gpo_width=1 |
c_iic_freq=100000 |
c_instance=axi_iic_1 |
c_s_axi_aclk_freq_hz=100000000 |
c_scl_inertial_delay=0 |
c_sda_inertial_delay=0 |
c_sda_level=1 |
c_ten_bit_adr=0 |
Core Type=axi_iic |
c_family=zynq |
c_gpo_width=1 |
c_iic_freq=100000 |
c_instance=axi_iic_2 |
c_s_axi_aclk_freq_hz=100000000 |
c_scl_inertial_delay=0 |
c_sda_inertial_delay=0 |
c_sda_level=1 |
c_ten_bit_adr=0 |
Core Type=axi_iic |
c_family=zynq |
c_gpo_width=1 |
c_iic_freq=100000 |
c_instance=axi_iic_3 |
c_s_axi_aclk_freq_hz=100000000 |
c_scl_inertial_delay=0 |
c_sda_inertial_delay=0 |
c_sda_level=1 |
c_ten_bit_adr=0 |
Core Type=axi_spi |
C_FAMILY=zynq |
C_FIFO_EXIST=1 |
C_INSTANCE=axi_spi_0 |
C_NUM_SS_BITS=2 |
C_NUM_TRANSFER_BITS=8 |
C_SCK_RATIO=32 |
C_S_AXI_ADDR_WIDTH=32 |
C_S_AXI_DATA_WIDTH=32 |
Core Type=axi_spi |
C_FAMILY=zynq |
C_FIFO_EXIST=1 |
C_INSTANCE=axi_spi_1 |
C_NUM_SS_BITS=1 |
C_NUM_TRANSFER_BITS=8 |
C_SCK_RATIO=32 |
C_S_AXI_ADDR_WIDTH=32 |
C_S_AXI_DATA_WIDTH=32 |
Core Type=axi_spi |
C_FAMILY=zynq |
C_FIFO_EXIST=1 |
C_INSTANCE=axi_spi_2 |
C_NUM_SS_BITS=1 |
C_NUM_TRANSFER_BITS=8 |
C_SCK_RATIO=32 |
C_S_AXI_ADDR_WIDTH=32 |
C_S_AXI_DATA_WIDTH=32 |
Core Type=axi_spi |
C_FAMILY=zynq |
C_FIFO_EXIST=1 |
C_INSTANCE=axi_spi_3 |
C_NUM_SS_BITS=1 |
C_NUM_TRANSFER_BITS=8 |
C_SCK_RATIO=32 |
C_S_AXI_ADDR_WIDTH=32 |
C_S_AXI_DATA_WIDTH=32 |
Core Type=axi_uartlite |
c_baudrate=9600 |
c_data_bits=8 |
c_family=zynq |
c_instance=axi_uartlite_0 |
c_odd_parity=0 |
c_s_axi_aclk_freq_hz=100000000 |
c_use_parity=0 |
Core Type=axi_uartlite |
c_baudrate=9600 |
c_data_bits=8 |
c_family=zynq |
c_instance=axi_uartlite_1 |
c_odd_parity=0 |
c_s_axi_aclk_freq_hz=100000000 |
c_use_parity=0 |
Core Type=axi_uartlite |
c_baudrate=9600 |
c_data_bits=8 |
c_family=zynq |
c_instance=axi_uartlite_2 |
c_odd_parity=0 |
c_s_axi_aclk_freq_hz=100000000 |
c_use_parity=0 |
Core Type=axi_uartlite |
c_baudrate=9600 |
c_data_bits=8 |
c_family=zynq |
c_instance=axi_uartlite_3 |
c_odd_parity=0 |
c_s_axi_aclk_freq_hz=100000000 |
c_use_parity=0 |
Core Type=processing_system7 |
C_APU_PERIPHERAL_FREQMHZ=666.666667 |
C_CAN_PERIPHERAL_FREQMHZ=100 |
C_ENET0_PERIPHERAL_ENABLE=0 |
C_ENET0_PERIPHERAL_FREQMHZ=1000 Mbps |
C_FPGA0_PERIPHERAL_FREQMHZ=100.000000 |
C_FPGA1_PERIPHERAL_FREQMHZ=150.000000 |
C_FPGA2_PERIPHERAL_FREQMHZ=50.000000 |
C_GPIO_GPIO_IO=MIO |
C_GPIO_PERIPHERAL_ENABLE=0 |
C_I2C0_PERIPHERAL_ENABLE=0 |
C_PJTAG_PERIPHERAL_ENABLE=0 |
C_PRESET_BANK0_VOLTAGE=LVCMOS 3.3V |
C_PRESET_BANK1_VOLTAGE=LVCMOS 1.8V |
C_PRESET_GLOBAL_CONFIG=Default |
C_PRESET_GLOBAL_DEFAULT=powerup |
C_PSCONFIG_LVL_SHFTR_EN_C_USE_CR_FABRIC=1 |
C_QSPI_PERIPHERAL_ENABLE=0 |
C_QSPI_PERIPHERAL_FREQMHZ=200 |
C_SD0_PERIPHERAL_ENABLE=0 |
C_SDIO_PERIPHERAL_FREQMHZ=125 |
C_TTC0_PERIPHERAL_ENABLE=0 |
C_UART1_GRP_FULL_ENABLE=0 |
C_UART1_PERIPHERAL_ENABLE=1 |
C_UART1_UART1_IO=MIO 48 .. 49 |
C_UART_PERIPHERAL_FREQMHZ=50 |
C_UIPARAM_DDR_BL=8 |
C_UIPARAM_DDR_BOARD_DELAY0=0.41 |
C_UIPARAM_DDR_BOARD_DELAY1=0.411 |
C_UIPARAM_DDR_BOARD_DELAY2=0.341 |
C_UIPARAM_DDR_BOARD_DELAY3=0.358 |
C_UIPARAM_DDR_CL=7 |
C_UIPARAM_DDR_CWL=6 |
C_UIPARAM_DDR_DEVICE_CAPACITY=2048 MBits |
C_UIPARAM_DDR_DQS_TO_CLK_DELAY_0=0.025 |
C_UIPARAM_DDR_DQS_TO_CLK_DELAY_1=0.028 |
C_UIPARAM_DDR_DQS_TO_CLK_DELAY_2=-0.009 |
C_UIPARAM_DDR_DQS_TO_CLK_DELAY_3=-0.061 |
C_UIPARAM_DDR_DRAM_WIDTH=16 Bits |
C_UIPARAM_DDR_FREQ_MHZ=533.333313 |
C_UIPARAM_DDR_MEMORY_TYPE=DDR 3 |
C_UIPARAM_DDR_PARTNO=MT41J128M16 HA-125 |
C_UIPARAM_DDR_ROW_ADDR_COUNT=14 |
C_UIPARAM_DDR_SPEED_BIN=DDR3_1066F |
C_UIPARAM_DDR_TRAIN_DATA_EYE=1 |
C_UIPARAM_DDR_TRAIN_READ_GATE=1 |
C_UIPARAM_DDR_TRAIN_WRITE_LEVEL=1 |
C_UIPARAM_DDR_T_FAW=40.0 |
C_UIPARAM_DDR_T_RAS_MIN=35.0 |
C_UIPARAM_DDR_T_RC=48.75 |
C_UIPARAM_DDR_T_RCD=7 |
C_UIPARAM_DDR_T_RP=7 |
C_UIPARAM_DDR_USE_INTERNAL_VREF=1 |
C_USB0_PERIPHERAL_ENABLE=0 |