Features and Benefits
- 2 × 2 highly integrated transceiver
- Frequency range of 30 MHz to 6000 MHz
- Transmitter and receiver bandwidth from 12 kHz to 40 MHz
- Two fully integrated, fractional-N, RF synthesizers
- LVDS and CMOS synchronous serial data interface options
- Low power monitor and sleep modes
- Multichip synchronization capabilities
- Fast frequency hopping
- Dynamic profile switching for dynamic data rates and sample rates
- Fully integrated DPD for narrow-band and wideband waveforms
- Fully programmable via a 4-wire SPI
- 12 mm × 12 mm, 196-ball CSP_BGA
The ADRV9002 is a highly integrated RF transceiver that has dual-channel transmitters, dual-channel receivers, integrated synthesizers, and digital signal processing functions.
The ADRV9002 is a high performance, highly linear, high dynamic range transceiver designed for performance vs. power consumption system optimization. The device is configurable and ideally suited to demanding, low power, portable and battery powered equipment. The ADRV9002 operates from 30 MHz to 6000 MHz and covers the UHF, VHF, industrial, scientific, and medical (ISM) bands, and cellular frequency bands in narrow-band (kHz) and wideband operation up to 40 MHz. The ADRV9002 is capable of both TDD and FDD operation.
The transceiver consists of direct conversion signal paths with state-of-the-art noise figure and linearity. Each complete receiver and transmitter subsystem includes dc offset correction, quadrature error correction (QEC), and programmable digital filters, which eliminate the need for these functions in the digital baseband. In addition, several auxiliary functions, such as auxiliary analog-to-digital converters (ADCs), auxiliary digital-to-analog converters (DACs), and general-purpose inputs/outputs (GPIOs), are integrated to provide additional monitoring and control capability.
The fully integrated phase-locked loops (PLLs) provide high performance, low power, fractional-N frequency synthesis for the transmitter, receiver, and clock sections. Careful design and layout techniques provide the isolation required in high performance personal radio applications.
All voltage controlled oscillator (VCO) and loop filter components are integrated to minimize the external component count. The local oscillators (LOs) have flexible configuration options and include fast lock modes.
The transceiver includes low power sleep and monitor modes to save power and extend the battery life of portable devices while monitoring communications.
The fully integrated, low power digital predistortion (DPD) is optimized for both narrow-band and wideband signals and enables linearization of high efficiency power amplifiers.
The ADRV9002 core can be powered directly from 1.0 V, 1.3 V, and 1.8 V regulators and is controlled via a standard 4-wire serial port. Other voltage supplies are used to provide proper digital interface levels and to optimize the receiver, transmitter, and auxiliary converter performance.
High data rate and low data rate interfaces are supported using configurable CMOS or low voltage differential signaling (LVDS) serial synchronous interface (SSI) choice.
The ADRV9002 is packaged in a 12 mm × 12 mm, 196-ball chip scale package ball grid array (CSP_BGA).
- Mission critical communications
- Very high frequency (VHF), ultrahigh frequency (UHF), and cellular to 6 GHz
- Time division duplexing (TDD) and frequency division duplexing (FDD) applications
Markets and Technologies
For hardware or software support please visit EngineerZone:
Product Lifecycle Recommended for New Designs
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Evaluation Kits (1)
The ADRV9002NP/W1/PCBZ and ADRV9002NP/W2/PCBZ are radio cards designed to showcase the ADRV9002, dual-channel Narrow/Wide-band RF transceiver. The radio cards provide a 2x2 transceiver platform for device evaluation. All peripherals necessary for the radio card to operate include high efficiency power circuit board, and a high-performance clocking/MCS distribution included on the radio board. Connecting one of the radio cards with the FPGA motherboard through the FMC connector form a complete evaluation platform for ADRV9002.
This hardware together with TES software can be used to emulate ADRV9003 and ADRV9004 transceiver. When ADRV9003 or ADRV9004 transceiver is selected in TES, software can generate required initialization sequence that is tailored to particular transceiver.
Features & Benefits
- 2x2 Narrow/Wide-band RF transceiver platform operating over 30MHz to 6GHz frequency range
- Complete radio cards for evaluation
- ADRV9002NP/W1/PCBZ for frequency band 30MHz to 3GHz
- ADRV9002NP/W2/PCBZ for frequency band 3GHz to 6GHz
- An on-board
- Clock and MCS distribution
- Reference design for high efficiency power supply solution
- Power consumption monitoring solution
- FMC connector to FPGA motherboard (ZC706 and ZCU102)
- Powered from single FMC connector
- Includes schematics, layout, BOM, HDL, drivers and application software
Documentation & Resources
How a High Dynamic Range RF Transceiver Solves the Blocking Challenge for Mission Critical Communications4/25/2022
Transceiver with Scalable Power and Performance: A Solution to Mission Critical Communications3/1/2022 Analog Dialogue
The Complete Guide to Troubleshoot and Fine Tune Digital Predistortion2/18/2022
The Next-Gen, Software-Defined Radio (SDR) Transceiver Delivers Big Advances in Frequency Hopping (FH)10/1/2021 Analog Dialogue
New RF Transceivers from Analog Devices Bring Big Benefits to Military and Defense Applications9/10/2020
ADI: ADRV9002 Reference Design with Intel Cyclon V FPGA Platform9/22/2022
Vanteon vProtean Multi-Chip Sync using ADI's using ADRV90049/12/2022
RF Agile Software Defined Radio (SDR) Transceivers9/8/2022
ADRV9002: Introduction to the Development tools4/12/2022
ADRV9002: RF performance Overview4/12/2022
ADRV9002: Overview of the Transceiver Evaluation System4/12/2022
ADRV9002: Introduction the Industry’s first Narrowband to Wideband software defined radio (SDR)4/11/2022
ADRV9001 TES Connection Issues Debug2/16/2022
RF Integration: Size Weight and Power2/16/2022
ADRV9001 Automated TDD Tutorial2/16/2022
ADRV9002: 0.03-6 GHz Integrated Transceiver2/16/2022
ADRV9001 Quick Start Guide10/8/2021
Software & Systems Requirements
Software and Hardware Selection Guide
Wideband RF Transceiver Evaluation Software
ADRV9001 Prototyping Software Wiki Page
Tools & Simulations
Download the complete design file resource package including RF ports s-parameters, IBIS models, BSDL files, PCB GERBER and CAD file, schematics, and bill of materials.
ADIsimRF is an easy-to-use RF signal chain calculator. Cascaded gain, noise, distortion and power consumption can be calculated, plotted and exported for signal chains with up to 50 stages. ADIsimRF also includes an extensive data base of device models for ADI’s RF and mixed signal components.
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.
Support & Discussions
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Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.