Features and Benefits
- 1.8 V analog supply operation
- 1.8 V to 3.3 V output supply
- Integrated quadrature error correction (QEC)
77.6 dBFS at 9.7 MHz input
71 dBFS at 200 MHz input
93 dBc at 9.7 MHz input
80 dBc at 200 MHz input
- Low power
44 mW per channel at 20 MSPS
100 mW per channel at 80 MSPS
- Differential input with 700 MHz bandwidth
- On-chip voltage reference and sample-and-hold circuit
- 2V p-p differential analog input
- DNL = −0.5/+1.1 LSB
- Serial port control options
- Offset binary, gray code, or twos complement data format
- Optional clock duty cycle stabilizer (DCS)
- See data sheet for additional features
The AD9269 is a monolithic, dual-channel, 1.8 V supply, 16-bit, 20/40/65/80 MSPS analog-to-digital converter (ADC). It features a high performance sample-and-hold circuit and on-chip voltage reference.
The product uses multistage differential pipeline architecture with output error correction logic to provide 16-bit accuracy at 80 MSPS data rates and to guarantee no missing codes over the full operating temperature range.
The AD9269 incorporates an optional integrated dc correction and quadrature error correction block (QEC) that corrects for dc offset, gain, and phase mismatch between the two channels. This functional block can be very beneficial to complex signal processing applications such as direct conversion receivers.
The ADC also contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).
A differential clock input controls all internal conversion cycles. An optional duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance.
The digital output data is presented in offset binary, gray code, or twos complement format. A data output clock (DCO) is pro-vided for each ADC channel to ensure proper latch timing with receiving logic. Both 1.8 V and 3.3 V CMOS levels are supported, and output data can be multiplexed onto a single output bus.
The AD9269 is available in a 64-lead RoHS-compliant LFCSP and is specified over the industrial temperature range (−40°C to +85°C).
- Diversity radio systems
- Multimode digital receivers
GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA
- I/Q demodulation systems
- Smart antenna systems
- Battery-powered instruments
- Hand held scope meters
- Portable medical imaging
Product Lifecycle Recommended for New Designs
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Evaluation Kits (2)
This page contains evaluation board documentation and ordering information for evaluating the AD9269.
The AD9269-80EBZ is an evaluation board for the AD9269, dual 16-bit ADC. This reference design provides all of the support circuitry to operate devices in their various modes and configurations. It is designed to interface directly with the HSC-ADC-EVALCZ data capture card, allowing users to download captured data for analysis. The Visual Analog software package, which is used to interface with the device's hardware, allows users to download captured data for analysis with a user-friendly graphical interface. The SPI controller software package is also compatible with this hardware and allows the user to access the SPI programmable features of the AD9269.
The AD9269 data sheet provides additional information related to device configuration and performance and should be consulted when using these tools. All documents and Visual Analog and SPI Controller are available at the High Speed ADC Evaluation Boards page. For additional information or questions, please email email@example.com.
The HSC-ADC-EVALCZ high speed converter evaluation platform uses an FPGA based buffer memory board to capture blocks of digital data from the Analog Devices high speed analog-to-digital converter (ADC) evaluation boards. The board is connected to the PC through a USB port and is used with VisualAnalog® to quickly evaluate the performance of high speed ADCs. The evaluation kit is easy to set up. Additional equipment needed includes an Analog Devices high speed ADC evaluation board, a signal source, and a clock source. Once the kit is connected and powered, the evaluation is enabled instantly on the PC.
Features & Benefits
- 64kB FIFO Depth
- Works with single and multi-channel ADCs
- Use with VisualAnalog® software
- Based on Virtex-4 FPGA
- May require adaptor to interface with some ADC eval boards
- Allows programming of SPI control Up to 644 MSPS SDR / 800MSPS DDR Encode Rates on each channel
- DDR Encode Rates on each channel
Documentation & Resources
AN-878: High Speed ADC SPI Control Software (Rev. A)3/20/2018
AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs (Rev. 0)2/14/2015
AN-935: Designing an ADC Transformer-Coupled Front End (Rev. 0)2/14/2015
AN-742: Frequency Domain Response of Switched-Capacitor ADCs (Rev. C)2/14/2015
AN-586: LVDS Outputs for High Speed A/D Converters (Rev. 0)2/14/2015
AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0)2/2/2012
AN-807: Multicarrier WCDMA Feasibility (Rev. 0)11/9/2007
AN-808: Multicarrier CDMA2000 Feasibility (Rev. 0)11/9/2007
AN-812: MicroController-Based Serial Port Interface (SPI) Boot Circuit (Rev. 0)9/20/2006
Tools & Simulations
Virtual Eval - BETA
Virtual Eval is a web application to assist designers in product evaluation of ADCs, DACs, and other ADI products. Using detailed models on Analog’s servers, Virtual Eval simulates crucial part performance characteristics within seconds. Configure operating conditions such as input tones and external jitter, as well as device features like gain or digital down-conversion. Performance characteristics include noise, distortion, and resolution, FFTs, timing diagrams, response plots, and more.
AD9269 IBIS Model
For designers who are selecting or evaluating high speed ADCs, VisualAnalog™ is a software package that combines a powerful set of simulation and data analysis tools with a user-friendly graphical interface.
ADIsimRF is an easy-to-use RF signal chain calculator. Cascaded gain, noise, distortion and power consumption can be calculated, plotted and exported for signal chains with up to 50 stages. ADIsimRF also includes an extensive data base of device models for ADI’s RF and mixed signal components.
AD9269 Companion Parts
Recommended Clock Drivers
Recommended Driver Amplifiers
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.
Sample & Buy
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Buy Now Pricing
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Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.