Features and Benefits
- Logarithmic amplifier performance
-75 dBm to +5 dBm dynamic range
<1.5 nV/√Hz input noise
Usable to >50 MHz
37.5 mV/dB voltage output
On-chip low-pass output filter
- Limiter performance
±1 dB output flatness over 80 dB range
±3° phase stability at 10.7 MHz over
80 dB range
Adjustable output amplitude
- Low power
+5 V single supply operation
65 mW typical power consumption
CMOS-compatible power-down to
325 µW typ
<5 µs enable/disable time
The AD606 is a complete, monolithic logarithmic amplifier using a 9-stage "successive-detection" technique. It provides both logarithmic and limited outputs. The logarithmic output is from a three-pole post-demodulation low-pass filter and provides a loadable output voltage of +0.1 V dc to +4 V dc. The logarithmic scaling is such that the output is +0.5 V for a sinusoidal input of -75 dBm and +3.5 V at an input of +5 dBm; over this range the logarithmic linearity is typically within ±0.4 dB. All scaling parameters are proportional to the supply voltage.
The AD606 can operate above and below these limits, with reduced linearity, to provide as much as 90 dB of conversion range. A second low-pass filter automatically nulls the input offset of the first stage down to the submicrovolt level. Adding external capacitors to both filters allows operation at input frequencies as low as a few hertz.
The AD606's limiter output provides a hard-limited signal output as a differential current of ±1.2 mA from open-collector outputs. In a typical application, both of these outputs are loaded by 200 Ω resistors to provide a voltage gain of more than 90 dB from the input. Transition times are 1.5 ns, and the phase is stable to within ±3° at 10.7 MHz for signals from -75 dBm to +5 dBm.
The logarithmic amplifier operates from a single +5 V supply and typically consumes 65 mW. It is enabled by a CMOS logic level voltage input, with a response time of <5 µs. When disabled, the standby power is reduced to <1 mW within 5 µs.
The AD606J is specified for the commercial temperature range of 0°C to +70°C and is available in 16-pin plastic DIPs or SOICs. Consult the factory for other packages and temperature ranges.
An evaluation board is available for this product and may be ordered using the following product number: AD606-EB.
- Ultrasound and Sonar Processing
- Phase-Stable Limiting Amplifier to 100 MHz
- Received Signal Strength Indicator (RSSI)
- Wide Range Signal and Power Measurement
Product Lifecycle Production
At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.
Documentation & Resources
Measuring the RF Power in CDMA2000 and W-CDMA High Power Amplifiers (HPAs)11/1/2005
Detecting Fast RF Bursts using Log Amps12/1/2002
Make Precise Base-Station Power Measurements11/2/2002
Measurement and Control of RF Power (Part II)12/1/2000
Ask The Applications Engineer—28: Logarithmic Amplifiers Explained3/1/1999 Analog Dialogue
Choosing High-Speed Signal Processing Components for Ultrasound Systems4/1/1995 Analog Dialogue
How Big Is It?12/1/2008
Tools & Simulations
ADIsimRF is an easy-to-use RF signal chain calculator. Cascaded gain, noise, distortion and power consumption can be calculated, plotted and exported for signal chains with up to 50 stages. ADIsimRF also includes an extensive data base of device models for ADI’s RF and mixed signal components.
ADIsimPLL enables the rapid and reliable evaluation of new high performance PLL products from ADI. It is the most comprehensive PLL Synthesizer design and simulation tool available today. Simulations performed include all key non-linear effects that are significant in affecting PLL performance. ADIsimPLL removes at least one iteration from the design process, thereby speeding the design- to-market.