A One-Half Square Inch UMTS Base Station Receiver Module

How much integration is possible while still meeting macrocell base station performance requirements? Process technology still dictates that certain key functions are made in specific processes: GaAs and SiGe are best for the RF realm, fine-line CMOS for high-speed ADCs, and high-Q filters cannot be implemented well in semiconductor materials. Yet the market demands more density.

With that in mind we elected to use system-in-package (SiP) technology to build a receiver occupying about one-half square inch (just over 3 cm2). The boundaries of the receiver are the 50-ohm RF input, the 50-ohm LO input, the ADC clock input and the digital ADC output. This leaves the LNA and RF filtering to be added for the input, LO and clock generation, and digital processing of the digital output. Within the 15 × 22 mm package is a signal chain utilizing SiGe high frequency components, discrete passive filtering and fine-line CMOS ADCs.

The following article presents a design analysis for two µModule® products: the LTM9004 implementing a direct conversion receiver, and the LTM9005 implementing an IF-sampling receiver.

Design Targets

The design target is a UMTS uplink FDD system, specifically the Medium Area Base station in Operating Band I as detailed in the 3GPP TS25.104 V7.4.0 specification. Sensitivity is a primary consideration for the receiver; the requirement is ≤ −111 dBm, for an input SNR of −19.8 dB/5 MHz. That means the effective noise floor at the receiver input must be ≤ −158.2 dBm/Hz.

Design Analysis—Zero-IF or Direct Conversion Receiver

The LTM9004 is a direct conversion receiver utilizing an I/Q demodulator, baseband amplifiers and a dual 14-bit, 125 Msps ADC as shown in Figure 1. The LTM9004-AC lowpass filter has a 0.2 dB corner at 9.42 MHz, allowing four WCDMA carriers. The LTM9004 can be used with an RF front end to build a complete UMTS band uplink receiver. An RF front end typically consists of a diplexer, along with one or more low noise amplifiers (LNAs) and ceramic bandpass filters. To minimize gain and phase imbalance, the baseband chain implements a fixed gain topology; therefore, an RF VGA is required preceding the LTM9004. Following is an example of typical performance for such a front end:

  • Rx frequency range: 1920 to 1980 MHz
  • RF gain: 15 dB maximum
  • AGC range: 20 dB
  • Noise figure: 1.6 dB
  • IIP2: +50 dBm
  • IIP3: 0 dBm
  • P1dB: −9.5 dBm
  • Rejection at 20 MHz: 2 dB
  • Rejection at Tx band: 96 dB

Figure 1. Direct conversion architecture is implemented in the LTM9004 µModule receiver.

Given the effective noise contribution of this RF front end, the maximum allowable noise due to the LTM9004 is −142.2 dBm/Hz. Typical input noise for the LTM9004 is −148.3 dBm/Hz, which translates to a calculated system sensitivity of −116.7 dBm.

Typically such a receiver enjoys the benefits of some DSP filtering of the digitized signal after the ADC. In this case assume the DSP filter is a 64 tap RRC lowpass with alpha equal to 0.22. To operate in the presence of co-channel interfering signals, the receiver must have sufficient dynamic range at maximum sensitivity. The UMTS specification calls for a maximum co-channel interferer level of −73 dBm. Note the input level for −1 dBFS within the IF passband of the LTM9004 is −15.1 dBm for a modulated signal with a 10 dB crest factor. At the LTM9004 input this amounts to −53 dBm, or a digitized signal level of −42.6 dBFS.

With the RF automatic gain control (AGC) set for minimum gain, the receiver must be able to demodulate the largest anticipated desired signal from the handset. This requirement ultimately sets the maximum signal the LTM9004 must accommodate at or below −1 dBFS. The minimum path loss called out in the specification is 53 dB, and assumes a handset average power of +28 dBm. The maximum signal level is then −25 dBm at the receiver input. This is equivalent to −14.6 dBFS peak.

There are several blocker signals detailed in the UMTS system specification. Only a specified amount of desensitization is allowed in the presence of these signals; the sensitivity specification is −115 dBm. The first of the specified blockers is an adjacent channel 5 MHz away, at a level of −42 dBm. The level of the digitized signal is −11.6 dBFS peak. The DSP post-processing adds 51 dB rejection, so this signal is equivalent to a −93 dBm interferer at at the input of the receiver. The resulting sensitivity is −112.8 dBm.

The receiver must also contend with a −35 dBm interfering channel ≥ 10 MHz away. The IF rejection of the µModule receiver will attenuate it to an equivalent digitized signal level of −6.6 dBFS peak. With the DSP post-processing it amounts to −89.5 dBm at the receiver input. The resulting sensitivity is −109.2 dBm.

Out-of-band blockers must also be accommodated, but these are at the same level as the in-band blockers which have already been addressed.

In all of these cases, the typical input level for −1 dBFS of the LTM9004 is well above the maximum anticipated signal levels. Note that the crest factor for the modulated channels will be on the order of 10-12 dB, so the largest of these will reach a peak power of approximately −6.5 dBFS at the LTM9004 output.

The largest blocking signal is the −15 dBm CW tone ≥ 20 MHz beyond the receive band edges. The RF front end will offer 37 dB rejection of this tone, so it will appear at the input of the LTM9004 at −32 dBm. Here again, a signal at this level must not desensitize the baseband µModule receiver. The equivalent digitized level is only −41.6 dBFS peak, so there is no effect on sensitivity.

Another source of undesired signal power is leakage from the transmitter. Since this is an FDD application, the receiver described here will be coupled with a transmitter operating simultaneously. The transmitter output level is assumed to be ≤ +38 dBm, with a transmit-to-receive isolation of 95 dB. Leakage appearing at the LTM9004 input is then −31.5 dBm, offset from the receive signal by at least 130 MHz. The equivalent digitized level is only −76.6 dBFS peak, so there is no desensitization.

One challenge of direct conversion architectures is 2nd order linearity. Insufficient 2nd order linearity will allow any signal, wanted or unwanted, to create DC offset or pseudo-random noise at baseband. The blocking signals detailed above will then degrade sensitivity if this pseudo-random noise approaches the noise level of the receiver. The system specification allows for sensitivity degradation in the presence of these blockers in each case. Per the system specification, the −35 dBm blocking channel may degrade sensitivity to −105 dBm. As we have seen above, this blocker constitutes an interferer level of −15 dBm at the receiver input. The 2nd order distortion produced by the LTM9004 input is about 16 dB below the thermal noise, and the resulting predicted sensitivity is −116.6 dBm.

The −15 dBm CW blocker will also give rise to a 2nd order product; in this case the product is a DC offset. DC offset is undesirable, as it reduces the maximum signal the A/D converter can process. The one sure way to alleviate the effects of DC offset is to ensure that the 2nd order linearity of the baseband µModule receiver is high enough. The predicted DC offset due to this signal is < 1 mV at the input of the ADC.

Note that the transmitter leakage is not included in the system specification, so the sensitivity degradation due to this signal must be held to a minimum. The transmitter output level is assumed to be ≤ +38 dBm, with a transmit-to-receive isolation of 95 dB. The 2nd order distortion generated in the LTM9004 is such that the loss of sensitivity will be < 0.1 dB.

There is only one requirement for 3rd order linearity in the specification. In the presence of two interferers, the sensitivity must not degrade below −115 dBm. The interferers in the specification are a CW tone and a WCDMA channel at −48 dBm each. These will appear at the LTM9004 input at −28 dBm each. Their frequencies are such that they are 10 MHz and 20 MHz away from the desired channel, so the 3rd order intermodulation product falls at baseband. Here again, this product appears as pseudo-random noise and thus will reduce the signal to noise ratio. The 3rd order distortion produced in the LTM9004 is about 20 dB below the thermal noise floor, and the predicted sensitivity degradation is < 0.1 dB.

Design Analysis—140 MHz IF-Sampling Receiver

The LTM9005 is an IF-sampling receiver utilizing a downconverting mixer, IF amplifiers with a variable attenuator, a surface acoustic wave (SAW) filter and a 14-bit, 125 Msps ADC, as shown in Figure 2. The LTM9005-AB SAW filter has a center frequency at 140 MHz and a bandwidth of 20 MHz, allowing four WCDMA carriers. The LTM9005-AB can be used with a similar RF front end, as described above, to build a complete UMTS band uplink receiver. In this case, an appropriate front end should have a maximum RF gain of 14.5 dB.

Figure 2. The IF-sampling architecture implemented in the LTM9005 µModule receiver.

Here are the typical key specifications for the LTM9005-AB:

  • Signal input for −1 dBFS: −17.8 dBm
  • Input noise level: −158 dBm/Hz
  • IIP3:
    • 2 tones inside IF: +17.7 dBm
    • 2 tones outside IF: +19 dBm
  • P1dB, outside IF passband: +8.8 dBm
  • Rej. outside IF passband: 40 dB

Typical input noise for the LTM9005-AB is −158 dBm/Hz. Given the noise of the RF front end, the predicted system sensitivity at maximum RF gain is −122.2 dBm.

The UMTS specification calls for a maximum co-channel interferer of −73 dBm. With the receiver set for maximum gain, the level reaching the µModule receiver input is then −58.5 dBm. Note that the crest factor for a modulated channel will be on the order of 10-12 dB, so this signal will reach a peak power of approximately −48.5 dBm at the µModule receiver input. This amounts to −31.7 dBFS at the ADC input.

With the RF AGC set for minimum gain and a handset average power of +28 dBm, the minimum path loss called out in the specification is 53 dB. The maximum signal level is then −25 dBm at the receiver input. This condition sets the maximum RF gain that can be placed before the µModule receiver. Assuming an RF AGC range of 20 dB, the signal level at the LTM9005-AB input is −30.5 dBm. Accounting for crest factor, this signal will reach a peak power of approximately −20.5 dBm at the µModule receiver input. This amounts to −3.7 dBFS at the ADC.

Consider the receiver set for maximum RF gain in the presence of blocker signals. Again, the sensitivity specification is −115 dBm. Note that once the received signal is digitized, additional bandpass filtering will be done using DSP. Assume a rejection factor of 20 dB for this operation.

The first of these blockers is an adjacent channel at a level of −52 dBm. The IF rejection of the µModule receiver is 40 dB, and the DSP post-processing adds another 20 dB. This signal is thus equivalent to an interferer at −114.5 dBm at the input of the receiver; the level of the digitized signal is −50.7 dBFS. The resulting sensitivity is −122.2 dBm.

The receiver must also contend with a −40 dBm interfering channel ≥ 10 MHz away. Here again, the RF front end will offer no rejection of this channel, but the IF and DSP rejection of the µModule receiver will attenuate it to an equivalent level of −102.5 dBm at the receiver input. This amounts to a digitized signal level of −38.7 dBFS, and the resulting sensitivity is −119.8 dBm.

In all of these cases, the typical input level for −1 dBFS of the LTM9005-AB is well above the maximum anticipated blocker levels. Note that the resulting sensitivities are all within the −115 dBm specification.

Out-of-band blockers must also be accommodated, the largest of which is the −15 dBm CW tone ≥ 20 MHz beyond the receive band edges. The RF front end will offer about 37 dB rejection of this tone, and the IF filter will afford another 40 dB of attenuation. Accounting for the DSP rejection, this tone is then equivalent to −114.5 dBm. The resulting sensitivity is then −122.2 dBm, and the digitized signal level is −60.7 dBFS.

The transmitter output level is assumed to be ≤ +38 dBm, with a transmit to receive isolation of 95 dB. The equivalent level at the receiver input, accounting for IF and DSP rejection, is then −119.5 dBm, or −55.7 dBFS. The resulting sensitivity is −122.2 dBm, which is also within the −115 dBm specification.

For 3rd order linearity, in the presence of two interferers, the sensitivity must not degrade below −115 dBm. The interferers are a CW tone and a WCDMA channel at −48 dBm each, which will appear at the LTM9005-AB input at −33.5 dBm each. Their frequencies are such that they are 10 MHz and 20 MHz away from the desired channel, so the 3rd order intermodulation product falls within the IF passband. Here again, this product appears as pseudo-random noise. Using the IIP3 appropriate for tones outside the passband, the predicted 3rd order product appears at −131.1 dBm. This is about 30 dB below the noise level and has no effect on sensitivity.

Conclusion

The LTM9004 and LTM9005 exhibit the high performance necessary for UMTS base station applications, yet offer the small size and high integration necessary for very compact designs (see Figure 3). By utilizing SiP technology, the µModule receivers can combine components made on optimum semiconductor processes (SiGe, CMOS), along with passive filter elements.

Figure 3. Actual demo board photo showing that minimal external circuitry is required.

Об авторах

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Doug Stuetzle

Doug Stuetzle is a Senior Analog Applications Engineer at Linear Technology. He joined the company in 2003, providing applications support for active mixers, demodulators, and detectors in the RF product line. He also designed and supported the LTM9003, LTM9004, LTM9005, and LTM9013 RF – to – digital receiver modules. These modules were designed to meet the complex requirements of various digital communications standards, and encompass aspects of circuit design from GHz range RF through IF frequencies, down to a digitized output bit stream.

He is presently providing applications support for a variety of SAR and Delta Sigma A/D converters. His responsibilities include customer support, circuit design, PCB layout, and Verilog code generation for FPGA’s. He continues to expand his expertise in the areas of A/D converter drive circuits to maximize noise and linearity performance.

Prior to joining Linear Technology he spent 21 years designing RF, microwave, and optoelectronic circuits, modules, and systems for military and commercial customers. He holds an MSEE degree from Santa Clara University and a BSEE from San Jose State University.

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Todd Nelson