Silent Switcher µModule Regulators Quietly Power GSPS Sampling ADCs in Half the Space

High speed analog-to-digital converters (ADCs) have evolved into the gigasamples per second (GSPS) realm, with a corresponding increase in serviceable bandwidth. These performance improvements come with a number of challenges, one of which is more complex power supply requirements. For example, the AD9625, a 2.6 GSPS ADC, requires seven independent power rails, divided into three voltage levels: 1.3 V, 2.5 V, and 3.3 V.

The complete ADC power system must be efficient, fit on an already crowded PCB, and produce output noise that matches the sensitivity of the load. Balancing these requirements, often at odds with each other, is an overriding parametric optimization problem for the system designer. Conventionally, the problem is solved by combining switching regulators—noisy, but efficient—with low dropout (LDO) postregulators, which can be relatively inefficient, but they reduce power supply noise. Figure 1 shows the block diagram for a typical system.

Unfortunately, efficiency and noise-performance optimization usually come at the expense of system complexity. Figure 2 shows an alternative power system using µModule® Silent Switcher® regulators. This solution provides quiet power to the ADC in less space and is more efficient than the conventional solution.

Consider Noise

A system designer must consider quantifying the sensitivity of the load and be able to match it to the power supply noise. Power supply noise can be minimized by using a LDO regulator in the power supply path, either as a standalone regulator (Figure 2), or as a postregulator following a switching regulator as shown in Figure 1. An LDO regulator has the ability to reject input supply noise—measured as its power supply rejection ratio (PSRR).

The trade-off to improved noise performance with LDO regulators is lower efficiency. LDO regulators are inefficient at high step-down ratios, as they must dissipate excess power across a pass element, so the goal when using LDO regulators is to minimize the step-down ratio to maximize efficiency. This is why they are often used as post-regulators following inherently noisy, but efficient, switching regulators, which initially step-down a main rail before LDO regulator inputs. Nevertheless, when used as a postregulator, maximizing the PSRR performance of the LDO regulator requires extra headroom, further degrading overall power supply efficiency, especially at higher loads.

Figure 1. Baseline GSPS ADC power supply design using switching regulators and LDO regulators (conventional design).
Figure 2. An alternative to the conventional switchers and LDOs power system shown in Figure 1. This design features two LTM8065 µModule Silent Switcher regulators directly powering an AD9625. This design is quiet, more compact, and more efficient (LTM8065 unfiltered design).

Consider Simplicity and Footprint

Conventional switching-regulator-plus-LDO systems are often implemented using discrete components, resulting in a large and complex PCB footprint, which defeats the goal of economy in size and simplicity of design. In contrast, these goals can be achieved using µModule regulators, which enable a compact PCB solution because key regulator components are integrated in the package, especially the relatively large inductor.

Additionally, µModule regulators can typically handle enough load to allow designers to combine equivalent-voltage power rails on a single µModule output. High current capability also makes it possible to add rails to an existing µModule regulator-based design, simplifying design modifications, and thus improving time to market.

The µModule regulator-based solution shown here is highly efficient and compact, and well suited to the high performance AD9625 12-bit 2.6 GSPS ADC. Power is provided by the LTM8065, a Power by Linear Silent Switcher µModule regulator. Silent Switcher technology virtually eliminates unpredictable and difficult-to-filter high frequency noise, translating to a power source that is well matched to the sensitivity of the ADC.

To test a µModule regulator solution against a traditional power supply setup, the 1.3 V and 2.5 V rails of the AD9625 are powered by an LTM8065 2.5 A step-down µModule regulator. The ADC power supply noise sensitivity on both rails and output spectrum of LTC power modules were inspected.

Traditional, Baseline Power Supply System Design for the AD9625 ADC

Figure 3 shows a partial schematic for the traditionally recommended power supply setup for an AD9625 2.6 GSPS ADC. Only the 2.5 V rails are shown in Figure 3, which also shows the typical current requirements for each rail. In a complete power supply, seven different power domains are divided into three voltage levels: 1.3 V, 2.5 V, and 3.3 V. The block diagram in Figure 1 outlines the complete supply.

In this system, the switching regulators—two ADP2386, 20 V/6 A step-down converters with LC filters—act as a preregulator to 3.6 V and 2.1 V intermediate voltages. The 3.6 V output regulator is shown in Figure 3. These intermediate voltages are further stepped down by LDO regulators on each regulated ADC input rail. The LDO regulators provide the regulated voltages to the ADC and are effective in diminishing the output ripple from the switching regulators.

Figure 3. Schematic showing the three 2.5 V rails of a traditional switcher and LDO system for powering an AD9625. The other four rails not shown here, but represented in the block diagram of Figure 1.

The traditional, baseline system successfully produces well-regulated, low noise outputs, but at the cost of complexity. It can be difficult to fit the numerous components on the board, and LDO efficiency can suffer at top loads, possibly creating thermal issues. Is there a better way? There is.

LTM8065 µModule Regulator Directly Powering the AD9625 ADC’s 1.3 V and 2.5 V Rails

Figure 4 shows the complete schematic for an alternative power solution outlined in the block diagram of Figure 2. This system consists of two LTM8065 µModule regulators and a single ADP7118 LDO regulator. The LTM8065 is a 40 V input, 2.5 A Silent Switcher µModule regulator packaged in a thermally enhanced, compact, overmolded ball grid array (BGA). Included in this module are a switching controller, an inductor, and other support components. The LTM8065 supports an output voltage range of 0.97 V to 18 V and a switching frequency range of 200 kHz to 3 MHz, with output voltage set by a single external resistor. The only other components required for a complete regulator are the input and output capacitors.

Figure 4. An alternative to the traditional ADC power system. This complete seven rail solution powers an AD9625 2.6 GSPS ADC. Note that the complete schematic is not much different than the block diagram in Figure 2.

In this solution, the LTM8065s directly power the 1.3 V rails and 2.5 V rails. The 3.3 V rail is powered directly by an ADP7118 low noise LDO coming from a 12 V supply. The 3.3 V rail current is less than 1 mA, so power dissipation across the LDO regulator is negligible.

About Load Sensitivity to Power Supply Noise

Power supply sensitivity of the ADC is a top consideration when designing the power supply system. Sensitivity to power supply noise can be determined by measuring the PSRR of the ADC itself or by retrieving the PSRR from the data sheet. There are two types of PSRR: static PSRR and dynamic (ac) PSRR. Static PSRR is the ratio of the change in power supply voltage to the resulting change in the ADC offset error. This is not a major concern, as a dc-to-dc converter should provide a well-regulated voltage to the load. On the other hand, the dynamic (ac) PSRR is the measurement that concerns the power supply designer, as it represents the ability of the ADC to attenuate the noise on the power supply pin over a range of frequencies.

The ADC ac PSRR is acquired by injecting a sine wave signal on the power supply pin while measuring the injected sine wave signal amplitude directly at the power supply pin under test (probed at the decoupling cap close to the supply pin). A digitized spur appears on the noise floor of the ADC FFT at the corresponding frequency. The ratio of the measured amplitude of the injected signal and the corresponding amplitude of the digitized spur on the ADC FFT spectrum is the power supply rejection ratio. Figure 5 shows a block diagram of a typical ac PSRR measurement setup.

Figure 5. ADC PSRR test setup.

Using an AD9625 2.6 GSPS ADC, a 1 MHz, 100 mV peak-to-peak sine wave is actively coupled at the 1.3 V analog supply rail. A corresponding 1 MHz digitized spur appears above the FFT noise floor of the ADC, where its amplitude depends on the PSRR at 1 MHz. In this case, in the FFT, a 1 MHz digitized spur appears above the converter noise floor at −61.8 dBFS, corresponding to a peak-to-peak voltage of 892 µV p-p in reference with the analog input full-scale range of 1.1 V.

Calculating the ac PSRR at 1 MHz using equation 1 yields an ac PSRR of 41 dB.

Equation 1

Digitized spur is the spur observed in the ADC FFT that corresponds to the injected ripple at the power supply pin. In this case, the spur is 892 µV p–p.

Injected ripple is the sinewave coupled and measured at the input supply pin. The ripple here has an amplitude of 100 mV p–p.

LTM8065 µModule Regulator Powering AD9625 ADC with Additional LC Filter on the 1.3 V Rail

Figure 6 shows that the 1.3 V AVDD rail is more susceptible to power supply noise compared to the 2.5 V AVDD rail—specifically over the switching frequency range of LTM8065 (200 kHz to 3 MHz). Figure 7 shows another LTM8065 solution, but with the addition of a low pass LC (inductor-capacitor) filter for the combined 1.3 V rail.

Figure 6. Power supply rejection ratio of the AD9625 analog power supply inputs.
Figure 7. Adding an LC filter to the 1.3 V rail to further reduce noise.

The component recommendation for the low pass LC filter depends on how much filtering is required. For the 1.3 V rail, a minimum of 20 dB filtering is necessary to reduce the switching spur down to the noise floor of the data converter. A combination of 1.2 µH and 4.7 µF is used with the cut-off frequency of about 67 kHz (~1 decade below the switching frequency of the LTM8065 1.3 V rail). An inductor with small dc resistance (DCR) is recommended to prevent excessive voltage drop and power dissipation across the inductor.

As for the capacitor, a multilayer ceramic capacitor (MLCC) can be used. MLCCs have a low effective series resistance (ESR), which provides good attenuation at the capacitor’s self-resonance. The capacitor’s minimum impedance is determined by its ESR. MLCCs also have a low effective series inductance (ESL), which offers excellent decoupling at high frequencies.

Ferrite beads are used to filter high frequency noise produced by the switching regulator at the ADC supply rail. These also provide high frequency noise isolation for each of the combined rails. The recommended current through the bead should be around 30% or less of the ferrite bead dc current rating to prevent the core from saturating, which can lower the bead’s effective impedance and EMI filtering capability. A ferrite bead with low dc resistance minimizes the voltage drop and power dissipation across the beads, especially at high current rails such as AVDD 1.3 V.

Evaluation Results

The three power supply configurations shown here are compared through the acquisition of the signal-to-noise ratio (SNR) and spurious free dynamic range (SFDR) of the AD9625 from the fast Fourier transform (FFT) results having 262k data points. The first configuration is the traditional baseline power supply, as shown in Figure 1. The second configuration is the LTM8065 unfiltered, as shown in Figure 2. The third configuration is the LTM8065 with LC filter on the 1.3 V rail, as shown in Figure 7. Both LTM8065-based solutions operate with spread spectrum modulation enabled.

Table 1 shows the dynamic performance of AD9625 while powered by each of the three supply configurations. Two different ADC analog input carrier frequencies were used (729 MHz and 1349 MHz). When powered by the two LTM8065-based supplies, the SNR and SFDR results for the ADC are comparable to those of the baseline power supply. The data shows that LTM8065 can directly power the AD9625 without the use of additional LDO regulators, greatly simplifying the overall solution.

Table 1. AD9625 2.6 GHz Dynamic Performance
Input Frequency (MHz) SNRFS (DB) SFDR (DBC)
Baseline Supply LTM8065 Unfiltered LTM8065 with LC Filter Baseline Supply LTM8065 Unfiltered LTM8065 with LC Filter
729 57.01 57.03 57.01 79.87 79.72 80.11
1349 56.53 56.49 56.54 78.41 80.06 80.77

A close examination of the band around 1349 MHz reveals sideband spurs associated with the 690 kHz switching frequency (spread spectrum enabled) of the LTM8065 (for the 1.3 V rail), but the modulated amplitude is much less than the typical SFDR specification as seen in Figure 8a. Nevertheless, it is better if these sideband spurs are eliminated as shown in Figure 8b, so adding the LC filter to the LTM8065 solution is recommended.

Figure 8. The effects of the LC filter on the modulation spurs around the 1349 MHz carrier frequency can be seen by comparing AD9625 FFT results using two different power systems: a μModule regulator based power system without an LC filter (a) and one with the additional LC filter (b).

The spectral output probed before and after the LC filter section is shown in Figure 9, illustrating an improvement of up to 25 dB in terms of noise filtering.

Figure 9. LTM8065 spectral content at the 1.3 V rail (SSFM enabled).

Spread spectrum frequency modulation (SSFM) lowers the peak amplitude of the ripple at the converter’s fundamental operating frequency by continuously varying the switching frequency over a range covering the programmed value to about 20% higher than that value. SSFM is most useful in systems where lower peak EMI/ripple amplitude is required. The benefits of SSFM are shown in Figure 10, which shows the spectral content of the LTM8065’s 1.3 V output with SSFM enabled and disabled. The reduction is about 10 dB to 12 dB in terms of the ripple peak amplitude at the fundamental frequency, along with noticeable reduction in harmonic peaks.

Figure 10. LTM8065 spectral content at the 1.3 V rail with SSFM on and off.

Powering the 1.3 V supply rail directly with LTM8065 (spread spectrum turned off) results in modulation peaks up to the second-harmonic distortion, as shown in Figure 11.

Figure 11. Detail of a 1349 MHz analog input carrier with SSFM disabled for the LTM8065 1.3 V rail.

Measured System Efficiency

The efficiency comparison between the baseline power supply and LTM8065 system with LC filter is shown in Figure 12. The LTM8065 power solution improves efficiency by 30%.

Figure 12. Efficiency comparison between a baseline power supply design and version 2 of the LTM8065-based system.

PCB Dimension Comparison

To illustrate the size advantages of a µModule regulator solution, the LTM8065-based solution with LC filter was implemented on a PCB. The area of the resulting power section was then compared to the power section of an off-the-shelf EVAL-AD9625 evaluation board (using the baseline power supply design).

The standard EVAL-AD9625 evaluation board (baseline power supply) and the revised AD9625 evaluation board (LTM8065 µModule regulators with LC filter) are compared in Figure 13. The components of the power solution using the LTM8065 reside almost entirely on the topside of the PCB, while the discrete solution on the stock EVAL-AD9625 evaluation board requires power components on both the top (LDO regulators) and the bottom (switcher) sides. The LTM8065-based solution reduces the power supply footprint by over 70%.

Figure 13. The area needed for a power supply is greatly reduced when using μModule Silent Switcher regulators in place of conventional controllers/regulators. (a) The AD9625 revised demo board with LTM8065 is compared to (b) an off-the-shelf AD9625 evaluation board. The power supply sections of both systems are highlighted.

Table 2 compares the LTM8065-based system and the baseline power supply system in terms of overall component count and component footprint. The LTM8065 solution uses less than half the components in about half the footprint.

Table 2. Overall Component Count and Area for the Power Sections of the Various Supplies
LTM8065 with LC Filter Baseline Power Supply
Components (pcs) Component Area (mm2) Components (pcs) Component Area (mm2)
Switching Regulator (IC/Module) 2 78 2 32
LDO ICs 1 4 5 82
Passives 21 58 58 159
Overall 24 140 65 273


The LTM8065 µModule Silent Switcher regulator can power the AD9625 GSPS ADC with significant improvements over traditional discrete solutions, without compromising the dynamic performance of the ADC. Significant reductions in component count and power supply board real estate are achieved by using the LTM8065 to directly power the 1.3 V and 2.5 V power supply rails of AD9625.

A little filtering can help, though. At very high analog input frequencies, a modulation effect can be observed between the analog input carrier frequency and the regulator’s output ripple frequency. The appearance of sideband spurs due to this modulation effect appear around the analog input carrier and are more pronounced at higher analog input frequencies.

Noise on the 1.3 V rail is the main culprit in the modulation effect, due to its low power supply rejection around the switching frequency of the LTM8065 regulator. Although the amplitude of the modulation spurs does not exceed the spurious free dynamic range specification, it’s a good idea to knock down the spurs with a simple LC low pass filter to attenuate the output ripple. Doing so produces a cleaner digitized analog input carrier with no modulation sidebands.

The µModule regulator power solution achieves a system efficiency of 78%, about a 30% improvement over the existing AD9625 demo board. In addition to higher efficiency (and resulting simplified thermal management), PCB board area and component count are significantly reduced due to the compact nature of the fully self-contained LTM8065 power supply.


Eco, Jefferson and Aldrick Limjoco. “Ferrite Beads Demystified.” Analog Dialogue, February 2017.

Jayamohan, Umesh. “Powering GSPS or RF Sampling ADCs: Switcher vs. LDO.” Analog Dialogue, February 2016.

Jayamohan, Umesh. “High Speed ADC Power Supply Domains RAQ.” Analog Dialogue, May 2018.

Reeder, Rob. “Designing Power Supplies for High Speed ADC.” Analog Devices, Inc., February 2012.

Scott, Kevin and Greg Zimmer. “Spread Spectrum Frequency Modulation Reduces EMI.” Analog Devices, Inc., 2014.

Ye, Zhongming. “40 V Input, 3.5 A Silent Switcher μModule Regulator for Automotive and Industrial Applications.” Analog Devices, Inc., January 2018.

Об авторах

Aldrick S Limjoco

Aldrick Limjoco

Aldrick S. Limjoco currently works as Power applications manager in Analog Devices Philippines. He joined ADI in 2006 and has held various engineering roles in areas like design evaluation, product applications and applications research. Aldrick currently holds 3 U.S. patents and has authored/co-authored technical publications on the topics of switching regulator output ripple measurement techniques, novel techniques for low ripple power supply applications and ferrite bead intricacies. He earned his Master's degree (Meng) in University of Limerick , Ireland and bachelor's degree in Electronics Engineering in De La Salle University Manila, Philippines.

Patrick Errgy Pasaquian

Patrick Errgy Pasaquian

Patrick Errgy Pasaquian has been at Analog Devices for seven years. He joined ADI in 2014 and works as a senior applications engineer focusing on aerospace and defense (ADEF) power systems. He has handled various engineering roles in applications development, design evaluation, power attached to ADEF signal chain and customer support through EngineerZone and Who’s Who. He has authored and showcased several papers and projects at the ADI General Technical Conference (GTC), Asia Technical Symposium (ATS), and ADI Philippines Technical Symposium (ADTS). He received his bachelor’s degree in electronics engineering at Central Philippine University in Iloilo City, Philippines.

Jefferson A Eco

Jefferson Eco

Jefferson A. Eco currently works as an applications development engineer in ADI Philippines. He joined ADI in 2011. Jefferson currently holds one U.S. patent and has authored/co-authored technical publications on the topics of switching regulators powering GSPS ADCs and understanding ferrite beads. Jefferson’s product focus is on power management for industrial application and general-purpose DC-to-DC converters of various topologies like flyback, buck, inverting buck-boost, and LDO regulators. He earned his bachelor’s degree in electronics engineering in Camarines Sur Polytechnic Colleges Naga City, Philippines.