Increase I2C or SMBus Data Rate and Reduce Power Consumption with Low Power Bus Accelerator


I2C and SMBus 2-wire buses use simple open-drain pull-down drivers with resistive or current source pull‑ups. Communications protocols in these systems allow multiple devices to drive and monitor the bus without bus contention, creating a robust communications link. Unfortunately, as systems trend towards higher complexity and lower supply voltages, the advantages gained by the simplicity of the open-drain pull-down protocol are offset by the disadvantages of increased rise times and greater DC bus power consumption.

As designs require higher reliability and a greater number of features, the number of peripherals attached to the I2C or SMBus system increases. Some systems extend the bus to edge connectors where I/O cards with additional peripherals are removed and inserted onto the bus. The added peripherals directly increase the equivalent capacitance on the bus, slowing rise times. Slow rise times can seriously impact data reliability and limit the maximum practical bus speed to well below the established I2C or SMBus maximum transmission rate. Rise times can be improved by using lower bus pull‑up resistor values or higher fixed current source values, but the additional bus pull‑up current raises the low state bus voltage, VOL, as well as the DC bus power consumption. Another issue in systems with swappable I/O cards is ESD susceptibility.

The LTC4311 bus accelerator addresses all of these issues. It comes in a tiny 2mm × 2mm DFN or SC70 package and operates over a wide power supply range of 1.6V to 5.5V, making it easy to fit in any number of applications.

Figure 1 shows a typical low voltage application circuit. The LTC4311 provides strong slew rate controlled pull‑up currents on the bus for smooth, controlled transitions during rising edges to decrease rise times in highly capacitive systems, as shown in Figure 2. The LTC4311’s slew rate controlled pull‑up currents are strong enough to allow I2C or SMBus systems to achieve switching frequencies up to 400kHz for bus capacitances in excess of 1nF. In addition, because the accelerator pull‑up impedance is significantly lower than the bus pull‑up resistance, the system has greater immunity to noise on rising edges.

Figure 1. Typical LTC4311 low voltage application circuit.

Figure 2. Comparison of I2C waveform for the LTC4311 vs resistive pull‑up.

The LTC4311’s strong pull‑up currents allow users to choose larger bus pull‑up resistor values to reduce VOL, DC bus power consumption and fall times, while still meeting rise time and switching frequency requirements. This is especially helpful for 2-wire systems where devices require resistances in series with their pull-down devices for ESD protection, since VOL on these devices is reduced with larger bus pull‑up resistor values. The larger bus pull‑up resistor values are also beneficial in systems operating at bus supplies below 2.7V, where VOL can be reduced well below the I2C specification, thereby increasing noise margins.

For I2C or SMBus systems where large numbers of I/O cards can be inserted and removed, the LTC4311’s slew rate controlled pull‑up currents properly address rise time issues despite large variations in bus capacitance. The controlled slew rate regulates the rise rate of the bus to 50V/µs–100V/µs, independent of bus capacitance.

With very light loads, as occurs when some or all cards are removed, no reflections occur on the bus due to the slew rate controlled nature of the pull‑up currents. When the bus is heavily loaded, the LTC4311 provides strong, controlled pull‑up currents to significantly decrease rise times on the bus for capacitive loads well beyond 1nF.

All of these features, coupled with high ±8kV HBM ESD ruggedness, make the LTC4311 ideally suited, and in many cases necessary, for I2C or SMBus systems having large numbers of removable I/O cards.

Circuit Operation

Figure 3 shows a functional block diagram of the LTC4311. The LTC4311 consists of two independent but identical circuits for each bus, consisting of a slew rate detector, two voltage comparators, and a slew rate controlled bus pull‑up current.

Figure 3. LTC4311 functional block diagram.

The slew-rate detector monitors the bus and activates the accelerators only when the bus rise rate is greater than 0.2V/µs. This ensures that the accelerators never turn on when the bus voltage is in a DC state or falling. The first voltage comparator is used to hold off the accelerator until the bus voltage exceeds a threshold voltage, VTHR. For supply voltages below 2.7V, VTHR is supply dependent, defined as 0.3 • VCC. At higher supply voltages, VTHR is a constant 0.8V. This optimizes the LTC4311 for use in low voltage systems, while offering rise time ac‑ celeration over a larger voltage range for I2C and SMBus systems operating at bus voltages above 2.7V.

Once both conditions are met, the slew limited bus accelerator is enabled to quickly slew the bus. An internal slew rate comparator monitors the bus rise rate and controls the accelerator pull‑up current to limit the bus rise rate to 50V/µs–100V/µs, independent of the bus capacitance. A second voltage comparator disables the pull‑up current when the bus is within 400mV of the bus pull‑up supply.

For systems where a single bus accelerator is not sufficient to meet the rise time requirement, additional bus accelerators can be added in parallel to further decrease the rise time.

Auto Detect Standby Mode and Disable Mode

To conserve power, when both bus voltages are within 400mV of the bus pull-up supply, the LTC4311 enters standby mode, consuming only 26µA of supply current. When ENABLE is forced low, as shown in Figure 4, the LTC4311 enters a disable mode and consumes less than 5µA of supply current. Both bus pins are high impedance when in disable mode or when the LTC4311 is powered down, regardless of the bus voltage.

Figure 4. Typical LTC4311 application with low current shutdown.


The LTC4311 efficiently and effectively addresses slow rise times, decreased noise margins at low bus supplies, and increased DC bus power consumption found in 2-wire bus systems. Strong slew rate controlled pull‑up currents quickly and smoothly slew the I2C or SMBus bus lines, decreasing rise times to allow up to 400kHz operation for bus capacitances in excess of 1nF. The advantages of the strong slew rate controlled currents extend to reducing the low state bus voltage, DC bus power consumption, and fall times, since larger value bus pull‑up resistors can be used.

With a small 2mm × 2mm × 0.75mm DFN or SC70 footprint, high ±8kV HBM ESD performance and low power consumption in standby or disable mode, the LTC4311 Low Voltage I2C or SMBus accelerator is also ideally suited for all I2C or SMBus systems. Examples of such systems include notebooks, palmtop computers, portable instruments, RAIDs, and servers where I/O cards are hot-swapped.

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Sam Tran