Power consumption is an important concern in the design of electronic devices, particularly battery-powered products. The challenge facing a device designer is how to add features without significantly degrading the device’s battery run time. For instance, take apart any modern portable device and you will find a number of integrated circuits that draw some current even when they are idle. It is important to minimize both quiescent and operating currents of the embedded circuits to maximize the operating battery life of the application.
Sometimes, under weak battery conditions, you may turn on a device only to find it unresponsive and partially configured after premature termination of its power-on sequence. One way to avoid this is to monitor the system power with supply supervisors that require very little power, allowing them to respond even when a battery is significantly drained. The LTC2934 and LTC2935 ultra-low power supervisors provide accurate voltage monitoring and microprocessor control during all phases of equipment operation. System initialization, early power-fail warning, manual reset and power-on/off reset generation are all included, requiring a scant 500nA from your power source.
While ideal for battery powered products, the LTC2934 and LTC2935 can be used in any system requiring voltage monitoring and/or microprocessor control. The supervisors’ ultra-low load current allows products to use smaller batteries and have longer operating life. Typical applications include portable data-loggers, medical devices, remote systems and intrinsically safe equipment.
Rising Supplies: Start-Up Is Im-POR-tant
It is important to control the start-up of devices as power supplies come online. The LTC2934/35 power-on reset (POR) function provides voltage monitoring and logic control to prevent starting a microprocessor at insufficient supply voltage. The POR function also generates a time delay to provide some margin for supply voltage settling. This time delay also allows a processor oscillator to build up and reach a stable frequency before permitting the microprocessor to execute code.
The reset output (RST) from the supervisor typically connects to the reset input of the microprocessor. During system start-up, the supervisor holds the RST output low. Once the voltage reaches a prescribed minimum value, the internal reset timer begins to run, holding the RST output low for an additional time (typically 200ms). When the reset timer expires, the RST output pulls high and releases the microprocessor from its reset condition.
Figure 2 shows the supply rising waveforms obtained from the typical application shown in Figure 1. When VCC exceeds the power-fail threshold plus 2.5% hysteresis (3.192V × 1.025 = 3.272V), the power-fail output (PFO) is allowed to pull high. The LT3009 (a 3µA LDO) is powered from VCC. Since the PFO output is pulled up by the LDO output, PFO will follow the LDO. When the LDO output exceeds the reset threshold plus 5% hysteresis (1.696V × 1.05 = 1.781V), the internal reset timer begins to run. After 200ms, RST pulls high and system logic connected to RST is released from its reset condition.
Falling Supplies: Heed the Early Warning
Unmanaged power loss can cause many system problems. The LTC2934 and LTC2935 contain a power-fail logic output (PFO) that pulls low to provide an early warning of impending power loss. To be useful, an early warning should occur before the monitored supply falls to insufficient levels and well before the RST output pulls low. The time between PFO and RST pulling low can be used to initiate a variety of critical operations prior to shutdown. Once the supervisor pulls the microprocessor reset low, it may be impossible to execute operations. Operations initiated by a power-fail warning include shutting off non-critical components to conserve energy and writing important data to memory. Some secure applications may also require erasing data to thwart memory snoopers.
Figure 3 shows the supply falling waveforms obtained from the application shown in Figure 1. The waveforms demonstrate how PFO provides ample warning when VCC is suddenly disconnected from the system. The LT3009 supplies a constant 10mA to a load at 1.8V. The 100µF input capacitor begins to discharge when VCC (4.1V nominal) is disconnected. The power-fail threshold is configured for 3.192V.
Because the power-fail condition persists and is not merely transitory, logic output PFO pulls low and remains low after a small comparator delay. This is when the system logic (typically connected to PFO) should take appropriate shutdown action(s). In this application, the remaining operating time beyond power fail is approximately 10ms. Eventually VCC becomes so low that the LDO begins to drop out. RST asserts low shortly after the LDO output falls below the reset threshold (1.696V). At this point, the system load is removed and the LDO output begins to recover. However, the remaining loads and built-in hysteresis prevent the LDO recovery from glitching the RST output.
Select Fixed or Adjustable Thresholds
The LTC2935 integrates eight precision reset and power-fail threshold pairs. Configure any one of the eight threshold pairs using three digital select inputs (see Table 1). Typical applications using the LTC2935 require no additional external components. As a result, solutions require little board space and are extremely low power.
|Reset Threshold (V)||Power-Fail Threshold (V)||S1||S2||S0|
Use the LTC2934 when custom (adjustable) thresholds are necessary. The LTC2934 monitors voltage applied to its PFI and ADJ inputs, typically through an external resistive divider. External divider resistance values can be large which helps keep the current low. Divider errors due to input leakage current (1nA maximum over temperature) are often too small to worry about. The PFI and ADJ inputs have precision 400mV thresholds (falling), so low voltage monitoring is possible.
The falling threshold accuracy for both the LTC2934 and LTC2935 is ±1.5% over the full operating temperature range. Minimum VCC is a low 1.6V. Configuration details are discussed in the LTC2934 and LTC2935 data sheets.
Manual Reset and Reset Timing
The LTC2934 has two selectable reset timeout periods. Tie the RT input low for a 15ms timeout. Tie the RT input high for a 200ms timeout. The LTC2935 has a fixed 200ms timeout. Both parts have a manual reset input which asserts RST low when the MR input is pulled low (typically with a switch). The MR input has an internal 900k pull-up resistor to VCC, used to pull up the MR input when the switch is open. Alternatively, the MR input may be pulled low with an external logic signal. When the MR input returns high, RST pulls high after the reset timeout period has elapsed, assuming that the monitored input voltage is above the reset threshold.
Monitoring a 2-Cell Li-Ion Stack
Some portable applications utilize a stack of batteries to achieve greater product operating lifetime. For a product using two stacked 4.1V Li-ion cells (or similar), the total stack voltage (8.2V) exceeds the maximum operating voltage (5.5V) of the LTC2934.
However, if the center tap of the 2-cell stack is available, cell monitoring is still possible. Figure 4 shows how the center tap of the stack is used to bias the LTC2934. The total stack voltage is monitored at the power-fail input (PFI). The application is configured to pull the PFO output low when the sum of the battery voltages drops below 6.00V. The adjustable input (ADJ) monitors the LDO output. RST pulls low when the LDO output drops below 3.00V.
Some applications have a large load transient when powered. This transient can cause significant supply voltage drop if battery series resistance is large. If the load is enabled after the reset output pulls high, the subsequent voltage drop could put the voltage at the VCC monitor input below threshold, causing the reset and power-fail outputs to pull low. In such cases, active threshold control (shown in Figure 5) is helpful. The LTC2935 power-fail output (PFO) can be used to change any (or all) of the threshold control input states (S2, S1, S0). The power fail comparator threshold is always 150mV larger than the reset threshold and the power-fail output does not experience the 200ms reset timeout delay. If the power-fail output pulls high before the reset output (which is almost always the case with rising supplies), it can then be used to lower the falling thresholds to one of the other seven threshold selections. In Figure 5, the reset falling threshold is changed from 3.3V (PFO low) to 2.25V (PFO high), which provides a generous 1.05V of falling hysteresis.
The 500nA current required by the LTC2934 and LTC2935 supervisors is so small, it can be placed into the “Don’t Care” column of your device power budget. Although the power is low, these supervisors don’t discard features. The power-on reset and early power-fail warning signals provide glitch-free logic controls to your system logic. Reset delay time is built in. Manual reset is available in both parts. Configuring these supervisors is easy, and few if any external components are necessary. Ultra-low input leakage specifications make high impedance applications possible. Specifications are guaranteed from –45°C to 85°C. Both parts are available in space saving 8-lead, 2mm × 2mm DFN and TSOT-23 (ThinSOT™) packages.