Особенности и преимущества

  • Analog input/output
    • Multichannel, 14-bit, 1 MSPS analog-to-digital converter (ADC)
      • Up to 16 ADC input channels
      • 0 V to VREF analog input range
      • Fully differential and single-ended modes
      • AVDD and IOVDD monitors
    • 12-bit voltage output digital-to-analog converters (VDACs)
      • 8 VDACs with a range of 0 V to 2.5 V or AVDD outputs
    • 12-bit current output DACs (IDACs)
      • 4 IDACS with a range of 0 mA to 150 mA outputs
    • Voltage comparator
  • Microcontroller
    • ARM® Cortex®-M3 processor, 32-bit RISC architecture
    • Serial wire port supports code download and debug
  • Clocking options
    • 80 MHz phase-locked loop (PLL) with programmable divider
    • Trimmed on-chip oscillator (±3%)
    • External 16 MHz crystal option
    • External clock source up to 80 MHz
  • Memory
    • 2 × 128 kB independent Flash/EE memories
    • 10,000 cycle Flash/EE endurance
    • 20-year Flash/EE retention
    • 32 kB SRAM
  • Software triggered in-circuit reprogrammability via management data input/output (MDIO)
  • On-chip peripherals
    • MDIO slave up to 4 MHz
    • 2 × I2C, 2 × SPI, UART
    • Multiple general-purpose input/output (GPIO) pins: 3.6 V compliant
    • 7 × 1.2 V compatible when used for MDIO
    • 32-element programmable logic array (PLA)
    • 3 general-purpose timers
    • Wake-up timer
    • Watchdog timer
    • 16-bit pulse width modulator (PWM)
  • Power
    • Supply range: 2.9 V to 3.6 V, and 1.8 V to 2.5 V for IDACs
    • Flexible operating modes for low power applications
  • Packages and temperature range
    • 6 mm × 6mm, 96-ball CSP_BGA package
    • Fully specified for −40°C to +105°C ambient operation
  • Tools
    • Low cost QuickStart development system
    • Full third party support

Подробнее о продукте

The ADuCM320 is a fully integrated single package device that incorporates high performance analog peripherals together with digital peripherals controlled by an 80 MHz ARM Cortex-M3 processor and integral flash for code and data.

The ADC on the ADuCM320 provides 14-bit, 1 MSPS data acquisition on up to 16 input pins that can be programmed for single-ended or differential operation. The voltage at the IDAC output pins can also be measured by the ADC, which is useful for controlling the power consumption of the current DACs. Additionally, chip temperature and supply voltages can be measured.

The ADC input voltage is 0 V to VREF. A sequencer is provided, which allows a user to select a set of ADC channels to be measured in sequence without software involvement during the sequence. The sequence can optionally repeat automatically at a user selectable rate.

Up to eight VDACs are provided with output ranges that are programmable to one of two voltage ranges.

Four IDAC sources are provided. The output currents are programmable with ranges of 0 mA to 150 mA. A low drift band gap reference and voltage comparator completes the analog input peripheral set.

The ADuCM320 can be configured so that the digital and analog outputs will retain their output voltages and currents through a watchdog or software reset sequence. Thus, a product can remain functional even while the ADuCM320 is resetting itself.

The ADuCM320 has a low power ARM Cortex-M3 processor and a 32-bit RISC machine that offers up to 100 MIPS peak performance. Also integrated on chip are 2 × 128 kB Flash/EE memory and 32 kB of SRAM. The flash comprises two separate 128 kB blocks supporting execution from one flash block and simultaneous writing/erasing of the other flash block.

The ADuCM320 operates from an on-chip oscillator or a 16 MHz external crystal and a PLL at 80 MHz. This clock can optionally be divided down to reduce current consumption. Additional low power modes can be set via software. In normal operating mode, the ADuCM320 digital core consumes about 300 μA per MHz.

The device includes an MDIO interface capable of operating at up to 4 MHz. The capability to simultaneously execute from one flash block and write/erase the other flash block makes the ADuCM320 ideal for 10G, 40G, and 100G optical applications. User programming is eased by incorporating PHYADR and DEVADD hardware comparators. In addition, the nonerasable kernel code plus flags in user flash provide assistance by allowing user code to robustly switch between the two blocks of user flash code and data spaces.

The ADuCM320 integrates a range of on-chip peripherals that can be configured under software control, as required in the appli-cation. These peripherals include 1 × UART, 2 × I2C, and 2 × SPI serial input/output communication controllers, GPIO, 32-element programmable logic array, 3 general-purpose timers, plus a wake-up timer and system watchdog timer. A 16-bit PWM with seven output channels is also provided.

GPIO pins on the device power up in high impedance input mode. In output mode, the software chooses between open-drain mode and push-pull mode. The pull-up resistors can be disabled and enabled in software. In GPIO output mode, the inputs can remain enabled to monitor the pins. The GPIO pins can also be programmed to handle digital or analog peripheral signals, in which case the pin characteristics are matched to the specific requirement.

A large support ecosystem is available for the ARM Cortex-M3 processor to ease product development of the ADuCM320. Access is via the ARM serial wire debug port (SW-DP). On-chip factory firmware supports in-circuit serial download via MDIO. These features are incorporated into a low cost QuickStart development system supporting this precision analog microcontroller family.


  • Optical networking

Статус продукта icon-recommended Рекомендовано для новых разработок

Данный продукт выпущен на рынок. Техническое описание содержит окончательные характеристики и рабочие параметры продукта. Для новых разработок ADI рекомендует применение данных продуктов.

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