Documentation Errata for ADSP-BF533 EZ-KIT Lite® Evaluation System Manual
Chapter: B / Page 2
Doc ID: DOC-703
Outside the processor block on page 2 of the board schematics, some of the JTAG signals are misdocumented. The inputs to the processor are TCK, TDI, TMS, and TRST. The outputs from the processor are TDO and EMU. In this diagram, the directions of TDI, TDO, and EMU are reversed. The complementary error is on p10 of the schematics, where the same three signals are reversed going into the Debug Agent block before the JTAG header.
Last Update Date: 08 05 2017