Файлы проектирования и интеграции
- Bill of Materials
- Gerber Files
- PADS Files
- Assembly Drawing
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- EVAL-CN0306-SDPZ ($99.00) A 16-Bit, 100 kSPS Low Power Successive Approximation ADC System with Optimum Low Power Drive Amplifier for Sub-Nyquist Input Signals Up to 1 kHz
- EVAL-SDP-CB1Z ($99.00) Eval Control Board
Особенности и преимущества
- 16-bit 100kSPS SAR ADC system
- Optimum low power drive amplifier
- Input signals up to 1kHz
Области применения и технологии
- Контрольно-измерительные приборы
- Медицинская электроника
- Промышленная автоматика
- Авиация, космос, оборона
Материалы по теме
Функции и преимущества схемы
The circuit shown in Figure 1 is a 16-bit, 100 kSPS successive approximation analog-to-digital converter (ADC) system that has a drive amplifier that is optimized for a low system power dissipation of 7.35 mW for input signals up to 1 kHz and sampling rates of 100 kSPS.
This approach is highly useful in portable battery powered or multichannel applications, or where power dissipation is critical. It also provides benefits in applications where the ADC is idle most of the time between conversion bursts.
Drive amplifiers for high performance successive approximation ADCs are typically selected to handle a wide range of input frequencies. However, when an application requires a lower sampling rate, considerable power can be saved because reducing the sampling rate reduces the ADC power dissipation proportionally.
To take full advantage of the power saved by reducing the ADC sampling rate, a low bandwidth, low power amplifier is required. For instance, the 80 MHz ADA4841-1 op amp (12 mW at 10 V) is recommended for operation with the AD7988-1 16-bit successive approximation register (SAR) ADC (0.7 mW at 100 kSPS). The total system power dissipation including the ADR435 reference (4.65 mW at 7.5 V) is 17.35 mW at 100 kSPS.
For input bandwidths up to 1 kHz and sampling rates of 100 kSPS, the 3 MHz AD8641 op amp (2 mW at 10 V) offers excellent signal-to-noise ratio (SNR) and total harmonic distortion (THD) performance and reduces total system power from 17.35 mW to 7.35 mW, which is a 58% power savings at 100 kSPS.
The driving amplifier is the low power precision AD8641 that has a supply current of 200 μA and a gain bandwidth product of 3 MHz. The AD8641 can be driven with supplies ranging from 5 V to 26 V. The reference for the ADC is the ADR435, which is a high precision, low noise, 5 V XFET voltage reference. The ADR435 has a very low temperature coefficient of 3 ppm/°C at a low supply current of 620 μA. The total power for this circuit is 7.35 mW at 100 kSPS. The SNR is 88.5 dBFS, and the THD is −103 dBc with an input frequency up to 1 kHz.
The AD8641 is configured as a unity-gain buffer and has an RC filter (634 Ω, 2.7 nF) with a 93 kHz cutoff frequency between it and the AD7988-1. The filter allows the use of a higher noise amplifier such as the AD8641 at 28 nV/√Hz while still getting the benefits of much lower power consumption. The tradeoff of higher noise for lower power causes a 2.5 dB reduction in the SNR performance of the system compared to the ADC specification. The higher value of R (634 Ω) relative to the recommended data sheet value (20 Ω) means the AD8641 can drive the large 2.7 nF input capacitor. The higher R value limits the maximum input bandwidth to 1 kHz for low distortion.
This compares favorably to the 16-bit distortion performance (THD less than −100 dBc) of the AD8641 for up to 1 kHz inputs. Distortion increases beyond 1 kHz so that it is not advisable to use this circuit with higher input frequencies or to use this amplifier in a multiplexed application due to the longer settling time. Note that the AD8641 requires at least 2 V of input headroom with respect to the positive supply voltage. The output stage is rail-to-rail.
The goal of this circuit is to deliver good ac performance at the lowest ADC driver power level possible for a given input frequency range up to 1 kHz and sampling rate of 100 kSPS. Figure 2 shows an FFT plot of the circuit performance with a 1 kHz input signal. An SNR of 88.5 dB, and a THD of −103 dB is achieved. The main reason for the reduction in SNR from the 91 dB specification of the AD7988-1 is the higher noise of the AD8641 of 28 nV/√Hz vs. 2 nV/√Hz for the ADA4841-1. The total system power is 7.35 mW: 0.7 mW for the ADC, 2 mW for the amplifier, and 4.65 mW for the reference. This represents a 58% reduction in power from using the ADA4841-1, which consumes 12 mW for a total system power of 17.35 mW.
Figure 3 shows how the system THD and SNR decrease with input frequencies beyond ~1 kHz. This is due to the amplifier distortion as can be seen in the THD+N vs. frequency plot shown in Figure 4.
Основные варианты исполнения
The AD8641 amplifier can be used to drive higher speed, pin compatible ADCs like the AD7988-5 and the AD7980 but only at lower sampling rates of up to 100 kSPS. The OP1177 amplifier can be used to drive the AD7988-1 at double the current (400 μA) with the benefits of improved distortion up to 4 kHz and better system SNR of 90 dB because of its lower noise.
Оценивание характеристик и тестирование схем
The following equipment is needed:
- The EVAL-CN0306-SDPZ evaluation board
- The System Demonstration Board (EVAL-SDP-CB1Z)
- A function generator/signal source, such as the Audio Precision SYS-2522 used in these tests
- The 9 V wall power supply included with the evaluation board
- A PC with a USB port, a USB cable, and the 10-lead PulSAR software installed
Install the 10-lead PulSAR software downloadable from the AD7988-1 product page on the Analog Devices website using the installation guide in the UG-340 user guide. The block diagram of the measurement setup is shown in Figure 5.
|ADR435||Ultralow Noise XFET® Voltage References with Current Sink and Source Capability||
|AD7988-1||16-разрядный АЦП последовательного приближения с быстродействием 100 MSPS и крайне малым энергопотреблением||
|AD8641||Малопотребляющий, прецизионный одноканальный ОУ на JFET транзисторах с Rail-to-Rail выходом||