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  • Schematic
  • Bill of Materials
  • Assembly Drawing
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Оценочные платы

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  • EVAL-ADF4350EB1Z ($210.00) ADF4350 evaluation board used to evaluate this circuit. Please see "Circuit Evaluation & Test" section for set up information.
Проверка наличия и приобретение

Драйверы устройств

ПО (код на С и/или FPGA) для связи с цифровым интерфейсом компонента.

ADF4350 IIO Wideband Synthesizer Linux Driver

ADP150 Regulator Fixed Voltage Linux Driver

Особенности и преимущества

  • Frequency range from 140 MHz to 4.4 GHz
  • Ultralow noise regulators for optimal system phase noise

Функции и преимущества схемы

This circuit uses low noise, low dropout (LDO) linear regulators to supply power to a wideband integrated PLL and VCO. Wideband voltage controlled oscillators (VCOs) may have increased sensitivity to power supply noise, hence, ultralow noise regulators are recommended for best performance.

The circuit shown in Figure 1 utilizes the ADF4350, a fully integrated fractional-N PLL and VCO that can generate frequencies from 137.5 MHz to 4400 MHz. The ADF4350 is powered from the ultralow noise 3.3 V ADP150 regulator for optimal LO phase noise performance.

Figure 1. ADP150 Regulators Connected to ADF4350
Figure 1. ADP150 Regulators Connected to ADF4350 (Simplified Schematic: All Connections and Decoupling Not Shown)

The lower integrated rms noise of the ADP150 LDO of only 9 μV rms (10 Hz to 100 kHz) helps to minimize VCO phase noise and reduce the impact of VCO pushing (the VCO equivalent of power supply rejection).

Figure 2 shows a photo of the evaluation board, which uses the ADP150 LDOs to power the ADF4350. The ADP150 represents the industry’s lowest noise LDO in the smallest package at the lowest cost. It is available in a 4-ball, 0.8 mm × 0.8 mm, 0.4 mm pitch WLCSP or a convenient 5-lead TSOT package. Adding the ADP150’s to the design, therefore, has minimal impact on system cost and board area while providing a significant improvement in phase noise.

Figure 2. EVAL-ADF4350EB1Z Rev. B Evaluation Board Featuring ADP150 Low Noise Regulators
Figure 2. EVAL-ADF4350EB1Z Rev. B Evaluation Board Featuring ADP150 Low Noise Regulators

Описание схемы

The ADF4350 is a wideband PLL and VCO consisting of three separate multiband VCOs. Each VCO covers a range of approximately 700 MHz (with some overlap between VCOs). Lower frequencies are generated by output dividers.

VCO pushing is measured by applying a steady dc tuning voltage to the ADF4350 VTUNE pin, varying the power supply voltage, and measuring the frequency change. The pushing figure (P) equals the frequency delta divided by the voltage delta, as shown in Table 1.

Table 1: ADF4350 VCO Pushing
VCO Frequency (MHz)
VCO Pushing (MHz/V)

In a PLL system, higher VCO pushing means that power supply noise will degrade the VCO phase noise. If VCO pushing is low, then power supply noise will not significantly degrade phase noise. However, for high VCO pushing, noisy power supplies will have a measurable impact on phase noise performance.

Experiments showed pushing to be at its maximum at 4.4 GHz VCO output frequency, so the comparison of VCO performance with different regulators was made at this frequency. Rev. A evaluation boards of the ADF4350 used the ADP3334 LDO regulator. The integrated rms noise of this regulator is 27 μV (integrated from 10 Hz to 100 kHz). This compares to 9 μV for the ADP150, which is used on the EVAL-ADF4350EB1Z, Rev B. In order to measure the impact of the power supply noise, a narrow PLL loop bandwidth (10 kHz) was used to facilitate greater examination of VCO phase noise. A diagram of this setup is shown in Figure 3. A more detailed examination of the output noise density with frequency is available from the data sheets of both the ADP3334 and ADP150.

Figure 3. ADF4350 Measurement Setup
Figure 3. ADF4350 Measurement Setup

Figure 4 shows that the noise spectral density of the ADP3334 regulator is 150 nV/√Hz at 100 kHz offset. The same plot for the ADP150 (Figure 5) shows 25 nV /√Hz.

Figure 4. ADP3334 Output Noise Spectrum
Figure 4. ADP3334 Output Noise Spectrum

The formula for calculating the degradation in phase noise due to the power supply noise is as follows: 


Where L(LDO) is the noise contribution from the regulator to the VCO phase noise (in dBc/Hz), at an offset fm; P is the VCO pushing figure in Hz/V; Sfm; is the noise spectral density at a given frequency offset in V/√Hz; and fm; is the frequency offset at which the noise spectral density is measured in Hz.

Figure 5. ADP150 Output Noise Spectrum
Figure 5. ADP150 Output Noise Spectrum

The noise contribution from the supply is then rss summed with the noise contribution of the VCO (itself measured with a very low noise supply) to give the total noise at the VCO output with a given regulator.

These noise performances are rss summed together to give the expected VCO phase noise:


In this example, a 100 kHz noise spectral density offset is chosen, a 6 MHz/V pushing figure is used, and −110 dBc/Hz is taken as the VCO noise with an ideal supply.

Using a dedicated signal source analyzer (like Rohde & Schwarz FSUP), the VCO phase noise is compared. At 100 kHz offset the ADP3334 delivers −102.6 dBc/Hz (Figure 6), and in the same configuration the ADP150 measures −108.5 dBc/Hz (Figure 7).

Table 2. Calculation and Measurement of VCO Noise
Noise contribution from regulartor
Noise contribution from regulartor
Total calculated noise at VCO output
Measured VCO nose at 100 kHz offset

Figure 6. ADF4350 Phase Noise at 4.4 GHz with ADP3334 Regulators
Figure 6. ADF4350 Phase Noise at 4.4 GHz with ADP3334 Regulators

Figure 7. ADF4350 Phase Noise at 4.4 GHz with ADP150 Regulators
Figure 7. ADF4350 Phase Noise at 4.4 GHz with ADP150 Regulators

The integrated phase noise improves from 1.95° to 1.4° rms also. The measured results correlate very closely with the calculations and clearly show the benefit of using the ADP150 with the ADF4350.

A complete design support package for this circuit note can be found at http://www.analog.com/CN0147-DesignSupport.

Основные варианты исполнения

Additional regulators can be added for greater isolation between power supplies, if desired. Also, one ADF150 regulator can be used to power the entire ADF4350 part. However, care needs to be taken in this case to ensure the maximum rated current of the single ADP150 regulator is not exceeded. This is possible if the lowest output power setting on the ADF4350 is selected.

Программное обеспечение

Драйверы устройств

Инструменты проектирования


Инструмент ADIsimPLL предназначен для быстрого и достоверного оценивания характеристик новых высококачественных синтезаторов с ФАПЧ компании Analog Devices. Этот инструмент обладает наибольшим набором возможностей среди доступных на сегодняшний день инструментов проектирования и моделирования синтезаторов с ФАПЧ. С его помощью можно моделировать все ключевые нелинейные эффекты, способные влиять на характеристики синтезаторов с ФАПЧ. ADIsimPLL позволяет исключить, по меньшей мере, одну итерацию из процесса проектирования, сокращая, тем самым, цикл от задумки концепции проекта до выпуска устройства на рынок.

Оценка параметров и тестирование схемы

This circuit note, CN-0147, uses the EVAL-ADF4350EB1Z board for evaluation of the described circuit, allowing for quick setup and evaluation. The EVAL-ADF4350EB1Z board uses the standard ADF4350 programming software, contained on the CD that accompanies the evaluation board.

Equipment Needed

Windows® XP, Windows, Vista (32-bit), or Windows 7 (32-bit) PC with USB Port, the ADF4350EB1Z, the ADF4350 programming software, 5.5 V power supply, and a spectrum analyzer such as a Rhode and Schwartz FSUP26. See this circuit note CN-0147 and UG-109 user guide for evaluation board EVAL-ADF435EB1Z and the ADF4350 data sheet.

Getting Started

This circuit note, CN-0147, contains a description of the circuit, the schematic, and a block diagram of the test setup. The ser guide, UG-109, details the installation and use of the EVAL-ADF4350 evaluation software. UG-109 also contains board setup instructions and the board schematic, layout, and bill of materials.

Functional Block Diagram

This circuit note, CN-0147, contains the function block diagram of the described test setup in Figure 3.

Setup and Test

After setting up the equipment, standard RF test methods should be used to measure the spectral purity of the output signal.


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