Обзор

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The AD9559 is a low loop bandwidth clock multiplier that provides jitter cleanup and synchronization for many systems, including synchronous optical networks (SONET/SDH). The AD9559 generates two completely independent output clocks that are synchronized to up to four external input references. The digital PLL allows for reduction of input time jitter or phase noise associated with the external references. The digitally controlled loop and holdover circuitry of the AD9559 continuously generates a low jitter output clock even when all reference inputs have failed.

For convenience, detailed information from the AD9559 data sheet has been included here. Use this user guide in conjunction with the AD9559 data sheet and software documenta¬tion available at www.analog.com.


Features
  • Simple power connection using 6 V wall adapter and on-board LDO voltage regulators
  • LDOs are easily bypassed for power measurements
  • 4 ac-coupled differential output SMA connectors (which can be reconfigured for up to 8 single-ended outputs.
  • 4 inputs SMA connectors that accept either single-ended or differential signals
  • USB connection to PC
  • Microsoft Windows-based evaluation software with simple graphical user interface and support for both 64-bit and 32-bit operating systems.
  • Easy access to digital I/O and diagnostic signals via I/O header
  • Status LEDs for diagnostic signals

Области применения и технологии

Применяемые компоненты

Документация

Оценочная документация (1)

AD9559 Evaluation Documentation

Программное обеспечение

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ZIP
52603 kB
AD9559 Evaluation Software
The evaluation software and USB driver contained in this installer is 32-bit and 64-bit compatible.
ZIP
Web Install
This is the eval software web installer that doesn't include .NET. Rather it relies on an internet connection to download Microsoft .NET, etc. It's also 32-bit/64-bit compatible.

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