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Demonstration circuit 2395A features the LTC2325/LTC2324/LTC2320 family. With up to 5Msps, these differential, multiple channel, 16-bit, serial, high speed successive approximation register (SAR) ADCs are available in a 52-lead QFN package. Each ADC has an internal 20ppm/°C maximum drift reference and an SPI-compatible serial interface that supports CMOS and LVDS logic. Note the demo board is configured for CMOS operation by default; see the note under JP8 for LVDS operation. The following text refers to the LTC2325, but applies to all members of the family, the only difference being the number of channels, the sample rate and/or the number of bits. The DC2395A demonstrates the DC and AC performance of the LTC2325 in conjunction with the DC890 PScope™ data collection board. Alternatively, by connecting the DC2395A into a customer application, the performance of the LTC2325 can be evaluated directly in that circuit.