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Demonstration circuit 1996A features the LTC2323 family. With up to 5Msps, these differential, dual channel, 16-bit, serial, high speed successive approximation register (SAR) ADCs are available in a 28-lead QFN package. The LTC2323 family has an internal 20ppm/°C reference and an SPI-compatible serial interface that supports CMOS and LVDS logic. Note the demo board is configured for CMOS operation by default; see the note under JP3 for LVDS operation. The demo manual refers to the LTC2323, but applies to all members of the family, the only difference being the sample rate and the number of bits.