/*********************************************************************************

Copyright(c) 2022-2026 Analog Devices, Inc. All Rights Reserved.

This software is proprietary.  By using this software you agree
to the terms of the associated Analog Devices License Agreement.

*********************************************************************************/


/*!
 * @ingroup  MDMA_Manager
 * @defgroup MDMA_Config MDMA Service Static Configuration
 * @{
 */

/*!
 * @file    adi_mdma_config_SC8xx.h
 * @brief   MDMA Service configuration macros for ADSP-SC8xx processor family
 * @version $Revision$
 * @date    $Date$
 * @details This file contains the static configuration macros for the MDMA service.
 *
 */

#ifndef ADI_MDMA_CONFIG_SC8XX_H
#define ADI_MDMA_CONFIG_SC8XX_H

/** @ingroup MDMA_Config
 *  When this macro is set to 1 (default), the API adi_mdma_Copy1D() uses the most optimum MSIZE value automatically based on the DMA start address
 *	and count value. The MSIZE value supplied by the user is ignored. Note that bandwidth limit/measure/monitor APIs can't be used with this macro enabled.
 *  So, the static configuration macro ADI_MDMA_CFG_ENABLE_BANDWIDTH_FUNCTIONS should be set to 0 with this macro enabled.
 */
#define ADI_MDMA_CFG_MSIZE_AUTO							(0u)

/** @ingroup MDMA_Config
 *	By default, when using the API adi_mdma_CopyList(), the DMA done interrupt in list mode is generated after the end of the last work unit in the descriptor
 *	list irrespective of the bCallbackWhenDone descriptor parameter. However, the configuration macro ADI_MDMA_CFG_LIST_MULTIPLE_CALLBACKS_ENABLE
 *	can be set to 1 (set to zero by default) to allow generation of interrupt for more than one descriptors as per the configuration of bCallbackWhenDone parameter.
 *	Note that enabling this macro might result in a race condition for smaller work units and consequently one or more DMA interrupts might be missed.
 *  It is user's responsibility to take care of such conditions in the application.
 */
#define ADI_MDMA_CFG_LIST_MULTIPLE_CALLBACKS_ENABLE		(0u)

/** @ingroup MDMA_Config
 *	This macro should be set to use the APIs adi_mdma_BWLimit()/adi_mdma_BWMonitor()/adi_mdma_BWMeasure().
 *	This macro should be cleared (default) when ADI_MDMA_CFG_MSIZE_AUTO is set.
 */
#define ADI_MDMA_CFG_ENABLE_BANDWIDTH_FUNCTIONS			(1u)

#if defined(__ADSPSHARCFX__)
/** @ingroup MDMA_Config
 *	This macro should be set if cache management is required to be done inside MDMA service.
 *	This macro should be cleared if cache management is not required to be done inside MDMA service.
 */
#define ADI_MDMA_CACHE_MANAGEMENT						(1u)
#elif  defined(__ADSPCORTEXM33__)
/** @ingroup MDMA_Config
 *	This macro should be Disabled (=0u) as M33 does not have cache support.
 *	Please do not change this macro.
 */
#define ADI_MDMA_CACHE_MANAGEMENT						(0u)
#elif  defined(__ADSPCORTEXA55__)
/** @ingroup MDMA_Config
 *	This macro should be set if cache management is required to be done inside MDMA service.
 *	This macro should be cleared if cache management is not required to be done inside MDMA service.
 */
#define ADI_MDMA_CACHE_MANAGEMENT						(1u)
#endif

#if defined(__ADSPSHARCFX__) && defined(__ADSPSC835_FAMILY__)
/**
 * Specifies the direct/in-direct interrupt configuration for the MDMA device
 * (0) - Direct interrupt path is enabled
 * (1) - SEC/In-direct interrupt path is enabled */
#define ADI_MDMA_CONFIG_SEC_INT							    (0u)
#endif
#endif /* ADI_MDMA_CONFIG_SC8XX_H */

/*@}*/
