REG7

REG7 Register. More...

Macros
#define	LTC4155_REG7_SUBADDR   0x07
#define	LTC4155_REG7   (0 << 12 | (16 - 1) << 8 | LTC4155_REG7_SUBADDR)

Detailed Description

REG7 Register.

7:0
ARM_SHIPMODE

• CommandCode: 0x07
• Contains Bit Fields:
  • ARM_SHIPMODE : Write any data to this address to enable ship-and-store shutdown mode

Macro Definition Documentation

LTC4155_REG7

#define LTC4155_REG7   (0 << 12 | (16 - 1) << 8 | LTC4155_REG7_SUBADDR)

Definition at line 1015 of file LTC4155_reg_defs.h.

LTC4155_REG7_SUBADDR

#define LTC4155_REG7_SUBADDR   0x07

Definition at line 1014 of file LTC4155_reg_defs.h.