65 #include "wsf_types.h"
69 #include "hci_handler.h"
70 #include "dm_handler.h"
71 #include "l2c_handler.h"
72 #include "att_handler.h"
73 #include "smp_handler.h"
79 #include "mxc_config.h"
98 #include "trim_regs.h"
100 #define EM9301_ASSERT_RESET 1
101 #define EM9301_RELEASE_RESET 0
102 #define EM9301_SLEEP 0
103 #define EM9301_WAKEUP 1
104 #define BLE_MS_PER_TIMER_TICK 10
105 #define SYSTICK_10_MS 327
112 #define RED_LED_PIN 7
113 #define GREEN_LED_PIN 6
117 #define BLE_SLAVE_SELECT 0
118 #define FC_POLARITY 1
120 #define SS_POLARITY 0
122 #define INACT_DELAY 0
140 #define BLE_IRQ_PORT 0
141 #define BLE_IRQ_PIN 4
142 #define BLE_RST_PORT 0
143 #define BLE_RST_PIN 5
145 #define CHARGING_PORT 2
146 #define CHARGING_PIN 7
149 #define NTC_A 824.9707194577557
150 #define NTC_B 222.45487555218145
151 #define NTC_C 0.09559990904037504
165 #define WSF_BUF_POOLS 4
168 static uint8_t mainBufMem[768];
180 static void bleStackInit(uint8_t msPerTick)
182 wsfHandlerId_t handlerId;
185 WsfTimerInit(msPerTick);
187 WsfBufInit(
sizeof(mainBufMem), mainBufMem,
WSF_BUF_POOLS, &mainPoolDesc[0]);
191 handlerId = WsfOsSetNextHandler(HciHandler);
192 HciHandlerInit(handlerId);
195 handlerId = WsfOsSetNextHandler(DmHandler);
200 DmHandlerInit(handlerId);
203 handlerId = WsfOsSetNextHandler(L2cSlaveHandler);
204 L2cSlaveHandlerInit(handlerId);
209 handlerId = WsfOsSetNextHandler(AttHandler);
210 AttHandlerInit(handlerId);
215 handlerId = WsfOsSetNextHandler(SmpHandler);
216 SmpHandlerInit(handlerId);
219 handlerId = WsfOsSetNextHandler(AppHandler);
220 AppHandlerInit(handlerId);
227 static void em9301_hw_wakeup(
unsigned int wu)
236 static void em9301_hw_reset(
unsigned int reset)
247 static void spi_read_irq(
void)
251 SPI_ConfigSpecial(&ss, MXC_E_SPI_FLOW_CTRL_SR,
FC_POLARITY, 1, 0, 1);
253 while(SPI_Setup(&ss));
255 if(SPI_WaitFlowControl(&ss)) {
256 memset(mainHciBuf, 0,
sizeof(mainHciBuf));
257 hciDrvRead(
sizeof(mainHciBuf), &mainHciBuf[0]);
263 static tmr32_config_t tmr32_cfg;
268 #define CAPT_SAMPLES0 184
269 #define CAPT_CYCLES0 46
270 #define CYCLE_START0 6
278 static adc_transport_t adc_capture_handle0;
279 static adc_transport_t adc_capture_handle1;
293 static uint16_t sine_wave16bit[] = {
360 static uint32_t data_samples16bit =
sizeof(sine_wave16bit)/2;
362 static dac_transport_t dac_wave_handle;
364 static void data_avg (
void)
389 cal_a1 = cal_a1 + calc_calA1[i];
390 cal_a2 = cal_a2 + calc_calA2[i];
391 cal_b1 = cal_b1 + calc_calB1[i];
392 cal_b2 = cal_b2 + calc_calB2[i];
393 tst_a1 = tst_a1 + calc_tstA1[i];
394 tst_a2 = tst_a2 + calc_tstA2[i];
395 tst_b1 = tst_b1 + calc_tstB1[i];
396 tst_b2 = tst_b2 + calc_tstB2[i];
403 PhaseC = atan2(Qc,Ic) ;
404 PhaseT = atan2(Qt,It);
405 MagC = sqrt((Ic*Ic) + (Qc * Qc));
406 MagT = sqrt((It*It) + (Qt * Qt));
408 ZMAG = ((MagC)/(MagT))*
RCAL -
R1;
409 ZPHASE = (PhaseC - PhaseT)*180/3.14159;
412 static void print_results(
void)
420 calc_calA1[i] = capt_buf0[k];
421 calc_calB1[i] = capt_buf0[k+1];
422 calc_calA2[i] = capt_buf0[k+2];
423 calc_calB2[i] = capt_buf0[k+3];
424 calc_tstA1[i] = capt_buf1[k];
425 calc_tstB1[i] = capt_buf1[k+1];
426 calc_tstA2[i] = capt_buf1[k+2];
427 calc_tstB2[i] = capt_buf1[k+3];
438 ZMAG = ZMAG*1.0113 - 38.38;
442 ZMAG = ZMAG*1.0092 - 10.609;
448 static void capt_results(int32_t exit_status,
void *arg)
452 DAC_PatternStop(&dac_wave_handle);
456 static void PwrSeq_Setup(
void)
458 PWR_EnableDevRun(MXC_E_PWR_DEVICE_LDO);
459 PWR_EnableDevRun(MXC_E_PWR_DEVICE_RO);
460 PWR_EnableDevRun(MXC_E_PWR_DEVICE_RTC);
461 PWR_DisableDevRun(MXC_E_PWR_DEVICE_SVM3);
462 PWR_DisableDevRun(MXC_E_PWR_DEVICE_SVM1);
464 mxc_pwrseq_reg0_t pwr_reg0 = MXC_PWRSEQ->reg0_f;
465 pwr_reg0.pwr_first_boot = 1;
466 MXC_PWRSEQ->reg0_f = pwr_reg0;
469 PWR_Disable(MXC_E_PWR_ENABLE_AFE);
470 PWR_Disable(MXC_E_PWR_ENABLE_STATIC_PULLUPS);
471 PWR_Disable(MXC_E_PWR_ENABLE_USB);
474 mxc_pwrman_pwr_rst_ctrl_t pwr_rst_ctrl = MXC_PWRMAN->pwr_rst_ctrl_f;
475 pwr_rst_ctrl.low_power_mode = 1;
476 MXC_PWRMAN->pwr_rst_ctrl_f = pwr_rst_ctrl;
479 static void ClkMan_Setup(
void)
482 CLKMAN_SetSystemClock(MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_24MHZ_RO);
485 CLKMAN_WaitForSystemClockStable();
488 CLKMAN_SetRTOSMode(TRUE);
491 CLKMAN_TrimRO_Start();
493 CLKMAN_TrimRO_Stop();
495 MXC_CLKMAN->clk_config = 0x00;
497 mxc_clkman_clk_gate_ctrl0_t clk_gator0 = MXC_CLKMAN->clk_gate_ctrl0_f;
498 mxc_clkman_clk_gate_ctrl1_t clk_gator1 = MXC_CLKMAN->clk_gate_ctrl1_f;
499 mxc_clkman_clk_gate_ctrl2_t clk_gator2 = MXC_CLKMAN->clk_gate_ctrl2_f;
501 clk_gator0.cm3_clk_gater = 1;
502 clk_gator0.sysbus_clk_gater = 1;
503 clk_gator0.icache_clk_gater = 1;
504 clk_gator0.flash_clk_gater = 1;
505 clk_gator0.sram_clk_gater = 1;
506 clk_gator0.apb_bridge_clk_gater = 1;
507 clk_gator0.sysman_clk_gater = 1;
508 clk_gator0.uart0_clk_gater = 1;
509 clk_gator0.uart1_clk_gater = 0;
511 clk_gator0.watchdog0_clk_gater = 0;
512 clk_gator0.watchdog1_clk_gater = 0;
513 clk_gator0.usb_clk_gater = 0;
514 MXC_CLKMAN->clk_gate_ctrl0_f = clk_gator0;
516 clk_gator1.testacc_clk_gater = 0;
517 clk_gator1.adc_clk_gater = 1;
518 clk_gator1.dac12_0_clk_gater = 1;
519 clk_gator1.dac12_1_clk_gater = 0;
520 clk_gator1.dac8_0_clk_gater = 1;
521 clk_gator1.dac8_1_clk_gater = 0;
522 clk_gator1.pmu_clk_gater = 1;
523 clk_gator1.lcd_clk_gater = 0;
524 clk_gator1.gpio_clk_gater = 1;
525 clk_gator1.pulsetrain_clk_gater = 0;
526 clk_gator1.spi0_clk_gater = 1;
527 clk_gator1.spi1_clk_gater = 0;
528 clk_gator1.spi2_clk_gater = 0;
529 clk_gator1.i2cm0_clk_gater = 0;
530 clk_gator1.i2cm1_clk_gater = 0;
531 clk_gator1.i2cs_clk_gater = 0;
532 MXC_CLKMAN->clk_gate_ctrl1_f = clk_gator1;
534 clk_gator2.crc_clk_gater = 0;
535 clk_gator2.tpu_clk_gater = 0;
536 clk_gator2.ssbmux_clk_gater = 1;
537 clk_gator2.pad_clk_gater = 1;
538 MXC_CLKMAN->clk_gate_ctrl2_f = clk_gator2;
540 CLKMAN_SetClkScale(MXC_E_CLKMAN_CLK_SYS,MXC_E_CLKMAN_CLK_SCALE_ENABLED);
541 CLKMAN_SetClkScale(MXC_E_CLKMAN_CLK_RTC_INT_SYNC, MXC_E_CLKMAN_CLK_SCALE_ENABLED);
542 CLKMAN_SetClkScale(MXC_E_CLKMAN_CLK_DAC0, MXC_E_CLKMAN_CLK_SCALE_ENABLED);
543 CLKMAN_SetClkScale(MXC_E_CLKMAN_CLK_DAC2, MXC_E_CLKMAN_CLK_SCALE_DIV_256);
547 static void Voltage_Ref(
void)
550 PWR_Enable(MXC_E_PWR_ENABLE_AFE);
553 AFE_ADCVRefEnable(MXC_E_AFE_REF_VOLT_SEL_2048);
554 AFE_DACVRefEnable(MXC_E_AFE_REF_VOLT_SEL_2048, MXC_E_AFE_DAC_REF_REFADC);
558 static void AFE_VRefDisable(
void)
560 mxc_afe_ctrl1_t afe_ctrl1 = MXC_AFE->ctrl1_f;
561 afe_ctrl1.refadc_fast_pwrdn_en = 1;
562 afe_ctrl1.refdac_fast_pwrdn_en = 1;
563 afe_ctrl1.refadc_outen = 0;
564 afe_ctrl1.refdac_outen = 0;
565 afe_ctrl1.ref_pu = 0;
566 MXC_AFE->ctrl1_f = afe_ctrl1;
569 static void AFE_Disable(
void)
571 PWR_Disable(MXC_E_PWR_ENABLE_AFE);
581 mxc_adc_ctrl0_t adc_ctrl0 = MXC_ADC->ctrl0_f;
582 adc_ctrl0.adc_clk_mode = 0x0;
583 MXC_ADC->ctrl0_f = adc_ctrl0;
584 mxc_clkman_clk_ctrl_t clk_ctrl = MXC_CLKMAN->clk_ctrl_f;
585 clk_ctrl.adc_gate_n = 0;
586 clk_ctrl.adc_source_select = 0;
587 MXC_CLKMAN->clk_ctrl_f = clk_ctrl;
590 mxc_adc_intr_t adc_int = MXC_ADC->intr_f;
591 MXC_ADC->intr_f = adc_int;
594 static void Switch_Setup (
int i)
598 AFE_SetSwitchState(0,1);
599 AFE_SetSwitchState(2,1);
600 AFE_SetSwitchState(1,0);
601 AFE_SetSwitchState(3,0);
606 AFE_SetSwitchState(0,0);
607 AFE_SetSwitchState(2,0);
608 AFE_SetSwitchState(1,1);
609 AFE_SetSwitchState(3,1);
613 static void AFE_Init(
int i)
616 MXC_DAC0->trm = 0xffff4200;
617 MXC_DAC2->reg = 0x002400ff;
622 DAC_Enable(0, MXC_E_DAC_PWR_MODE_LVL2);
623 DAC_SetStartMode(0, MXC_E_DAC_START_MODE_FIFO_NOT_EMPTY);
624 DAC_SetOutputRaw(0,sine_wave16bit[0]);
627 DAC_Enable(2,MXC_E_DAC_PWR_MODE_LVL0);
628 DAC_SetStartMode(2,MXC_E_DAC_START_MODE_FIFO_NOT_EMPTY);
629 DAC_SetOutput(2,140);
635 AFE_OpAmpSetup(0,0,MXC_E_AFE_OPAMP_POS_IN_PAD_INxP,MXC_E_AFE_OPAMP_NEG_IN_OUTx,MXC_E_AFE_IN_MODE_OPAMP_NCH_PCH);
639 AFE_OpAmpSetup(1,0,MXC_E_AFE_OPAMP_POS_IN_DAC2P,MXC_E_AFE_OPAMP_NEG_IN_PAD_INxN,MXC_E_AFE_IN_MODE_OPAMP_NCH_PCH);
642 AFE_OpAmpSetup(3,0,MXC_E_AFE_OPAMP_POS_IN_DAC0N,MXC_E_AFE_OPAMP_NEG_IN_OUTx,MXC_E_AFE_IN_MODE_OPAMP_NCH_PCH);
656 static void ADC_Init(
int i,
float excitation_frequency)
658 uint32_t adc_slp_cnt = 2000000.0/excitation_frequency - 100;
663 mxc_adc_ctrl0_t adc_ctrl0 = MXC_ADC->ctrl0_f;
664 adc_ctrl0.adc_clk_mode = 0x2;
665 MXC_ADC->ctrl0_f = adc_ctrl0;
668 CLKMAN_SetADCClock(MXC_E_CLKMAN_ADC_SOURCE_SELECT_24MHZ_RO);
671 ADC_SetRate(1,1,7,adc_slp_cnt);
673 ADC_SetMode(MXC_E_ADC_MODE_SMPLCNT_LOW_POWER,MXC_E_ADC_AVG_MODE_FILTER_OUTPUT,2,MXC_E_ADC_BI_POL_BIPOLAR,MXC_E_ADC_RANGE_FULL);
674 ADC_SetMuxSel(MXC_E_ADC_PGA_MUX_CH_SEL_AIN0,MXC_E_ADC_PGA_MUX_DIFF_ENABLE);
675 ADC_SetPGAMode(0,MXC_E_ADC_PGA_GAIN_2);
676 ADC_SetStartMode(MXC_E_ADC_STRT_MODE_SOFTWARE);
683 static void ADC_Capt(
int i,
float excitation_frequency)
697 uint16_t rate = 24000000.0/(64.0*excitation_frequency)-2;
698 DAC_SetRate(0,rate,MXC_E_DAC_INTERP_MODE_DISABLED);
699 DAC_SetStartMode(0,MXC_E_DAC_START_MODE_ADC_STROBE);
703 DAC_PatternStart(&dac_wave_handle);
706 mxc_clkman_clk_gate_ctrl2_t clk_gator2 = MXC_CLKMAN->clk_gate_ctrl2_f;
707 clk_gator2.ssbmux_clk_gater = 0;
708 MXC_CLKMAN->clk_gate_ctrl2_f = clk_gator2;
711 CLKMAN_SetClkScale( MXC_E_CLKMAN_CLK_SYS,MXC_E_CLKMAN_CLK_SCALE_DIV_4);
716 ADC_CaptureStart(&adc_capture_handle0);
717 PWR_SetMode(MXC_E_PWR_MODE_LP2, NULL);
724 ADC_CaptureStart(&adc_capture_handle1);
725 PWR_SetMode(MXC_E_PWR_MODE_LP2, NULL);
728 CLKMAN_SetClkScale( MXC_E_CLKMAN_CLK_SYS,MXC_E_CLKMAN_CLK_SCALE_ENABLED);
732 static void ADC_Measure(
float excitation_frequency)
739 ADC_Init(0, excitation_frequency);
740 ADC_Capt(0, excitation_frequency);
744 ADC_Init(1, excitation_frequency);
745 ADC_Capt(1, excitation_frequency);
754 mxc_clkman_clk_gate_ctrl2_t clk_gator2 = MXC_CLKMAN->clk_gate_ctrl2_f;
755 clk_gator2.ssbmux_clk_gater = 1;
756 MXC_CLKMAN->clk_gate_ctrl2_f = clk_gator2;
760 static uint32_t tmr0_counter;
761 static void tmr32_led(uint32_t ticks)
766 static uint8_t yellow_led_off = 1;
782 for(loop = 0; loop < 8; loop++)
803 ADC_Measure(1953.125);
809 ADC_Measure(12500.0);
812 ADC_Measure(15625.0);
822 *(
packet_1_buf+(loop+1)*4+0) = ((uint32_t)ZMAG & 0xFF000000) >> 24;
823 *(
packet_1_buf+(loop+1)*4+1) = ((uint32_t)ZMAG & 0x00FF0000) >> 16;
824 *(
packet_1_buf+(loop+1)*4+2) = ((uint32_t)ZMAG & 0x0000FF00) >> 8;
825 *(
packet_1_buf+(loop+1)*4+3) = (uint32_t)ZMAG & 0x000000FF;
829 *(
packet_2_buf+((loop-4)+1)*4+0) = ((uint32_t)ZMAG & 0xFF000000) >> 24;
830 *(
packet_2_buf+((loop-4)+1)*4+1) = ((uint32_t)ZMAG & 0x00FF0000) >> 16;
831 *(
packet_2_buf+((loop-4)+1)*4+2) = ((uint32_t)ZMAG & 0x0000FF00) >> 8;
832 *(
packet_2_buf+((loop-4)+1)*4+3) = (uint32_t)ZMAG & 0x000000FF;
862 PWR_Enable(MXC_E_PWR_ENABLE_AFE);
864 AFE_ADCVRefEnable(MXC_E_AFE_REF_VOLT_SEL_2048);
866 ADC_SetMode(MXC_E_ADC_MODE_SMPLCNT_FULL_RATE, MXC_E_ADC_AVG_MODE_FILTER_OUTPUT, 7, 0, MXC_E_ADC_RANGE_FULL);
868 mxc_adc_ctrl0_t adc_ctrl0 = MXC_ADC->ctrl0_f;
869 adc_ctrl0.adc_clk_mode = 0x2;
870 MXC_ADC->ctrl0_f = adc_ctrl0;
872 CLKMAN_SetADCClock(MXC_E_CLKMAN_ADC_SOURCE_SELECT_24MHZ_RO);
873 ADC_SetRate(1,1,0x3F,0);
878 ADC_SetPGAMode(0, MXC_E_ADC_PGA_GAIN_2);
880 ADC_SetMuxSel(MXC_E_ADC_PGA_MUX_CH_SEL_AIN1, 0);
888 uint16_t NTCCODE = ADC_ManualRead();
892 ADC_SetPGAMode(0, MXC_E_ADC_PGA_GAIN_1);
894 ADC_SetMuxSel(MXC_E_ADC_PGA_MUX_CH_SEL_AIN2, 0);
902 uint16_t BATCODE = ADC_ManualRead();
911 ADC_SetMuxSel(MXC_E_ADC_PGA_MUX_CH_SEL_AIN5, 0);
917 uint16_t CHARGINGCODE = ADC_ManualRead();
922 AFE_ADCVRefDisable();
927 PWR_Disable(MXC_E_PWR_ENABLE_AFE);
930 double RNTC = NTCCODE*2.048/(0.065535*2.0*4.0);
931 double TNTC = 1000000.0/((double)(
NTC_A) + (double)(
NTC_B) * log(RNTC) + (double)
NTC_C * pow(log(RNTC), 3)) - 273.15;
940 *(
packet_0_buf+5) = TNTC>0?(TNTC- (
int)TNTC)*100:((
int)TNTC-TNTC)*100;
942 *(
packet_0_buf+6) = ((uint32_t)ZMAG & 0xFF000000) >> 24;
943 *(
packet_0_buf+7) = ((uint32_t)ZMAG & 0x00FF0000) >> 16;
949 double VBAT = BATCODE * 2.048 * 2.0/65535.0;
1005 DAC_PatternConfig(0,&dac_wave_handle, sine_wave16bit, data_samples16bit,
LOOPS, NULL, NULL);
1006 ADC_CaptureConfig(&adc_capture_handle0,capt_buf0,
CAPT_SAMPLES0, NULL, 0,capt_results, capt_buf0, 1);
1007 ADC_CaptureConfig(&adc_capture_handle1,capt_buf1,
CAPT_SAMPLES0, NULL, 0,capt_results, capt_buf1, 1);
1010 IOMAN_SPI0(MXC_E_IOMAN_MAPPING_A, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0);
1013 CLKMAN_SetClkScale(MXC_E_CLKMAN_CLK_GPIO, MXC_E_CLKMAN_CLK_SCALE_ENABLED);
1016 CLKMAN_SetClkScale(MXC_E_CLKMAN_CLK_SPI0, MXC_E_CLKMAN_CLK_SCALE_ENABLED);
1019 PWR_EnableDevRun(MXC_E_PWR_DEVICE_RTC);
1074 SPI_ConfigClock(&ss, 3, 3, 0, 0, 0, 0);
1079 NVIC_SetPriority(SPI0_IRQn, 2);
1080 NVIC_SetPriority(GPIO_P0_IRQn, 6);
1081 NVIC_SetPriority(TMR0_IRQn, 6);
1089 memset(&tmr32_cfg, 0,
sizeof(tmr32_cfg));
1090 TMR32_PeriodToTicks(10, MXC_E_TMR_PERIOD_UNIT_MILLISEC, &ticks, &prescale);
1091 TMR32_Config(&tmr32_cfg,
TMR0, MXC_E_TMR_MODE_CONTINUOUS, ticks, prescale, 0, 0);
1092 TMR32_Start(&tmr32_cfg, tmr32_led);
1102 PWR_SetMode(MXC_E_PWR_MODE_LP1, NULL);
1104 PWR_SetMode(MXC_E_PWR_MODE_LP2, NULL);