Design Name C:/Users/johann.gualberto/Desktop/active_allegro_projects/max96707_709_evkit_a/max96707_709_evkit_a.brd
Date Thu Jul 16 13:56:29 2015

DRC Error Count Summary
DRC Error Type | DRC Error Count
Pad to Pad | 4
Etch to Pad | 4
Total DRC Errors | 8

Detailed DRC Errors
Constraint Name | DRC Marker Location | Required Value | Actual Value | Constraint Source | Constraint Source Type | Element 1 | Element 2
Thru Pin to SMD Pin Spacing | (1410.00 2591.00) | 5 MIL | OVERLAP | DEFAULT | NET SPACING CONSTRAINTS | Pin "Ct_Sda.2 (Unnamed_5_Ekshort_I68_Pin2)" | Mechanical Pin "Ct_Sda."
Thru Pin to SMD Pin Spacing | (1405.00 2491.00) | 5 MIL | OVERLAP | DEFAULT | NET SPACING CONSTRAINTS | Pin "Ct_Sda.1 (U1_Sda)" | Mechanical Pin "Ct_Sda."
Thru Pin to SMD Pin Spacing | (1240.00 2590.00) | 5 MIL | OVERLAP | DEFAULT | NET SPACING CONSTRAINTS | Pin "Ct_Scl.2 (Unnamed_5_Ekshort_I67_Pin2)" | Mechanical Pin "Ct_Scl."
Thru Pin to SMD Pin Spacing | (1235.00 2490.00) | 5 MIL | OVERLAP | DEFAULT | NET SPACING CONSTRAINTS | Pin "Ct_Scl.1 (U1_Scl)" | Mechanical Pin "Ct_Scl."
Line to SMD Pin Spacing | (1240.00 2490.00) | 7.5 MIL | 0 MIL | DEFAULT | NET SPACING CONSTRAINTS | Mechanical Pin "Ct_Scl." | Odd-angle Line Segment "U1_Scl Etch/Bottom"
Line to SMD Pin Spacing | (1407.50 2491.00) | 7.5 MIL | 0 MIL | DEFAULT | NET SPACING CONSTRAINTS | Mechanical Pin "Ct_Sda." | Horizontal Line Segment "U1_Sda Etch/Bottom"
Line to SMD Pin Spacing | (4345.61 1984.39) | 7.5 MIL | 0 MIL | DEFAULT | NET SPACING CONSTRAINTS | Pin "U23.17 (Gnd_Earth)" | Odd-angle Line Segment "Gnd Etch/Top"
Line to SMD Pin Spacing | (4345.61 1963.98) | 7.5 MIL | 0 MIL | DEFAULT | NET SPACING CONSTRAINTS | Pin "U23.17 (Gnd_Earth)" | Vertical Line Segment "Gnd Etch/Top"