FILE_TYPE = PXL_HDL_CENTRIC_STATE_FILE;
VERSION = PXL_HDL_CENTRIC_VERSION_1;
TIME = '06-Aug-2024 AT 10:21:47.00';

{--------------------------------------------------------------------------}

BEGIN_MODULE: '02_070959B_TOP' = '@02_070959B_LIB.02_070959B_TOP(SCH_1)';
PAGE = '1';

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):ALT_SPI_MISO';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):ALT_SPI_MISO';
PHY_SIGNAL = 'ALT_SPI_MISO';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):ALT_SPI_MOSI';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):ALT_SPI_MOSI';
PHY_SIGNAL = 'ALT_SPI_MOSI';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):ALT_SPI_SCK';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):ALT_SPI_SCK';
PHY_SIGNAL = 'ALT_SPI_SCK';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):SCL';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):SCL';
PHY_SIGNAL = 'SCL';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):SDA';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):SDA';
PHY_SIGNAL = 'SDA';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):SPI_MISO';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):SPI_MISO';
PHY_SIGNAL = 'SPI_MISO';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):SPI_MOSI';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):SPI_MOSI';
PHY_SIGNAL = 'SPI_MOSI';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):SPI_SCK';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):SPI_SCK';
PHY_SIGNAL = 'SPI_SCK';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):SDI';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):SDI';
PHY_SIGNAL = 'SDI';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):SDO';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):SDO';
PHY_SIGNAL = 'SDO';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):SCK';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):SCK';
PHY_SIGNAL = 'SCK';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VIO';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VIO';
PHY_SIGNAL = 'VIO';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):EXT_3V3';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):EXT_3V3';
PHY_SIGNAL = 'EXT_3V3';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VREG';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VREG';
PHY_SIGNAL = 'VREG';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):RESETB';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):RESETB';
PHY_SIGNAL = 'RESETB';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):SYNCB';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):SYNCB';
PHY_SIGNAL = 'SYNCB';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT0';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT0';
PHY_SIGNAL = 'VOUT0';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT1';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT1';
PHY_SIGNAL = 'VOUT1';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT10';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT10';
PHY_SIGNAL = 'VOUT10';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT11';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT11';
PHY_SIGNAL = 'VOUT11';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT12';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT12';
PHY_SIGNAL = 'VOUT12';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT13';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT13';
PHY_SIGNAL = 'VOUT13';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT14';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT14';
PHY_SIGNAL = 'VOUT14';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT15';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT15';
PHY_SIGNAL = 'VOUT15';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT2';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT2';
PHY_SIGNAL = 'VOUT2';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT3';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT3';
PHY_SIGNAL = 'VOUT3';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT4';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT4';
PHY_SIGNAL = 'VOUT4';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT5';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT5';
PHY_SIGNAL = 'VOUT5';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT6';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT6';
PHY_SIGNAL = 'VOUT6';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT7';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT7';
PHY_SIGNAL = 'VOUT7';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT8';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT8';
PHY_SIGNAL = 'VOUT8';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT9';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VOUT9';
PHY_SIGNAL = 'VOUT9';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):AVCC';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):AVCC';
PHY_SIGNAL = 'AVCC';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):AVDD';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):AVDD';
PHY_SIGNAL = 'AVDD';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):AVSS';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):AVSS';
PHY_SIGNAL = 'AVSS';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):MUXOUT';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):MUXOUT';
PHY_SIGNAL = 'MUXOUT';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VREF';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):VREF';
PHY_SIGNAL = 'VREF';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):EXT_AVCC';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):EXT_AVCC';
PHY_SIGNAL = 'EXT_AVCC';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):3V3_SUP';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):3V3_SUP';
PHY_SIGNAL = '3V3_SUP';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):3.3_VIN';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):3.3_VIN';
PHY_SIGNAL = '3.3_VIN';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = 'NC';
LOG_SIGNAL = 'NC';
PHY_SIGNAL = 'NC';
END_SIGNAL;

END_MODULE; { end of module '@02_070959B_LIB.02_070959B_TOP(SCH_1)'}

{--------------------------------------------------------------------------}

BEGIN_MODULE: '02_070959B_TOP' = '@02_070959B_LIB.02_070959B_TOP(SCH_1)';
PAGE = '3';

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I1@CONN_PCB.CN10P(CHIPS)';
LOCATION   = 'P4';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cn10p/chips/chips.prt';
 PART_NAME = 'CN10P_TH-SSQ-110-03-G-S,E020479,CNSAMTECSSQ-110-XX-X-S-CNSAMTECSSQ-110-XX-X-S';
 LONG_PART_NAME = 'CN10P_TH-SSQ-110-03-G-S,E020479,CNSAMTECSSQ-110-XX-X-S-CNSAMTECSSQ-110-XX-X-S';
 PARENT_PPT_PHYS_PART = 'CN10P_TH-SSQ-110-03-G-S,E020479,CNSAMTECSSQ-110-XX-X-S';
 PARENT_PPT = 'CN10P';
 PARENT_PPT_PART = 'CN10P_TH-SSQ-110-03-G-S,E020479,CNSAMTECSSQ-110-XX-X-S';
 PARENT_CHIPS_PHYS_PART = 'CN10P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I2@CONN_PCB.CN8P_A(CHIPS)';
LOCATION   = 'P5';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cn8p_a/chips/chips.prt';
 PART_NAME = 'CN8P_A_TH-SSQ-108-03-G-S,E020478,CNSAMTECSSQ-108-XX-X-S-CNSAMTECSSQ-108-XX-X-S';
 LONG_PART_NAME = 'CN8P_A_TH-SSQ-108-03-G-S,E020478,CNSAMTECSSQ-108-XX-X-S-CNSAMTECSSQ-108-XX-X-S';
 PARENT_PPT_PHYS_PART = 'CN8P_A_TH-SSQ-108-03-G-S,E020478,CNSAMTECSSQ-108-XX-X-S';
 PARENT_PPT = 'CN8P_A';
 PARENT_PPT_PART = 'CN8P_A_TH-SSQ-108-03-G-S,E020478,CNSAMTECSSQ-108-XX-X-S';
 PARENT_CHIPS_PHYS_PART = 'CN8P_A_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I3@CONN_PCB.CN6P(CHIPS)';
LOCATION   = 'P1';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cn6p/chips/chips.prt';
 PART_NAME = 'CN6P_TH-SSQ-106-03-G-S,E020477,CNSAMTECSSQ-106-XX-X-S-CNSAMTECSSQ-106-XX-X-S';
 LONG_PART_NAME = 'CN6P_TH-SSQ-106-03-G-S,E020477,CNSAMTECSSQ-106-XX-X-S-CNSAMTECSSQ-106-XX-X-S';
 PARENT_PPT_PHYS_PART = 'CN6P_TH-SSQ-106-03-G-S,E020477,CNSAMTECSSQ-106-XX-X-S';
 PARENT_PPT = 'CN6P';
 PARENT_PPT_PART = 'CN6P_TH-SSQ-106-03-G-S,E020477,CNSAMTECSSQ-106-XX-X-S';
 PARENT_CHIPS_PHYS_PART = 'CN6P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I4@CONN_PCB.CN8P_A(CHIPS)';
LOCATION   = 'P2';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cn8p_a/chips/chips.prt';
 PART_NAME = 'CN8P_A_TH-SSQ-108-03-G-S,E020478,CNSAMTECSSQ-108-XX-X-S-CNSAMTECSSQ-108-XX-X-S';
 LONG_PART_NAME = 'CN8P_A_TH-SSQ-108-03-G-S,E020478,CNSAMTECSSQ-108-XX-X-S-CNSAMTECSSQ-108-XX-X-S';
 PARENT_PPT_PHYS_PART = 'CN8P_A_TH-SSQ-108-03-G-S,E020478,CNSAMTECSSQ-108-XX-X-S';
 PARENT_PPT = 'CN8P_A';
 PARENT_PPT_PART = 'CN8P_A_TH-SSQ-108-03-G-S,E020478,CNSAMTECSSQ-108-XX-X-S';
 PARENT_CHIPS_PHYS_PART = 'CN8P_A_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I13@RESISTORS.RES(CHIPS)';
LOCATION   = 'R6';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-0,E004207,1/16W,1,R0603-R0603';
 LONG_PART_NAME = 'RES_SM-0,E004207,1/16W,1,R0603-R0603';
 PARENT_PPT_PHYS_PART = 'RES_SM-0,E004207,1/16W,1,R0603';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-0,E004207,1/16W,1,R0603';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I15@RESISTORS.RES(CHIPS)';
LOCATION   = 'R8';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-100K,E018430,1/16W,1,R0603-R0603';
 LONG_PART_NAME = 'RES_SM-100K,E018430,1/16W,1,R0603-R0603';
 PARENT_PPT_PHYS_PART = 'RES_SM-100K,E018430,1/16W,1,R0603';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-100K,E018430,1/16W,1,R0603';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I17@RESISTORS.RES(CHIPS)';
LOCATION   = 'R5';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-100K,E018430,1/16W,1,R0603-R0603';
 LONG_PART_NAME = 'RES_SM-100K,E018430,1/16W,1,R0603-R0603';
 PARENT_PPT_PHYS_PART = 'RES_SM-100K,E018430,1/16W,1,R0603';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-100K,E018430,1/16W,1,R0603';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I18@RESISTORS.RES(CHIPS)';
LOCATION   = 'R7';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-0,E004207,1/16W,1,R0603-R0603';
 LONG_PART_NAME = 'RES_SM-0,E004207,1/16W,1,R0603-R0603';
 PARENT_PPT_PHYS_PART = 'RES_SM-0,E004207,1/16W,1,R0603';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-0,E004207,1/16W,1,R0603';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I22@IC_OTHER.IC24XX32A_V2(CHIPS)';
LOCATION   = 'U1';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/ic_other/ic24xx32a_v2/chips/chips.prt';
 PART_NAME = 'IC24XX32A_V2_SM-24AA32A-I/SN,E034913,SO8-SO8';
 LONG_PART_NAME = 'IC24XX32A_V2_SM-24AA32A-I/SN,E034913,SO8-SO8';
 PARENT_PPT_PHYS_PART = 'IC24XX32A_V2_SM-24AA32A-I/SN,E034913,SO8';
 PARENT_PPT = 'IC24XX32A_V2';
 PARENT_PPT_PART = 'IC24XX32A_V2_SM-24AA32A-I/SN,E034913,SO8';
 PARENT_CHIPS_PHYS_PART = 'IC24XX32A_V2_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I30@RESISTORS.RES(CHIPS)';
LOCATION   = 'R3';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-0,E004207,1/16W,1,R0603-R0603';
 LONG_PART_NAME = 'RES_SM-0,E004207,1/16W,1,R0603-R0603';
 PARENT_PPT_PHYS_PART = 'RES_SM-0,E004207,1/16W,1,R0603';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-0,E004207,1/16W,1,R0603';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I31@RESISTORS.RES(CHIPS)';
LOCATION   = 'R4';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-100K,E018430,1/16W,1,R0603-R0603';
 LONG_PART_NAME = 'RES_SM-100K,E018430,1/16W,1,R0603-R0603';
 PARENT_PPT_PHYS_PART = 'RES_SM-100K,E018430,1/16W,1,R0603';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-100K,E018430,1/16W,1,R0603';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I33@CONN_PCB.CN6P_ODD_EVEN(CHIPS)';
LOCATION   = 'P3';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cn6p_odd_even/chips/chips.prt';
 PART_NAME = 'CN6P_ODD_EVEN_TH-SSQ-103-03-G-D,E020488,CNSAMTECSSQ-103-XX-X-D-CNSAMTECSSQ-103-XX-X-D';
 LONG_PART_NAME = 'CN6P_ODD_EVEN_TH-SSQ-103-03-G-D,E020488,CNSAMTECSSQ-103-XX-X-D-CNSAMTECSSQ-103-XX-X-D';
 PARENT_PPT_PHYS_PART = 'CN6P_ODD_EVEN_TH-SSQ-103-03-G-D,E020488,CNSAMTECSSQ-103-XX-X-D';
 PARENT_PPT = 'CN6P_ODD_EVEN';
 PARENT_PPT_PART = 'CN6P_ODD_EVEN_TH-SSQ-103-03-G-D,E020488,CNSAMTECSSQ-103-XX-X-D';
 PARENT_CHIPS_PHYS_PART = 'CN6P_ODD_EVEN_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I41@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C1';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-0.1UF,16V,10,E028141,C0402-C0402';
 LONG_PART_NAME = 'CAP_SM-0.1UF,16V,10,E028141,C0402-C0402';
 PARENT_PPT_PHYS_PART = 'CAP_SM-0.1UF,16V,10,E028141,C0402';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SM-0.1UF,16V,10,E028141,C0402';
 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I43@CONN_PCB.CN12P(CHIPS)';
LOCATION   = 'P6';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cn12p/chips/chips.prt';
 PART_NAME = 'CN12P_TH-TSW-106-08-G-D,E000735,CNBERG2X6H330LD36-CNBERG2X6H330LD36';
 LONG_PART_NAME = 'CN12P_TH-TSW-106-08-G-D,E000735,CNBERG2X6H330LD36-CNBERG2X6H330LD36';
 PARENT_PPT_PHYS_PART = 'CN12P_TH-TSW-106-08-G-D,E000735,CNBERG2X6H330LD36';
 PARENT_PPT = 'CN12P';
 PARENT_PPT_PART = 'CN12P_TH-TSW-106-08-G-D,E000735,CNBERG2X6H330LD36';
 PARENT_CHIPS_PHYS_PART = 'CN12P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I47@CONN_PCB.CNTP1P(CHIPS)';
LOCATION   = 'AGND';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cntp1p/chips/chips.prt';
 PART_NAME = 'CNTP1P_TH-BLK,E005347,CNKEY5001TP-CNKEY5001TP';
 LONG_PART_NAME = 'CNTP1P_TH-BLK,E005347,CNKEY5001TP-CNKEY5001TP';
 PARENT_PPT_PHYS_PART = 'CNTP1P_TH-BLK,E005347,CNKEY5001TP';
 PARENT_PPT = 'CNTP1P';
 PARENT_PPT_PART = 'CNTP1P_TH-BLK,E005347,CNKEY5001TP';
 PARENT_CHIPS_PHYS_PART = 'CNTP1P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I49@CONN_PCB.CNTP1P(CHIPS)';
LOCATION   = 'DGND';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cntp1p/chips/chips.prt';
 PART_NAME = 'CNTP1P_TH-BLK,E005347,CNKEY5001TP-CNKEY5001TP';
 LONG_PART_NAME = 'CNTP1P_TH-BLK,E005347,CNKEY5001TP-CNKEY5001TP';
 PARENT_PPT_PHYS_PART = 'CNTP1P_TH-BLK,E005347,CNKEY5001TP';
 PARENT_PPT = 'CNTP1P';
 PARENT_PPT_PART = 'CNTP1P_TH-BLK,E005347,CNKEY5001TP';
 PARENT_CHIPS_PHYS_PART = 'CNTP1P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I58@RESISTORS.RES(CHIPS)';
LOCATION   = 'R11';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-100K,E010279,1/10W,1,R0603-R0603';
 LONG_PART_NAME = 'RES_SM-100K,E010279,1/10W,1,R0603-R0603';
 PARENT_PPT_PHYS_PART = 'RES_SM-100K,E010279,1/10W,1,R0603';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-100K,E010279,1/10W,1,R0603';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I59@RESISTORS.RES(CHIPS)';
LOCATION   = 'R12';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-0,E034483,1/10W,JUMPER,R0603-R0603';
 LONG_PART_NAME = 'RES_SM-0,E034483,1/10W,JUMPER,R0603-R0603';
 PARENT_PPT_PHYS_PART = 'RES_SM-0,E034483,1/10W,JUMPER,R0603';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-0,E034483,1/10W,JUMPER,R0603';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I60@RESISTORS.RES(CHIPS)';
LOCATION   = 'R13';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-0,E034483,1/10W,JUMPER,R0603-R0603';
 LONG_PART_NAME = 'RES_SM-0,E034483,1/10W,JUMPER,R0603-R0603';
 PARENT_PPT_PHYS_PART = 'RES_SM-0,E034483,1/10W,JUMPER,R0603';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-0,E034483,1/10W,JUMPER,R0603';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I61@RESISTORS.RES(CHIPS)';
LOCATION   = 'R14';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-100K,E010279,1/10W,1,R0603-R0603';
 LONG_PART_NAME = 'RES_SM-100K,E010279,1/10W,1,R0603-R0603';
 PARENT_PPT_PHYS_PART = 'RES_SM-100K,E010279,1/10W,1,R0603';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-100K,E010279,1/10W,1,R0603';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I62@RESISTORS.RES(CHIPS)';
LOCATION   = 'R1';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-0,E034483,1/10W,JUMPER,R0603-R0603';
 LONG_PART_NAME = 'RES_SM-0,E034483,1/10W,JUMPER,R0603-R0603';
 PARENT_PPT_PHYS_PART = 'RES_SM-0,E034483,1/10W,JUMPER,R0603';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-0,E034483,1/10W,JUMPER,R0603';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I63@RESISTORS.RES(CHIPS)';
LOCATION   = 'R2';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-0,E034483,1/10W,JUMPER,R0603-R0603';
 LONG_PART_NAME = 'RES_SM-0,E034483,1/10W,JUMPER,R0603-R0603';
 PARENT_PPT_PHYS_PART = 'RES_SM-0,E034483,1/10W,JUMPER,R0603';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-0,E034483,1/10W,JUMPER,R0603';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I64@RESISTORS.RES(CHIPS)';
LOCATION   = 'R9';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-0,E034483,1/10W,JUMPER,R0603-R0603';
 LONG_PART_NAME = 'RES_SM-0,E034483,1/10W,JUMPER,R0603-R0603';
 PARENT_PPT_PHYS_PART = 'RES_SM-0,E034483,1/10W,JUMPER,R0603';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-0,E034483,1/10W,JUMPER,R0603';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I66@RESISTORS.RES(CHIPS)';
LOCATION   = 'R15';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-0,E034483,1/10W,JUMPER,R0603-R0603';
 LONG_PART_NAME = 'RES_SM-0,E034483,1/10W,JUMPER,R0603-R0603';
 PARENT_PPT_PHYS_PART = 'RES_SM-0,E034483,1/10W,JUMPER,R0603';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-0,E034483,1/10W,JUMPER,R0603';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I67@RESISTORS.RES(CHIPS)';
LOCATION   = 'R10';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-0,E034483,1/10W,JUMPER,R0603-R0603';
 LONG_PART_NAME = 'RES_SM-0,E034483,1/10W,JUMPER,R0603-R0603';
 PARENT_PPT_PHYS_PART = 'RES_SM-0,E034483,1/10W,JUMPER,R0603';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-0,E034483,1/10W,JUMPER,R0603';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I68@RESISTORS.RES(CHIPS)';
LOCATION   = 'R16';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-0,E034483,1/10W,JUMPER,R0603-R0603';
 LONG_PART_NAME = 'RES_SM-0,E034483,1/10W,JUMPER,R0603-R0603';
 PARENT_PPT_PHYS_PART = 'RES_SM-0,E034483,1/10W,JUMPER,R0603';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-0,E034483,1/10W,JUMPER,R0603';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I74@CONN_PCB.CNTP1P(CHIPS)';
LOCATION   = 'PGND';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cntp1p/chips/chips.prt';
 PART_NAME = 'CNTP1P_TH-BLK,E005347,CNKEY5001TP-CNKEY5001TP';
 LONG_PART_NAME = 'CNTP1P_TH-BLK,E005347,CNKEY5001TP-CNKEY5001TP';
 PARENT_PPT_PHYS_PART = 'CNTP1P_TH-BLK,E005347,CNKEY5001TP';
 PARENT_PPT = 'CNTP1P';
 PARENT_PPT_PART = 'CNTP1P_TH-BLK,E005347,CNKEY5001TP';
 PARENT_CHIPS_PHYS_PART = 'CNTP1P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I75@RESISTORS.RES(CHIPS)';
LOCATION   = 'R17';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-0,E030624,1/8W,N/A,R0805-R0805';
 LONG_PART_NAME = 'RES_SM-0,E030624,1/8W,N/A,R0805-R0805';
 PARENT_PPT_PHYS_PART = 'RES_SM-0,E030624,1/8W,N/A,R0805';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-0,E030624,1/8W,N/A,R0805';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE3_I76@RESISTORS.RES(CHIPS)';
LOCATION   = 'R18';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-0,E030624,1/8W,N/A,R0805-R0805';
 LONG_PART_NAME = 'RES_SM-0,E030624,1/8W,N/A,R0805-R0805';
 PARENT_PPT_PHYS_PART = 'RES_SM-0,E030624,1/8W,N/A,R0805';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-0,E030624,1/8W,N/A,R0805';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PGND';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PGND';
PHY_SIGNAL = 'PGND';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_3_IC24XX32AV2_I22_A1';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_3_IC24XX32AV2_I22_A1';
PHY_SIGNAL = 'UNNAMED_3_IC24XX32AV2_I22_A1';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_3_IC24XX32AV2_I22_A2';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_3_IC24XX32AV2_I22_A2';
PHY_SIGNAL = 'UNNAMED_3_IC24XX32AV2_I22_A2';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_3_RES_I15_N1';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_3_RES_I15_N1';
PHY_SIGNAL = 'UNNAMED_3_RES_I15_N1';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_3_CN10P_I1_N2';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_3_CN10P_I1_N2';
PHY_SIGNAL = 'UNNAMED_3_CN10P_I1_N2';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_3_CN10P_I1_N3';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_3_CN10P_I1_N3';
PHY_SIGNAL = 'UNNAMED_3_CN10P_I1_N3';
END_SIGNAL;

END_MODULE; { end of module '@02_070959B_LIB.02_070959B_TOP(SCH_1)'}

{--------------------------------------------------------------------------}

BEGIN_MODULE: '02_070959B_TOP' = '@02_070959B_LIB.02_070959B_TOP(SCH_1)';
PAGE = '4';

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I1@IC_ADI.ADP5071(CHIPS)';
LOCATION   = 'U2';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/ic_adi/adp5071/chips/chips.prt';
 PART_NAME = 'ADP5071_SM-ADP5071ACPZ,E023943,QFN20_4X4_PAD2_6X2_6-QFN20_4X4_PAD2_6X2_6';
 LONG_PART_NAME = 'ADP5071_SM-ADP5071ACPZ,E023943,QFN20_4X4_PAD2_6X2_6-QFN20_4X4_PAD2_6X2_6';
 PARENT_PPT_PHYS_PART = 'ADP5071_SM-ADP5071ACPZ,E023943,QFN20_4X4_PAD2_6X2_6';
 PARENT_PPT = 'ADP5071';
 PARENT_PPT_PART = 'ADP5071_SM-ADP5071ACPZ,E023943,QFN20_4X4_PAD2_6X2_6';
 PARENT_CHIPS_PHYS_PART = 'ADP5071_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I3@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C3';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-10UF,10V,20,E022682,C0603-C0603';
 LONG_PART_NAME = 'CAP_SM-10UF,10V,20,E022682,C0603-C0603';
 PARENT_PPT_PHYS_PART = 'CAP_SM-10UF,10V,20,E022682,C0603';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SM-10UF,10V,20,E022682,C0603';
 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I4@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C4';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-0.1UF,16V,10,E015036,C0603-C0603';
 LONG_PART_NAME = 'CAP_SM-0.1UF,16V,10,E015036,C0603-C0603';
 PARENT_PPT_PHYS_PART = 'CAP_SM-0.1UF,16V,10,E015036,C0603';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SM-0.1UF,16V,10,E015036,C0603';
 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I6@RESISTORS.RES(CHIPS)';
LOCATION   = 'R19';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-0,E034483,1/10W,JUMPER,R0603-R0603';
 LONG_PART_NAME = 'RES_SM-0,E034483,1/10W,JUMPER,R0603-R0603';
 PARENT_PPT_PHYS_PART = 'RES_SM-0,E034483,1/10W,JUMPER,R0603';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-0,E034483,1/10W,JUMPER,R0603';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I7@RESISTORS.RES(CHIPS)';
LOCATION   = 'R20';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-30.1K,E011129,1/10W,1,R0603-R0603';
 LONG_PART_NAME = 'RES_SM-30.1K,E011129,1/10W,1,R0603-R0603';
 PARENT_PPT_PHYS_PART = 'RES_SM-30.1K,E011129,1/10W,1,R0603';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-30.1K,E011129,1/10W,1,R0603';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I8@RESISTORS.RES(CHIPS)';
LOCATION   = 'R21';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-19.6K,E057809,1/10W,0.5,R0603-R0603';
 LONG_PART_NAME = 'RES_SM-19.6K,E057809,1/10W,0.5,R0603-R0603';
 PARENT_PPT_PHYS_PART = 'RES_SM-19.6K,E057809,1/10W,0.5,R0603';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-19.6K,E057809,1/10W,0.5,R0603';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I12@RESISTORS.RES(CHIPS)';
LOCATION   = 'R22';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-255K,E032891,1/10W,1,R0402-R0402';
 LONG_PART_NAME = 'RES_SM-255K,E032891,1/10W,1,R0402-R0402';
 PARENT_PPT_PHYS_PART = 'RES_SM-255K,E032891,1/10W,1,R0402';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-255K,E032891,1/10W,1,R0402';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I17@RESISTORS.RES(CHIPS)';
LOCATION   = 'R26';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-13.7K,E019610,1/16W,1,R0402-R0402';
 LONG_PART_NAME = 'RES_SM-13.7K,E019610,1/16W,1,R0402-R0402';
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 PARENT_PPT = 'RES';
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 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I19@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C13';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-33PF,50V,5,E035727,C0402-C0402';
 LONG_PART_NAME = 'CAP_SM-33PF,50V,5,E035727,C0402-C0402';
 PARENT_PPT_PHYS_PART = 'CAP_SM-33PF,50V,5,E035727,C0402';
 PARENT_PPT = 'CAP';
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 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I22@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C16';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-0.012UF,50V,5,E012700,C0603-C0603';
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 PARENT_PPT_PHYS_PART = 'CAP_SM-0.012UF,50V,5,E012700,C0603';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SM-0.012UF,50V,5,E012700,C0603';
 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I23@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C15';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-27NF,50V,10,E043191,C0603-C0603';
 LONG_PART_NAME = 'CAP_SM-27NF,50V,10,E043191,C0603-C0603';
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 PARENT_PPT = 'CAP';
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 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I24@CAPACITORS.CAP(CHIPS)';
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SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
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 LONG_PART_NAME = 'CAP_SM-27PF,50V,5,E000395,C0603-C0603';
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 PARENT_PPT = 'CAP';
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 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
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BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-11.8K,E031144,1/10W,1,R0603-R0603';
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 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I28@CAPACITORS.CAP(CHIPS)';
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SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
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 PARENT_PPT_PHYS_PART = 'CAP_SM-1UF,25V,10,E048498,C0603';
 PARENT_PPT = 'CAP';
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 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
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SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
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END_LIB_INFO;
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SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/resjmpr_3p/chips/chips.prt';
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 PARENT_PPT_PHYS_PART = 'RESJMPR_3P_SM-0,E003438,1/10W,JUMPER,3PINJUMPER_0402';
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 PARENT_CHIPS_PHYS_PART = 'RESJMPR_3P_SM';
END_LIB_INFO;
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LOCATION   = 'JP2';
SEC = '1';

BEGIN_LIB_INFO:
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END_LIB_INFO;
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SEC = '1';

BEGIN_LIB_INFO:
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 PART_NAME = 'RESJMPR_3P_SM-0,E003438,1/10W,JUMPER,3PINJUMPER_0402-3PINJUMPER_0402';
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BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/inductors/ind/chips/chips.prt';
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END_LIB_INFO;
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LOCATION   = 'D2';
SEC = '1';

BEGIN_LIB_INFO:
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BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/inductors/ind/chips/chips.prt';
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 PARENT_CHIPS_PHYS_PART = 'IND_SM';
END_LIB_INFO;
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LOCATION   = 'C14';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
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 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
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SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-10UF,10V,20,E022682,C0603-C0603';
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 PARENT_PPT = 'CAP';
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END_LIB_INFO;
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LOCATION   = 'R27';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-82.5K,E024555,1/16W,1,R0402-R0402';
 LONG_PART_NAME = 'RES_SM-82.5K,E024555,1/16W,1,R0402-R0402';
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 PARENT_PPT = 'RES';
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 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
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LOCATION   = 'R28';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-9.09K,E003703,1/10W,1,R0603-R0603';
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 PARENT_PPT = 'RES';
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 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
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LOCATION   = 'D1';
SEC = '1';

BEGIN_LIB_INFO:
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 PARENT_CHIPS_PHYS_PART = 'DIOSCHOTTKY_SM';
END_LIB_INFO;
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LOCATION   = 'L3';
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BEGIN_LIB_INFO:
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LOCATION   = 'C9';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
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END_LIB_INFO;
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LOCATION   = 'R24';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-14.7,E018335,1/16W,1,R0402-R0402';
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 PARENT_PPT_PHYS_PART = 'RES_SM-14.7,E018335,1/16W,1,R0402';
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 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
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LOCATION   = 'L4';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/inductors/ind/chips/chips.prt';
 PART_NAME = 'IND_SM-2.2UH,30,E033604,L1210H67-L1210H67';
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 PARENT_PPT_PHYS_PART = 'IND_SM-2.2UH,30,E033604,L1210H67';
 PARENT_PPT = 'IND';
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 PARENT_CHIPS_PHYS_PART = 'IND_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I58@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C12';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-10UF,10V,20,E022682,C0603-C0603';
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 PARENT_PPT_PHYS_PART = 'CAP_SM-10UF,10V,20,E022682,C0603';
 PARENT_PPT = 'CAP';
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 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
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LOCATION   = 'R23';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-3.57K,E007344,1/10W,1,R0402-R0402';
 LONG_PART_NAME = 'RES_SM-3.57K,E007344,1/10W,1,R0402-R0402';
 PARENT_PPT_PHYS_PART = 'RES_SM-3.57K,E007344,1/10W,1,R0402';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-3.57K,E007344,1/10W,1,R0402';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I63@RESISTORS.RES(CHIPS)';
LOCATION   = 'R29';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-102K,E020517,1/10W,1,R0402-R0402';
 LONG_PART_NAME = 'RES_SM-102K,E020517,1/10W,1,R0402-R0402';
 PARENT_PPT_PHYS_PART = 'RES_SM-102K,E020517,1/10W,1,R0402';
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 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I64@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C18';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-1UF,25V,10,E048498,C0603-C0603';
 LONG_PART_NAME = 'CAP_SM-1UF,25V,10,E048498,C0603-C0603';
 PARENT_PPT_PHYS_PART = 'CAP_SM-1UF,25V,10,E048498,C0603';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SM-1UF,25V,10,E048498,C0603';
 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I66@CONN_PCB.CN2P(CHIPS)';
LOCATION   = 'P7';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cn2p/chips/chips.prt';
 PART_NAME = 'CN2P_TH-691102710002,E048111,CNWURTH691102710002-CNWURTH691102710002';
 LONG_PART_NAME = 'CN2P_TH-691102710002,E048111,CNWURTH691102710002-CNWURTH691102710002';
 PARENT_PPT_PHYS_PART = 'CN2P_TH-691102710002,E048111,CNWURTH691102710002';
 PARENT_PPT = 'CN2P';
 PARENT_PPT_PART = 'CN2P_TH-691102710002,E048111,CNWURTH691102710002';
 PARENT_CHIPS_PHYS_PART = 'CN2P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I74@INDUCTORS.IND(CHIPS)';
LOCATION   = 'L1';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/inductors/ind/chips/chips.prt';
 PART_NAME = 'IND_SM-2.2UH,30,E033604,L1210H67-L1210H67';
 LONG_PART_NAME = 'IND_SM-2.2UH,30,E033604,L1210H67-L1210H67';
 PARENT_PPT_PHYS_PART = 'IND_SM-2.2UH,30,E033604,L1210H67';
 PARENT_PPT = 'IND';
 PARENT_PPT_PART = 'IND_SM-2.2UH,30,E033604,L1210H67';
 PARENT_CHIPS_PHYS_PART = 'IND_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I75@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C2';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-10UF,10V,20,E022682,C0603-C0603';
 LONG_PART_NAME = 'CAP_SM-10UF,10V,20,E022682,C0603-C0603';
 PARENT_PPT_PHYS_PART = 'CAP_SM-10UF,10V,20,E022682,C0603';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SM-10UF,10V,20,E022682,C0603';
 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I76@CONN_PCB.CN2P(CHIPS)';
LOCATION   = 'EXT_AVCC';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cn2p/chips/chips.prt';
 PART_NAME = 'CN2P_TH-691102710002,E048111,CNWURTH691102710002-CNWURTH691102710002';
 LONG_PART_NAME = 'CN2P_TH-691102710002,E048111,CNWURTH691102710002-CNWURTH691102710002';
 PARENT_PPT_PHYS_PART = 'CN2P_TH-691102710002,E048111,CNWURTH691102710002';
 PARENT_PPT = 'CN2P';
 PARENT_PPT_PART = 'CN2P_TH-691102710002,E048111,CNWURTH691102710002';
 PARENT_CHIPS_PHYS_PART = 'CN2P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I86@CONN_PCB.CNTP1P(CHIPS)';
LOCATION   = 'AVDD';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cntp1p/chips/chips.prt';
 PART_NAME = 'CNTP1P_TH-RED,E016323,CNKEY5001TP-CNKEY5001TP';
 LONG_PART_NAME = 'CNTP1P_TH-RED,E016323,CNKEY5001TP-CNKEY5001TP';
 PARENT_PPT_PHYS_PART = 'CNTP1P_TH-RED,E016323,CNKEY5001TP';
 PARENT_PPT = 'CNTP1P';
 PARENT_PPT_PART = 'CNTP1P_TH-RED,E016323,CNKEY5001TP';
 PARENT_CHIPS_PHYS_PART = 'CNTP1P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I87@CONN_PCB.CNTP1P(CHIPS)';
LOCATION   = 'AVSS';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cntp1p/chips/chips.prt';
 PART_NAME = 'CNTP1P_TH-RED,E016323,CNKEY5001TP-CNKEY5001TP';
 LONG_PART_NAME = 'CNTP1P_TH-RED,E016323,CNKEY5001TP-CNKEY5001TP';
 PARENT_PPT_PHYS_PART = 'CNTP1P_TH-RED,E016323,CNKEY5001TP';
 PARENT_PPT = 'CNTP1P';
 PARENT_PPT_PART = 'CNTP1P_TH-RED,E016323,CNKEY5001TP';
 PARENT_CHIPS_PHYS_PART = 'CNTP1P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I88@CONN_PCB.CNTP1P(CHIPS)';
LOCATION   = 'AVCC';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cntp1p/chips/chips.prt';
 PART_NAME = 'CNTP1P_TH-RED,E016323,CNKEY5001TP-CNKEY5001TP';
 LONG_PART_NAME = 'CNTP1P_TH-RED,E016323,CNKEY5001TP-CNKEY5001TP';
 PARENT_PPT_PHYS_PART = 'CNTP1P_TH-RED,E016323,CNKEY5001TP';
 PARENT_PPT = 'CNTP1P';
 PARENT_PPT_PART = 'CNTP1P_TH-RED,E016323,CNKEY5001TP';
 PARENT_CHIPS_PHYS_PART = 'CNTP1P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I90@CONN_PCB.CNTP1P(CHIPS)';
LOCATION   = 'VREF';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cntp1p/chips/chips.prt';
 PART_NAME = 'CNTP1P_TH-RED,E016323,CNKEY5001TP-CNKEY5001TP';
 LONG_PART_NAME = 'CNTP1P_TH-RED,E016323,CNKEY5001TP-CNKEY5001TP';
 PARENT_PPT_PHYS_PART = 'CNTP1P_TH-RED,E016323,CNKEY5001TP';
 PARENT_PPT = 'CNTP1P';
 PARENT_PPT_PART = 'CNTP1P_TH-RED,E016323,CNKEY5001TP';
 PARENT_CHIPS_PHYS_PART = 'CNTP1P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I93@CONN_PCB.CNBNC5P(CHIPS)';
LOCATION   = 'J1';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cnbnc5p/chips/chips.prt';
 PART_NAME = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261-CNJOHNSON131-3701-261';
 LONG_PART_NAME = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261-CNJOHNSON131-3701-261';
 PARENT_PPT_PHYS_PART = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261';
 PARENT_PPT = 'CNBNC5P';
 PARENT_PPT_PART = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261';
 PARENT_CHIPS_PHYS_PART = 'CNBNC5P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I94@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C8';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-1UF,16V,10,E020111,C0603-C0603';
 LONG_PART_NAME = 'CAP_SM-1UF,16V,10,E020111,C0603-C0603';
 PARENT_PPT_PHYS_PART = 'CAP_SM-1UF,16V,10,E020111,C0603';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SM-1UF,16V,10,E020111,C0603';
 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I96@IC_ADI.ADR45XX_V2(CHIPS)';
LOCATION   = 'U3';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/ic_adi/adr45xx_v2/chips/chips.prt';
 PART_NAME = 'ADR45XX_V2_SM-ADR4525DEZ,E055648,LCC8-LCC8';
 LONG_PART_NAME = 'ADR45XX_V2_SM-ADR4525DEZ,E055648,LCC8-LCC8';
 PARENT_PPT_PHYS_PART = 'ADR45XX_V2_SM-ADR4525DEZ,E055648,LCC8';
 PARENT_PPT = 'ADR45XX_V2';
 PARENT_PPT_PART = 'ADR45XX_V2_SM-ADR4525DEZ,E055648,LCC8';
 PARENT_CHIPS_PHYS_PART = 'ADR45XX_V2_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I97@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C7';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-0.1UF,50V,10,E031401,C0603-C0603';
 LONG_PART_NAME = 'CAP_SM-0.1UF,50V,10,E031401,C0603-C0603';
 PARENT_PPT_PHYS_PART = 'CAP_SM-0.1UF,50V,10,E031401,C0603';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SM-0.1UF,50V,10,E031401,C0603';
 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I104@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C10';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-10UF,10V,20,E022682,C0603-C0603';
 LONG_PART_NAME = 'CAP_SM-10UF,10V,20,E022682,C0603-C0603';
 PARENT_PPT_PHYS_PART = 'CAP_SM-10UF,10V,20,E022682,C0603';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SM-10UF,10V,20,E022682,C0603';
 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I111@RESISTORS.RESJMPRSHRT(CHIPS)';
LOCATION   = 'JP4';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/resjmprshrt/chips/chips.prt';
 PART_NAME = 'RESJMPRSHRT_SM-0,E003438,1/10W,JUMPER,R0402-R0402';
 LONG_PART_NAME = 'RESJMPRSHRT_SM-0,E003438,1/10W,JUMPER,R0402-R0402';
 PARENT_PPT_PHYS_PART = 'RESJMPRSHRT_SM-0,E003438,1/10W,JUMPER,R0402';
 PARENT_PPT = 'RESJMPRSHRT';
 PARENT_PPT_PART = 'RESJMPRSHRT_SM-0,E003438,1/10W,JUMPER,R0402';
 PARENT_CHIPS_PHYS_PART = 'RESJMPRSHRT_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I112@CONN_PCB.CN3P(CHIPS)';
LOCATION   = 'P8';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cn3p/chips/chips.prt';
 PART_NAME = 'CN3P_TH-1727023,E015204,CNHDR1X3H335-CNHDR1X3H335';
 LONG_PART_NAME = 'CN3P_TH-1727023,E015204,CNHDR1X3H335-CNHDR1X3H335';
 PARENT_PPT_PHYS_PART = 'CN3P_TH-1727023,E015204,CNHDR1X3H335';
 PARENT_PPT = 'CN3P';
 PARENT_PPT_PART = 'CN3P_TH-1727023,E015204,CNHDR1X3H335';
 PARENT_CHIPS_PHYS_PART = 'CN3P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I114@CONN_PCB.CN3P(CHIPS)';
LOCATION   = 'PWR_SEL';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cn3p/chips/chips.prt';
 PART_NAME = 'CN3P_TH-HTSW-103-07-G-S,E031503,CNTHMHDR1X3L300W98H343-CNTHMHDR1X3L300W98H343';
 LONG_PART_NAME = 'CN3P_TH-HTSW-103-07-G-S,E031503,CNTHMHDR1X3L300W98H343-CNTHMHDR1X3L300W98H343';
 PARENT_PPT_PHYS_PART = 'CN3P_TH-HTSW-103-07-G-S,E031503,CNTHMHDR1X3L300W98H343';
 PARENT_PPT = 'CN3P';
 PARENT_PPT_PART = 'CN3P_TH-HTSW-103-07-G-S,E031503,CNTHMHDR1X3L300W98H343';
 PARENT_CHIPS_PHYS_PART = 'CN3P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I115@CONN_PCB.CN3P(CHIPS)';
LOCATION   = 'AVDD_SEL';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cn3p/chips/chips.prt';
 PART_NAME = 'CN3P_TH-HTSW-103-07-G-S,E031503,CNTHMHDR1X3L300W98H343-CNTHMHDR1X3L300W98H343';
 LONG_PART_NAME = 'CN3P_TH-HTSW-103-07-G-S,E031503,CNTHMHDR1X3L300W98H343-CNTHMHDR1X3L300W98H343';
 PARENT_PPT_PHYS_PART = 'CN3P_TH-HTSW-103-07-G-S,E031503,CNTHMHDR1X3L300W98H343';
 PARENT_PPT = 'CN3P';
 PARENT_PPT_PART = 'CN3P_TH-HTSW-103-07-G-S,E031503,CNTHMHDR1X3L300W98H343';
 PARENT_CHIPS_PHYS_PART = 'CN3P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I116@CONN_PCB.CN3P(CHIPS)';
LOCATION   = 'AVSS_SEL';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cn3p/chips/chips.prt';
 PART_NAME = 'CN3P_TH-HTSW-103-07-G-S,E031503,CNTHMHDR1X3L300W98H343-CNTHMHDR1X3L300W98H343';
 LONG_PART_NAME = 'CN3P_TH-HTSW-103-07-G-S,E031503,CNTHMHDR1X3L300W98H343-CNTHMHDR1X3L300W98H343';
 PARENT_PPT_PHYS_PART = 'CN3P_TH-HTSW-103-07-G-S,E031503,CNTHMHDR1X3L300W98H343';
 PARENT_PPT = 'CN3P';
 PARENT_PPT_PART = 'CN3P_TH-HTSW-103-07-G-S,E031503,CNTHMHDR1X3L300W98H343';
 PARENT_CHIPS_PHYS_PART = 'CN3P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I117@CONN_PCB.CN3P(CHIPS)';
LOCATION   = 'REF_SEL';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cn3p/chips/chips.prt';
 PART_NAME = 'CN3P_TH-HTSW-103-07-G-S,E031503,CNTHMHDR1X3L300W98H343-CNTHMHDR1X3L300W98H343';
 LONG_PART_NAME = 'CN3P_TH-HTSW-103-07-G-S,E031503,CNTHMHDR1X3L300W98H343-CNTHMHDR1X3L300W98H343';
 PARENT_PPT_PHYS_PART = 'CN3P_TH-HTSW-103-07-G-S,E031503,CNTHMHDR1X3L300W98H343';
 PARENT_PPT = 'CN3P';
 PARENT_PPT_PART = 'CN3P_TH-HTSW-103-07-G-S,E031503,CNTHMHDR1X3L300W98H343';
 PARENT_CHIPS_PHYS_PART = 'CN3P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE4_I118@CONN_PCB.CN3P(CHIPS)';
LOCATION   = 'AVCC_SEL';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cn3p/chips/chips.prt';
 PART_NAME = 'CN3P_TH-HTSW-103-07-G-S,E031503,CNTHMHDR1X3L300W98H343-CNTHMHDR1X3L300W98H343';
 LONG_PART_NAME = 'CN3P_TH-HTSW-103-07-G-S,E031503,CNTHMHDR1X3L300W98H343-CNTHMHDR1X3L300W98H343';
 PARENT_PPT_PHYS_PART = 'CN3P_TH-HTSW-103-07-G-S,E031503,CNTHMHDR1X3L300W98H343';
 PARENT_PPT = 'CN3P';
 PARENT_PPT_PART = 'CN3P_TH-HTSW-103-07-G-S,E031503,CNTHMHDR1X3L300W98H343';
 PARENT_CHIPS_PHYS_PART = 'CN3P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADP5071_I1_COMP1';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADP5071_I1_COMP1';
PHY_SIGNAL = 'UNNAMED_4_ADP5071_I1_COMP1';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADP5071_I1_COMP2';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADP5071_I1_COMP2';
PHY_SIGNAL = 'UNNAMED_4_ADP5071_I1_COMP2';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADP5071_I1_EN1';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADP5071_I1_EN1';
PHY_SIGNAL = 'UNNAMED_4_ADP5071_I1_EN1';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADP5071_I1_SEQ';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADP5071_I1_SEQ';
PHY_SIGNAL = 'UNNAMED_4_ADP5071_I1_SEQ';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADP5071_I1_SLEW';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADP5071_I1_SLEW';
PHY_SIGNAL = 'UNNAMED_4_ADP5071_I1_SLEW';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADP5071_I1_SS';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADP5071_I1_SS';
PHY_SIGNAL = 'UNNAMED_4_ADP5071_I1_SS';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADP5071_I1_SYNC';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADP5071_I1_SYNC';
PHY_SIGNAL = 'UNNAMED_4_ADP5071_I1_SYNC';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_CAP_I22_N1';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_CAP_I22_N1';
PHY_SIGNAL = 'UNNAMED_4_CAP_I22_N1';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_CAP_I23_N1';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_CAP_I23_N1';
PHY_SIGNAL = 'UNNAMED_4_CAP_I23_N1';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_CAP_I3_N1';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_CAP_I3_N1';
PHY_SIGNAL = 'UNNAMED_4_CAP_I3_N1';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADP5071_I1_FB1';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADP5071_I1_FB1';
PHY_SIGNAL = 'UNNAMED_4_ADP5071_I1_FB1';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADP5071_I1_INBK';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADP5071_I1_INBK';
PHY_SIGNAL = 'UNNAMED_4_ADP5071_I1_INBK';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADP5071_I1_SW2';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADP5071_I1_SW2';
PHY_SIGNAL = 'UNNAMED_4_ADP5071_I1_SW2';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_CAP_I54_N1';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_CAP_I54_N1';
PHY_SIGNAL = 'UNNAMED_4_CAP_I54_N1';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_DIOSCHOTTKY_I39_N';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_DIOSCHOTTKY_I39_N';
PHY_SIGNAL = 'UNNAMED_4_DIOSCHOTTKY_I39_N';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_DIOSCHOTTKY_I39_P';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_DIOSCHOTTKY_I39_P';
PHY_SIGNAL = 'UNNAMED_4_DIOSCHOTTKY_I39_P';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADP5071_I1_FB2';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADP5071_I1_FB2';
PHY_SIGNAL = 'UNNAMED_4_ADP5071_I1_FB2';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADP5071_I1_VREF';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADP5071_I1_VREF';
PHY_SIGNAL = 'UNNAMED_4_ADP5071_I1_VREF';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_CAP_I75_N1';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_CAP_I75_N1';
PHY_SIGNAL = 'UNNAMED_4_CAP_I75_N1';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_CAP_I43_N1';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_CAP_I43_N1';
PHY_SIGNAL = 'UNNAMED_4_CAP_I43_N1';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_CAP_I58_N1';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_CAP_I58_N1';
PHY_SIGNAL = 'UNNAMED_4_CAP_I58_N1';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADR45XXV2_I96_VIN';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADR45XXV2_I96_VIN';
PHY_SIGNAL = 'UNNAMED_4_ADR45XXV2_I96_VIN';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADR45XXV2_I96_VOUTFORCE';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_ADR45XXV2_I96_VOUTFORCE';
PHY_SIGNAL = 'UNNAMED_4_ADR45XXV2_I96_VOUTFORCE';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_CN3P_I112_N1';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_CN3P_I112_N1';
PHY_SIGNAL = 'UNNAMED_4_CN3P_I112_N1';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_CN3P_I112_N3';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_CN3P_I112_N3';
PHY_SIGNAL = 'UNNAMED_4_CN3P_I112_N3';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_CN3P_I117_N1';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_4_CN3P_I117_N1';
PHY_SIGNAL = 'UNNAMED_4_CN3P_I117_N1';
END_SIGNAL;

END_MODULE; { end of module '@02_070959B_LIB.02_070959B_TOP(SCH_1)'}

{--------------------------------------------------------------------------}

BEGIN_MODULE: '02_070959B_TOP' = '@02_070959B_LIB.02_070959B_TOP(SCH_1)';
PAGE = '5';

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I5@RESISTORS.RES(CHIPS)';
LOCATION   = 'R30';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-1K,E003415,1/8W,1,R0805-R0805';
 LONG_PART_NAME = 'RES_SM-1K,E003415,1/8W,1,R0805-R0805';
 PARENT_PPT_PHYS_PART = 'RES_SM-1K,E003415,1/8W,1,R0805';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-1K,E003415,1/8W,1,R0805';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I6@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C19';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-10NF,200V,10,E042770,C0805-2-C0805-2';
 LONG_PART_NAME = 'CAP_SM-10NF,200V,10,E042770,C0805-2-C0805-2';
 PARENT_PPT_PHYS_PART = 'CAP_SM-10NF,200V,10,E042770,C0805-2';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SM-10NF,200V,10,E042770,C0805-2';
 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I7@CONN_PCB.CNBNC5P(CHIPS)';
LOCATION   = 'J2';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cnbnc5p/chips/chips.prt';
 PART_NAME = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261-CNJOHNSON131-3701-261';
 LONG_PART_NAME = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261-CNJOHNSON131-3701-261';
 PARENT_PPT_PHYS_PART = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261';
 PARENT_PPT = 'CNBNC5P';
 PARENT_PPT_PART = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261';
 PARENT_CHIPS_PHYS_PART = 'CNBNC5P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I9@CONN_PCB.CNBNC5P(CHIPS)';
LOCATION   = 'J3';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cnbnc5p/chips/chips.prt';
 PART_NAME = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261-CNJOHNSON131-3701-261';
 LONG_PART_NAME = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261-CNJOHNSON131-3701-261';
 PARENT_PPT_PHYS_PART = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261';
 PARENT_PPT = 'CNBNC5P';
 PARENT_PPT_PART = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261';
 PARENT_CHIPS_PHYS_PART = 'CNBNC5P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I11@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C20';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-10NF,200V,10,E042770,C0805-2-C0805-2';
 LONG_PART_NAME = 'CAP_SM-10NF,200V,10,E042770,C0805-2-C0805-2';
 PARENT_PPT_PHYS_PART = 'CAP_SM-10NF,200V,10,E042770,C0805-2';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SM-10NF,200V,10,E042770,C0805-2';
 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I14@RESISTORS.RES(CHIPS)';
LOCATION   = 'R31';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-1K,E003415,1/8W,1,R0805-R0805';
 LONG_PART_NAME = 'RES_SM-1K,E003415,1/8W,1,R0805-R0805';
 PARENT_PPT_PHYS_PART = 'RES_SM-1K,E003415,1/8W,1,R0805';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-1K,E003415,1/8W,1,R0805';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I16@CONN_PCB.CNBNC5P(CHIPS)';
LOCATION   = 'J4';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cnbnc5p/chips/chips.prt';
 PART_NAME = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261-CNJOHNSON131-3701-261';
 LONG_PART_NAME = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261-CNJOHNSON131-3701-261';
 PARENT_PPT_PHYS_PART = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261';
 PARENT_PPT = 'CNBNC5P';
 PARENT_PPT_PART = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261';
 PARENT_CHIPS_PHYS_PART = 'CNBNC5P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I18@CONN_PCB.CNBNC5P(CHIPS)';
LOCATION   = 'J5';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cnbnc5p/chips/chips.prt';
 PART_NAME = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261-CNJOHNSON131-3701-261';
 LONG_PART_NAME = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261-CNJOHNSON131-3701-261';
 PARENT_PPT_PHYS_PART = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261';
 PARENT_PPT = 'CNBNC5P';
 PARENT_PPT_PART = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261';
 PARENT_CHIPS_PHYS_PART = 'CNBNC5P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I20@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C21';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-10NF,200V,10,E042770,C0805-2-C0805-2';
 LONG_PART_NAME = 'CAP_SM-10NF,200V,10,E042770,C0805-2-C0805-2';
 PARENT_PPT_PHYS_PART = 'CAP_SM-10NF,200V,10,E042770,C0805-2';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SM-10NF,200V,10,E042770,C0805-2';
 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I24@RESISTORS.RES(CHIPS)';
LOCATION   = 'R32';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-1K,E003415,1/8W,1,R0805-R0805';
 LONG_PART_NAME = 'RES_SM-1K,E003415,1/8W,1,R0805-R0805';
 PARENT_PPT_PHYS_PART = 'RES_SM-1K,E003415,1/8W,1,R0805';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-1K,E003415,1/8W,1,R0805';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I26@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C22';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-10NF,200V,10,E042770,C0805-2-C0805-2';
 LONG_PART_NAME = 'CAP_SM-10NF,200V,10,E042770,C0805-2-C0805-2';
 PARENT_PPT_PHYS_PART = 'CAP_SM-10NF,200V,10,E042770,C0805-2';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SM-10NF,200V,10,E042770,C0805-2';
 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I28@RESISTORS.RES(CHIPS)';
LOCATION   = 'R33';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-1K,E003415,1/8W,1,R0805-R0805';
 LONG_PART_NAME = 'RES_SM-1K,E003415,1/8W,1,R0805-R0805';
 PARENT_PPT_PHYS_PART = 'RES_SM-1K,E003415,1/8W,1,R0805';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-1K,E003415,1/8W,1,R0805';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I30@CONN_PCB.CNBNC5P(CHIPS)';
LOCATION   = 'J6';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cnbnc5p/chips/chips.prt';
 PART_NAME = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261-CNJOHNSON131-3701-261';
 LONG_PART_NAME = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261-CNJOHNSON131-3701-261';
 PARENT_PPT_PHYS_PART = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261';
 PARENT_PPT = 'CNBNC5P';
 PARENT_PPT_PART = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261';
 PARENT_CHIPS_PHYS_PART = 'CNBNC5P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I32@CONN_PCB.CNBNC5P(CHIPS)';
LOCATION   = 'J7';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cnbnc5p/chips/chips.prt';
 PART_NAME = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261-CNJOHNSON131-3701-261';
 LONG_PART_NAME = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261-CNJOHNSON131-3701-261';
 PARENT_PPT_PHYS_PART = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261';
 PARENT_PPT = 'CNBNC5P';
 PARENT_PPT_PART = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261';
 PARENT_CHIPS_PHYS_PART = 'CNBNC5P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I34@CONN_PCB.CNBNC5P(CHIPS)';
LOCATION   = 'J8';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cnbnc5p/chips/chips.prt';
 PART_NAME = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261-CNJOHNSON131-3701-261';
 LONG_PART_NAME = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261-CNJOHNSON131-3701-261';
 PARENT_PPT_PHYS_PART = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261';
 PARENT_PPT = 'CNBNC5P';
 PARENT_PPT_PART = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261';
 PARENT_CHIPS_PHYS_PART = 'CNBNC5P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I36@CONN_PCB.CNBNC5P(CHIPS)';
LOCATION   = 'J9';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cnbnc5p/chips/chips.prt';
 PART_NAME = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261-CNJOHNSON131-3701-261';
 LONG_PART_NAME = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261-CNJOHNSON131-3701-261';
 PARENT_PPT_PHYS_PART = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261';
 PARENT_PPT = 'CNBNC5P';
 PARENT_PPT_PART = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261';
 PARENT_CHIPS_PHYS_PART = 'CNBNC5P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I38@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C31';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-10NF,200V,10,E042770,C0805-2-C0805-2';
 LONG_PART_NAME = 'CAP_SM-10NF,200V,10,E042770,C0805-2-C0805-2';
 PARENT_PPT_PHYS_PART = 'CAP_SM-10NF,200V,10,E042770,C0805-2';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SM-10NF,200V,10,E042770,C0805-2';
 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I42@RESISTORS.RES(CHIPS)';
LOCATION   = 'R38';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-1K,E003415,1/8W,1,R0805-R0805';
 LONG_PART_NAME = 'RES_SM-1K,E003415,1/8W,1,R0805-R0805';
 PARENT_PPT_PHYS_PART = 'RES_SM-1K,E003415,1/8W,1,R0805';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-1K,E003415,1/8W,1,R0805';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I44@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C32';
SEC = '1';

BEGIN_LIB_INFO:
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 PARENT_PPT_PHYS_PART = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261';
 PARENT_PPT = 'CNBNC5P';
 PARENT_PPT_PART = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261';
 PARENT_CHIPS_PHYS_PART = 'CNBNC5P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I99@RESISTORS.RES(CHIPS)';
LOCATION   = 'R47';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-1K,E003415,1/8W,1,R0805-R0805';
 LONG_PART_NAME = 'RES_SM-1K,E003415,1/8W,1,R0805-R0805';
 PARENT_PPT_PHYS_PART = 'RES_SM-1K,E003415,1/8W,1,R0805';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-1K,E003415,1/8W,1,R0805';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I101@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C39';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-10NF,200V,10,E042770,C0805-2-C0805-2';
 LONG_PART_NAME = 'CAP_SM-10NF,200V,10,E042770,C0805-2-C0805-2';
 PARENT_PPT_PHYS_PART = 'CAP_SM-10NF,200V,10,E042770,C0805-2';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SM-10NF,200V,10,E042770,C0805-2';
 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I103@RESISTORS.RES(CHIPS)';
LOCATION   = 'R48';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-1K,E003415,1/8W,1,R0805-R0805';
 LONG_PART_NAME = 'RES_SM-1K,E003415,1/8W,1,R0805-R0805';
 PARENT_PPT_PHYS_PART = 'RES_SM-1K,E003415,1/8W,1,R0805';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-1K,E003415,1/8W,1,R0805';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I110@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C40';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-10NF,200V,10,E042770,C0805-2-C0805-2';
 LONG_PART_NAME = 'CAP_SM-10NF,200V,10,E042770,C0805-2-C0805-2';
 PARENT_PPT_PHYS_PART = 'CAP_SM-10NF,200V,10,E042770,C0805-2';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SM-10NF,200V,10,E042770,C0805-2';
 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I115@CONN_PCB.CNBNC5P(CHIPS)';
LOCATION   = 'N0';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cnbnc5p/chips/chips.prt';
 PART_NAME = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261-CNJOHNSON131-3701-261';
 LONG_PART_NAME = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261-CNJOHNSON131-3701-261';
 PARENT_PPT_PHYS_PART = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261';
 PARENT_PPT = 'CNBNC5P';
 PARENT_PPT_PART = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261';
 PARENT_CHIPS_PHYS_PART = 'CNBNC5P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I116@CONN_PCB.CNBNC5P(CHIPS)';
LOCATION   = 'N1';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cnbnc5p/chips/chips.prt';
 PART_NAME = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261-CNJOHNSON131-3701-261';
 LONG_PART_NAME = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261-CNJOHNSON131-3701-261';
 PARENT_PPT_PHYS_PART = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261';
 PARENT_PPT = 'CNBNC5P';
 PARENT_PPT_PART = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261';
 PARENT_CHIPS_PHYS_PART = 'CNBNC5P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I120@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C23';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-10UF,10V,20,E022682,C0603-C0603';
 LONG_PART_NAME = 'CAP_SM-10UF,10V,20,E022682,C0603-C0603';
 PARENT_PPT_PHYS_PART = 'CAP_SM-10UF,10V,20,E022682,C0603';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SM-10UF,10V,20,E022682,C0603';
 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I121@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C25';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-0.1UF,16V,10,E015036,C0603-C0603';
 LONG_PART_NAME = 'CAP_SM-0.1UF,16V,10,E015036,C0603-C0603';
 PARENT_PPT_PHYS_PART = 'CAP_SM-0.1UF,16V,10,E015036,C0603';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SM-0.1UF,16V,10,E015036,C0603';
 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I122@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C29';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-0.1UF,16V,10,E015036,C0603-C0603';
 LONG_PART_NAME = 'CAP_SM-0.1UF,16V,10,E015036,C0603-C0603';
 PARENT_PPT_PHYS_PART = 'CAP_SM-0.1UF,16V,10,E015036,C0603';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SM-0.1UF,16V,10,E015036,C0603';
 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I123@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C27';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-10UF,10V,20,E022682,C0603-C0603';
 LONG_PART_NAME = 'CAP_SM-10UF,10V,20,E022682,C0603-C0603';
 PARENT_PPT_PHYS_PART = 'CAP_SM-10UF,10V,20,E022682,C0603';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SM-10UF,10V,20,E022682,C0603';
 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I126@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C24';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-10UF,10V,20,E022682,C0603-C0603';
 LONG_PART_NAME = 'CAP_SM-10UF,10V,20,E022682,C0603-C0603';
 PARENT_PPT_PHYS_PART = 'CAP_SM-10UF,10V,20,E022682,C0603';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SM-10UF,10V,20,E022682,C0603';
 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I127@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C26';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-0.1UF,16V,10,E015036,C0603-C0603';
 LONG_PART_NAME = 'CAP_SM-0.1UF,16V,10,E015036,C0603-C0603';
 PARENT_PPT_PHYS_PART = 'CAP_SM-0.1UF,16V,10,E015036,C0603';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SM-0.1UF,16V,10,E015036,C0603';
 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I129@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C28';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-10UF,10V,20,E022682,C0603-C0603';
 LONG_PART_NAME = 'CAP_SM-10UF,10V,20,E022682,C0603-C0603';
 PARENT_PPT_PHYS_PART = 'CAP_SM-10UF,10V,20,E022682,C0603';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SM-10UF,10V,20,E022682,C0603';
 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I130@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C30';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-0.1UF,16V,10,E015036,C0603-C0603';
 LONG_PART_NAME = 'CAP_SM-0.1UF,16V,10,E015036,C0603-C0603';
 PARENT_PPT_PHYS_PART = 'CAP_SM-0.1UF,16V,10,E015036,C0603';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SM-0.1UF,16V,10,E015036,C0603';
 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I131@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C36';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-0.1UF,16V,10,E015036,C0603-C0603';
 LONG_PART_NAME = 'CAP_SM-0.1UF,16V,10,E015036,C0603-C0603';
 PARENT_PPT_PHYS_PART = 'CAP_SM-0.1UF,16V,10,E015036,C0603';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SM-0.1UF,16V,10,E015036,C0603';
 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I132@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C35';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-10UF,10V,20,E022682,C0603-C0603';
 LONG_PART_NAME = 'CAP_SM-10UF,10V,20,E022682,C0603-C0603';
 PARENT_PPT_PHYS_PART = 'CAP_SM-10UF,10V,20,E022682,C0603';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SM-10UF,10V,20,E022682,C0603';
 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I134@CONN_PCB.CNBNC5P(CHIPS)';
LOCATION   = 'MUXOUT';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cnbnc5p/chips/chips.prt';
 PART_NAME = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261-CNJOHNSON131-3701-261';
 LONG_PART_NAME = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261-CNJOHNSON131-3701-261';
 PARENT_PPT_PHYS_PART = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261';
 PARENT_PPT = 'CNBNC5P';
 PARENT_PPT_PART = 'CNBNC5P_TH-131-3701-261,E012123,CNJOHNSON131-3701-261';
 PARENT_CHIPS_PHYS_PART = 'CNBNC5P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I136@CAPACITORS.CAP(CHIPS)';
LOCATION   = 'C45';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/capacitors/cap/chips/chips.prt';
 PART_NAME = 'CAP_SM-10NF,200V,10,E042770,C0805-2-C0805-2';
 LONG_PART_NAME = 'CAP_SM-10NF,200V,10,E042770,C0805-2-C0805-2';
 PARENT_PPT_PHYS_PART = 'CAP_SM-10NF,200V,10,E042770,C0805-2';
 PARENT_PPT = 'CAP';
 PARENT_PPT_PART = 'CAP_SM-10NF,200V,10,E042770,C0805-2';
 PARENT_CHIPS_PHYS_PART = 'CAP_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I139@RESISTORS.RES(CHIPS)';
LOCATION   = 'R62';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/resistors/res/chips/chips.prt';
 PART_NAME = 'RES_SM-1K,E003415,1/8W,1,R0805-R0805';
 LONG_PART_NAME = 'RES_SM-1K,E003415,1/8W,1,R0805-R0805';
 PARENT_PPT_PHYS_PART = 'RES_SM-1K,E003415,1/8W,1,R0805';
 PARENT_PPT = 'RES';
 PARENT_PPT_PART = 'RES_SM-1K,E003415,1/8W,1,R0805';
 PARENT_CHIPS_PHYS_PART = 'RES_SM';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I147@CONN_PCB.CNTP1P(CHIPS)';
LOCATION   = 'TP3';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cntp1p/chips/chips.prt';
 PART_NAME = 'CNTP1P_TH-WHT,E006153,CNKEY5001TP-CNKEY5001TP';
 LONG_PART_NAME = 'CNTP1P_TH-WHT,E006153,CNKEY5001TP-CNKEY5001TP';
 PARENT_PPT_PHYS_PART = 'CNTP1P_TH-WHT,E006153,CNKEY5001TP';
 PARENT_PPT = 'CNTP1P';
 PARENT_PPT_PART = 'CNTP1P_TH-WHT,E006153,CNKEY5001TP';
 PARENT_CHIPS_PHYS_PART = 'CNTP1P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I148@CONN_PCB.CNTP1P(CHIPS)';
LOCATION   = 'TP6';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cntp1p/chips/chips.prt';
 PART_NAME = 'CNTP1P_TH-WHT,E006153,CNKEY5001TP-CNKEY5001TP';
 LONG_PART_NAME = 'CNTP1P_TH-WHT,E006153,CNKEY5001TP-CNKEY5001TP';
 PARENT_PPT_PHYS_PART = 'CNTP1P_TH-WHT,E006153,CNKEY5001TP';
 PARENT_PPT = 'CNTP1P';
 PARENT_PPT_PART = 'CNTP1P_TH-WHT,E006153,CNKEY5001TP';
 PARENT_CHIPS_PHYS_PART = 'CNTP1P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I149@CONN_PCB.CNTP1P(CHIPS)';
LOCATION   = 'TP7';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cntp1p/chips/chips.prt';
 PART_NAME = 'CNTP1P_TH-WHT,E006153,CNKEY5001TP-CNKEY5001TP';
 LONG_PART_NAME = 'CNTP1P_TH-WHT,E006153,CNKEY5001TP-CNKEY5001TP';
 PARENT_PPT_PHYS_PART = 'CNTP1P_TH-WHT,E006153,CNKEY5001TP';
 PARENT_PPT = 'CNTP1P';
 PARENT_PPT_PART = 'CNTP1P_TH-WHT,E006153,CNKEY5001TP';
 PARENT_CHIPS_PHYS_PART = 'CNTP1P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I150@CONN_PCB.CNTP1P(CHIPS)';
LOCATION   = 'TP5';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cntp1p/chips/chips.prt';
 PART_NAME = 'CNTP1P_TH-WHT,E006153,CNKEY5001TP-CNKEY5001TP';
 LONG_PART_NAME = 'CNTP1P_TH-WHT,E006153,CNKEY5001TP-CNKEY5001TP';
 PARENT_PPT_PHYS_PART = 'CNTP1P_TH-WHT,E006153,CNKEY5001TP';
 PARENT_PPT = 'CNTP1P';
 PARENT_PPT_PART = 'CNTP1P_TH-WHT,E006153,CNKEY5001TP';
 PARENT_CHIPS_PHYS_PART = 'CNTP1P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I151@CONN_PCB.CNTP1P(CHIPS)';
LOCATION   = 'TP4';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cntp1p/chips/chips.prt';
 PART_NAME = 'CNTP1P_TH-WHT,E006153,CNKEY5001TP-CNKEY5001TP';
 LONG_PART_NAME = 'CNTP1P_TH-WHT,E006153,CNKEY5001TP-CNKEY5001TP';
 PARENT_PPT_PHYS_PART = 'CNTP1P_TH-WHT,E006153,CNKEY5001TP';
 PARENT_PPT = 'CNTP1P';
 PARENT_PPT_PART = 'CNTP1P_TH-WHT,E006153,CNKEY5001TP';
 PARENT_CHIPS_PHYS_PART = 'CNTP1P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I152@CONN_PCB.CNTP1P(CHIPS)';
LOCATION   = 'TP2';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/conn_pcb/cntp1p/chips/chips.prt';
 PART_NAME = 'CNTP1P_TH-WHT,E006153,CNKEY5001TP-CNKEY5001TP';
 LONG_PART_NAME = 'CNTP1P_TH-WHT,E006153,CNKEY5001TP-CNKEY5001TP';
 PARENT_PPT_PHYS_PART = 'CNTP1P_TH-WHT,E006153,CNKEY5001TP';
 PARENT_PPT = 'CNTP1P';
 PARENT_PPT_PART = 'CNTP1P_TH-WHT,E006153,CNKEY5001TP';
 PARENT_CHIPS_PHYS_PART = 'CNTP1P_TH';
END_LIB_INFO;
END_PRIM;

BEGIN_PRIM:
PATH_NAME  = '@02_070959B_LIB.02_070959B_TOP(SCH_1):PAGE5_I157@IC_ADI.AD5766(CHIPS)';
LOCATION   = 'U4';
SEC = '1';

BEGIN_LIB_INFO:
 PRIM_FILE = 'Z:/allegro/v174_site/logical/share/library/ic_adi/ad5766/chips/chips.prt';
 PART_NAME = 'AD5766_SM-AD5766BCBZ-RL7,E024910,WLCSP49-WLCSP49';
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END_LIB_INFO;
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BEGIN_LIB_INFO:
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END_LIB_INFO;
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BEGIN_LIB_INFO:
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BEGIN_LIB_INFO:
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BEGIN_LIB_INFO:
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BEGIN_LIB_INFO:
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BEGIN_LIB_INFO:
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BEGIN_LIB_INFO:
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BEGIN_LIB_INFO:
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BEGIN_LIB_INFO:
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BEGIN_LIB_INFO:
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PHY_SIGNAL = 'UNNAMED_5_CAP_I11_N1';
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LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_CAP_I20_N1';
PHY_SIGNAL = 'UNNAMED_5_CAP_I20_N1';
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LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_CAP_I26_N1';
PHY_SIGNAL = 'UNNAMED_5_CAP_I26_N1';
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PHY_SIGNAL = 'UNNAMED_5_CAP_I38_N1';
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LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_CAP_I44_N1';
PHY_SIGNAL = 'UNNAMED_5_CAP_I44_N1';
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LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_CAP_I46_N1';
PHY_SIGNAL = 'UNNAMED_5_CAP_I46_N1';
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LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_CAP_I54_N1';
PHY_SIGNAL = 'UNNAMED_5_CAP_I54_N1';
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BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_CAP_I61_N1';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_CAP_I61_N1';
PHY_SIGNAL = 'UNNAMED_5_CAP_I61_N1';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_CAP_I6_N1';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_CAP_I6_N1';
PHY_SIGNAL = 'UNNAMED_5_CAP_I6_N1';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_CAP_I89_N1';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_CAP_I89_N1';
PHY_SIGNAL = 'UNNAMED_5_CAP_I89_N1';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_CAP_I101_N1';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_CAP_I101_N1';
PHY_SIGNAL = 'UNNAMED_5_CAP_I101_N1';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_CAP_I110_N1';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_CAP_I110_N1';
PHY_SIGNAL = 'UNNAMED_5_CAP_I110_N1';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_CAP_I72_N1';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_CAP_I72_N1';
PHY_SIGNAL = 'UNNAMED_5_CAP_I72_N1';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_CAP_I76_N1';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_CAP_I76_N1';
PHY_SIGNAL = 'UNNAMED_5_CAP_I76_N1';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_CAP_I82_N1';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_CAP_I82_N1';
PHY_SIGNAL = 'UNNAMED_5_CAP_I82_N1';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_CAP_I97_N1';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_CAP_I97_N1';
PHY_SIGNAL = 'UNNAMED_5_CAP_I97_N1';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_CAP_I136_N1';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_CAP_I136_N1';
PHY_SIGNAL = 'UNNAMED_5_CAP_I136_N1';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_AD5766_I157_N0';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_AD5766_I157_N0';
PHY_SIGNAL = 'UNNAMED_5_AD5766_I157_N0';
END_SIGNAL;

BEGIN_SIGNAL:
CANON_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_AD5766_I157_N1';
LOG_SIGNAL = '@02_070959B_LIB.02_070959B_TOP(SCH_1):UNNAMED_5_AD5766_I157_N1';
PHY_SIGNAL = 'UNNAMED_5_AD5766_I157_N1';
END_SIGNAL;

END_MODULE; { end of module '@02_070959B_LIB.02_070959B_TOP(SCH_1)'}

BEGIN_REFDES_LIST:
C1, C2, C3, C4, C5, C6, C7, MUXOUT, C8, C9, AVSS_SEL, C40, C41, C42, C43, C44, ~
C45, AVCC, R30, R31, R32, R33, R34, R35, R36, AVCC_SEL, R37, R38, R39, R1, R2, ~
R3, AGND, R4, R5, R6, D1, R7, D2, R8, R9, REF_SEL, J10, J11, J12, J13, J14, J15, ~
J16, J17, N0, J18, N1, J19, R40, AVDD, R41, R42, R43, R44, R45, R46, R47, R48, ~
R49, TP1, TP2, TP3, TP4, TP5, TP6, TP7, C10, C11, C12, C13, C14, C15, C16, C17, ~
C18, C19, J1, J2, J3, J4, J5, J20, J6, J7, AVDD_SEL, J8, J9, R50, R51, R52, R53, ~
R54, R55, R56, R57, R58, R59, AVSS, P10, C20, C21, C22, C23, C24, C25, C26, PW~
R_SEL, C27, C28, C29, DGND, R10, R11, PGND, R12, R13, R14, R15, R16, R17, R18, ~
R19, P1, P2, P3, R60, P4, R61, P5, R62, P6, R63, P7, P8, P9, U1, U2, U3, U4, C30, ~
C31, C32, EXT_AVCC, C33, C34, C35, JP1, C36, JP2, C37, JP3, C38, JP4, C39, VREF, ~
L1, L2, L3, L4, R20, L5, R21, R22, R23, R24, R25, R26, R27, R28, R29;
END_REFDES_LIST; { end of REFDES_LIST }
