| |
| ctl_reg Address: 0x00 (R/W) |
| Control Register: Several independent control bits are grouped into this register. |
|
Bit 0: |
ctl_start_cap_esr_meas (Default = 0) |
|
Begin a capacitance and ESR measurement when possible; this bit clears itself once a measurement cycle begins or becomes pending. |
|
1: start_measurement |
|
Bit 1: |
ctl_gpi_buffer_en (Default = 0) |
|
A one in this bit location enables the input buffer on the GPI pin. With a zero in this location the GPI pin is measured without the buffer. |
|
Bit 2: |
ctl_stop_cap_esr_meas (Default = 0) |
|
Stops an active capacitance/ESR measurement; this bit clears itself once a measurement cycle has been stopped. |
|
1: stop_measurement |
|
Bit 3: |
ctl_cap_scale (Default = 0) |
|
Increases capacitor measurement resolution 100 times, this is used when measuring smaller capacitors. |
|
0: large_cap |
|
1: small_cap |
|
Bit 4: |
ctl_disable_shunt (Default = 0) |
|
Disables the shunt feature. |
|
Bit 5: |
ctl_hotswap_disable (Default = 0) |
|
Disables the HotSwap controller. The gate of the hotswap FET is forced low, disconnecting VIN and VOUT and forcing the switcher into backup mode. This can be used to simulate a power failure for testing. |
|
Bit 6: |
ctl_force_boost_off (Default = 0) |
|
This bit disables the boost. |
|
Bit 7: |
ctl_force_charger_off (Default = 0) |
|
This bit disables the charger. |
|
Bit 8: |
ctl_force_itst_on (Default = 0) |
|
This bit forces the ITST current on. This can be used to discharge the capacitor stack or manually measure capacitance. Note that this only enables the test current, it does not disable the charger. Set ctl_force_charger_off to disable the charger. |
|
Bit 10: |
ctl_disable_balancer (Default = 0) |
|
Disables the balancer. |
| |
| alarm_mask_reg Address: 0x01 (R/W) |
| Mask Alarms Register: Writing a one to any bit in this register enables a rising edge of its respective bit in alarm_reg to trigger an SMBALERT. |
|
Bit 0: |
mask_alarm_gpi_uv (Default = 0) |
|
GPI Under Voltage alarm mask |
|
Bit 1: |
mask_alarm_gpi_ov (Default = 0) |
|
GPI Over Voltage alarm mask |
|
Bit 2: |
mask_alarm_vin_uv (Default = 0) |
|
VIN Under Voltage alarm mask |
|
Bit 3: |
mask_alarm_vin_ov (Default = 0) |
|
VIN Over Voltage alarm mask |
|
Bit 4: |
mask_alarm_vcap_uv (Default = 0) |
|
VCAP Under Voltage alarm mask |
|
Bit 5: |
mask_alarm_vcap_ov (Default = 0) |
|
VCAP Over Voltage alarm mask |
|
Bit 6: |
mask_alarm_vout_uv (Default = 0) |
|
VOUT Under Voltage alarm mask |
|
Bit 7: |
mask_alarm_vout_ov (Default = 0) |
|
VOUT Over Voltage alarm mask |
|
Bit 8: |
mask_alarm_dtemp_cold (Default = 0) |
|
Die temperature cold alarm mask |
|
Bit 9: |
mask_alarm_dtemp_hot (Default = 0) |
|
Die temperature hot alarm mask |
|
Bit 10: |
mask_alarm_ichg_uc (Default = 0) |
|
Charge undercurrent alarm mask |
|
Bit 11: |
mask_alarm_iin_oc (Default = 0) |
|
Input overcurrent alarm mask |
|
Bit 12: |
mask_alarm_cap_uv (Default = 0) |
|
Capacitor Under Voltage alarm mask |
|
Bit 13: |
mask_alarm_cap_ov (Default = 0) |
|
Capacitor Over Voltage alarm mask |
|
Bit 14: |
mask_alarm_cap_lo (Default = 0) |
|
Capacitance low alarm mask |
|
Bit 15: |
mask_alarm_esr_hi (Default = 0) |
|
ESR high alarm mask |
| |
| monitor_status_mask_reg Address: 0x02 (R/W) |
| Mask Monitor Status Register: Writing a one to any bit in this register enables a rising edge of its respective bit in monitor_status_reg to trigger an SMBALERT. |
|
Bit 0: |
mask_mon_meas_active (Default = 0) |
|
Set the SMBALERT when there is a rising edge on mon_meas_active |
|
Bit 2: |
mask_mon_capesr_pending (Default = 0) |
|
Set the SMBALERT when there is a rising edge on mon_capesr_pending |
|
Bit 3: |
mask_mon_cap_done (Default = 0) |
|
Set the SMBALERT when there is a rising edge on mon_cap_done |
|
Bit 4: |
mask_mon_esr_done (Default = 0) |
|
Set the SMBALERT when there is a rising edge on mon_esr_done |
|
Bit 5: |
mask_mon_meas_failed (Default = 0) |
|
Set the SMBALERT when there is a rising edge on mon_meas_failed |
|
Bit 7: |
mask_mon_disable_charger (Default = 0) |
|
Set the SMBALERT when there is a rising edge on mon_disable_charger |
|
Bit 8: |
mask_mon_cap_meas_active (Default = 0) |
|
Set the SMBALERT when there is a rising edge on mon_cap_meas_active |
|
Bit 9: |
mask_mon_esr_meas_active (Default = 0) |
|
Set the SMBALERT when there is a rising edge on mon_esr_meas_active |
|
Bit 10: |
mask_mon_power_failed (Default = 0) |
|
Set the SMBALERT when there is a rising edge on mon_power_failed |
|
Bit 11: |
mask_mon_power_returned (Default = 0) |
|
Set the SMBALERT when there is a rising edge on mon_power_returned |
|
Bit 12: |
mask_mon_balancing (Default = 0) |
|
Set the SMBALERT when there is a rising edge on mon_balancing |
|
Bit 13: |
mask_mon_shunting (Default = 0) |
|
Set the SMBALERT when there is a rising edge on mon_shunting |
|
Bit 14: |
mask_mon_cap_precharge (Default = 0) |
|
Set the SMBALERT when there is a rising edge on mon_cap_precharge |
| |
| vcapfb_dac_reg Address: 0x03 (R/W) |
|
|
Bits [3:0]: |
vcapfb_dac (Default = 10) |
|
VCAP Regulation Reference: This register is used to program the capacitor voltage feedback loop's reference voltage. Only bits 3:0 are active. VCAPFB_DAC = 37.5mV * vcapfb_dac + 637.5mV |
| |
| vshunt_reg Address: 0x05 (R/W) |
|
|
Bits [15:0]: |
vshunt (Default = 14744) |
|
Shunt Voltage Register: This register programs the shunt voltage for each capacitor in the stack. When set below 3.6V, the charger will limit current and the active shunts will shunt current to prevent this voltage from being exceeded. As a capacitor voltage nears this level, the charge current will be reduced. Current will be shunted when the capacitor voltage is within 25mV of vshunt. Vshunt should be programmed at least 50mV higher than the intended final balanced individual capacitor voltage. When programmed above 3.6V no current will be shunted, however the charge current will be reduced as described. 182.8µV per LSB. |
| |
| adc_vin_ch_en_reg Address: 0x06 (R/W) |
|
|
Bit 1: |
adc_vin_ichg_en (Default = 1) |
|
Enables ADC measurement of charge current while in charging mode. |
|
Bit 2: |
adc_vin_dtemp_en (Default = 0) |
|
Enables ADC measurement of die temperature while in charging mode. |
|
Bit 3: |
adc_vin_gpi_en (Default = 0) |
|
Enables ADC measurement of GPI (general purpose input) while in charging mode. |
|
Bit 4: |
adc_vin_iin_en (Default = 0) |
|
Enables ADC measurement of input current while in charging mode. |
|
Bit 5: |
adc_vin_vout_en (Default = 0) |
|
Enables ADC measurement of vout while in charging mode. |
|
Bit 6: |
adc_vin_vcap_en (Default = 0) |
|
Enables ADC measurement of vcap while in charging mode. |
|
Bit 7: |
adc_vin_vin_en (Default = 0) |
|
Enables ADC measurement of vin while in charging mode. |
|
Bit 8: |
adc_vin_vcap1_en (Default = 1) |
|
Enables ADC measurement of vcap1 while in charging mode. This bit must be set for capacitance and ESR measurement. |
|
Bit 9: |
adc_vin_vcap2_en (Default = 1) |
|
Enables ADC measurement of vcap2 while in charging mode. This bit must be set for capacitance and ESR measurement if there are two or more capacitors in the stack. |
|
Bit 10: |
adc_vin_vcap3_en (Default = 1) |
|
Enables ADC measurement of vcap3 while in charging mode. This bit must be set for capacitance and ESR measurement if there are three or more capacitors in the stack |
|
Bit 11: |
adc_vin_vcap4_en (Default = 1) |
|
Enables ADC measurement of vcap4 while in charging mode. This bit must be set for capacitance and ESR measurement if there are four capacitors in the stack |
| |
| adc_backup_ch_en_reg Address: 0x07 (R/W) |
|
|
Bit 1: |
adc_backup_ichg_en (Default = 0) |
|
Enables ADC measurement of charge current while in backup mode. |
|
Bit 2: |
adc_backup_dtemp_en (Default = 0) |
|
Enables ADC measurement of die temperature while in backup mode. |
|
Bit 3: |
adc_backup_gpi_en (Default = 0) |
|
Enables ADC measurement of GPI (general purpose input) while in backup mode. |
|
Bit 4: |
adc_backup_iin_en (Default = 0) |
|
Enables ADC measurement of input current while in backup mode. |
|
Bit 5: |
adc_backup_vout_en (Default = 0) |
|
Enables ADC measurement of vout while in backup mode. |
|
Bit 6: |
adc_backup_vcap_en (Default = 0) |
|
Enables ADC measurement of vcap while in backup mode. |
|
Bit 7: |
adc_backup_vin_en (Default = 0) |
|
Enables ADC measurement of vin while in backup mode. |
|
Bit 8: |
adc_backup_vcap1_en (Default = 0) |
|
Enables ADC measurement of vcap1 while in backup mode. |
|
Bit 9: |
adc_backup_vcap2_en (Default = 0) |
|
Enables ADC measurement of vcap2 while in backup mode. |
|
Bit 10: |
adc_backup_vcap3_en (Default = 0) |
|
Enables ADC measurement of vcap3 while in backup mode. |
|
Bit 11: |
adc_backup_vcap4_en (Default = 0) |
|
Enables ADC measurement of vcap4 while in backup mode. |
| |
| adc_wait_vin_reg Address: 0x08 (R/W) |
|
|
Bits [15:0]: |
adc_wait_vin (Default = 100) |
|
Sets the wait time between ADC measurement groups while in charging mode. The LSB of this register has a weight of 400uS. The ADC measures all enabled channels then waits this time before measuring all channels again. The ADC data is used for balancing and shunting, increasing this time reduces the shunt and balancer update rate and is not typically recommended if shunting or balancing is enabled. If shunting or measuring capacitance/ESR this time may be ignored by the ADC. 400uS per LSB |
| |
| adc_wait_backup_reg Address: 0x09 (R/W) |
|
|
Bits [15:0]: |
adc_wait_backup (Default = 100) |
|
Sets the wait time between ADC measurement groups while in backup mode. The LSB of this register has a weight of 400uS. The ADC measures all enabled channels then waits this time before measuring all channels again. 400uS per LSB |
| |
| gpi_uv_lvl_reg Address: 0x0A (R/W) |
|
|
Bits [15:0]: |
gpi_uv_lvl (Default = 0) |
|
General Purpose Input Under Voltage Level: This is an alarm threshold for the GPI pin. If enabled, the GPI pin voltage falling below this level will trigger an alarm and an SMBALERT. 182.8µV per LSB |
| |
| gpi_ov_lvl_reg Address: 0x0B (R/W) |
|
|
Bits [15:0]: |
gpi_ov_lvl (Default = 0) |
|
General Purpose Input Over Voltage Level: This is an alarm threshold for the GPI pin. If enabled, the GPI pin voltage rising above this level will trigger an alarm and an SMBALERT. 182.8µV per LSB |
| |
| vin_uv_lvl_reg Address: 0x0C (R/W) |
|
|
Bits [15:0]: |
vin_uv_lvl (Default = 0) |
|
VIN Under Voltage Level: This is an alarm threshold for the input voltage. If enabled, the input pin voltage falling below this level will trigger an alarm and an SMBALERT. 2.19mV per LSB |
| |
| vin_ov_lvl_reg Address: 0x0D (R/W) |
|
|
Bits [15:0]: |
vin_ov_lvl (Default = 0) |
|
VIN Over Voltage Level: This is an alarm threshold for the input voltage. If enabled, the input pin voltage rising above this level will trigger an alarm and an SMBALERT. 2.19mV per LSB |
| |
| vcap_uv_lvl_reg Address: 0x0E (R/W) |
|
|
Bits [15:0]: |
vcap_uv_lvl (Default = 0) |
|
VCAP Under Voltage Level: This is an alarm threshold for the capacitor stack voltage. If enabled, the VCAP pin voltage falling below this level will trigger an alarm and an SMBALERT. 1.46mV per LSB |
| |
| vcap_ov_lvl_reg Address: 0x0F (R/W) |
|
|
Bits [15:0]: |
vcap_ov_lvl (Default = 0) |
|
VCAP Over Voltage Level: This is an alarm threshold for the capacitor stack voltage. If enabled, the VCAP pin voltage rising above this level will trigger an alarm and an SMBALERT. 1.46mV per LSB |
| |
| vout_uv_lvl_reg Address: 0x10 (R/W) |
|
|
Bits [15:0]: |
vout_uv_lvl (Default = 0) |
|
VOUT Under Voltage Level: This is an alarm threshold for the output voltage. If enabled, the VOUT pin voltage falling below this level will trigger an alarm and an SMBALERT. 2.19mV per LSB |
| |
| vout_ov_lvl_reg Address: 0x11 (R/W) |
|
|
Bits [15:0]: |
vout_ov_lvl (Default = 0) |
|
VOUT Over Voltage Level: This is an alarm threshold for the output voltage. If enabled, the VOUT pin voltage rising above this level will trigger an alarm and an SMBALERT. 2.19mV per LSB |
| |
| dtemp_cold_lvl_reg Address: 0x12 (R/W) |
|
|
Bits [15:0]: |
dtemp_cold_lvl (Default = 0) |
|
Die Temperature Cold Level: This is an alarm threshold for the die temperature. If enabled, the die temperature falling below this level will trigger an alarm and an SMBALERT. Temperature = 0.0295C per LSB - 274C |
| |
| dtemp_hot_lvl_reg Address: 0x13 (R/W) |
|
|
Bits [15:0]: |
dtemp_hot_lvl (Default = 0) |
|
Die Temperature Hot Level: This is an alarm threshold for the die temperature. If enabled, the die temperature rising above this level will trigger an alarm and an SMBALERT. Temperature = 0.0295C per LSB - 274C |
| |
| ichg_uc_lvl_reg Address: 0x14 (R/W) |
|
|
Bits [15:0]: |
ichg_uc_lvl (Default = 0) |
|
Charge Undercurrent Level: This is an alarm threshold for the charge current. If enabled, the charge current falling below this level will trigger an alarm and an SMBALERT. 1.955µV/Rsnsc per LSB |
| |
| iin_oc_lvl_reg Address: 0x15 (R/W) |
|
|
Bits [15:0]: |
iin_oc_lvl (Default = 0) |
|
Input Overcurrent Level: This is an alarm threshold for the input current. If enabled, the input current rising above this level will trigger an alarm and an SMBALERT. 1.955µV/Rsnsi per LSB |
| |
| cap_uv_lvl_reg Address: 0x16 (R/W) |
|
|
Bits [15:0]: |
cap_uv_lvl (Default = 0) |
|
Capacitor Under Voltage Level: This is an alarm threshold for each individual capacitor voltage in the stack. If enabled, any capacitor voltage falling below this level will trigger an alarm and an SMBALERT. 182.8µV per LSB. |
| |
| cap_ov_lvl_reg Address: 0x17 (R/W) |
|
|
Bits [15:0]: |
cap_ov_lvl (Default = 0) |
|
Capacitor Over Voltage Level: This is an alarm threshold for each individual capacitor in the stack. If enabled, any capacitor voltage rising above this level will trigger an alarm and an SMBALERT. 182.8µV per LSB |
| |
| cap_lo_lvl_reg Address: 0x18 (R/W) |
|
|
Bits [15:0]: |
cap_lo_lvl (Default = 0) |
|
Capacitance Low Level: This is an alarm threshold for the measured stack capacitance. If the measured stack capacitance is less than this level it will trigger an alarm and an SMBALERT, if enabled. When ctl_cap_scale is set to 1, capacitance is 3.36µF * RT/RTST per LSB. When ctl_cap_scale is set to 0 it is 336µF * RT/RTST per LSB. |
| |
| esr_hi_lvl_reg Address: 0x19 (R/W) |
|
|
Bits [15:0]: |
esr_hi_lvl (Default = 0) |
|
ESR High Level: This is an alarm threshold for the measured stack ESR. If enabled, a measurement of stack ESR exceeding this level will trigger an alarm and an SMBALERT. Rsnsc/64 per LSB. |
| |
| esr_i_on_settling_reg Address: 0x1A (R/W) |
|
|
Bits [15:0]: |
esr_i_on_settling (Default = 2) |
|
Time to allow the charging current to settle before measuring the charge voltage and current for ESR. Each LSB is 1024 switcher periods. |
| |
| esr_i_off_settling_reg Address: 0x1B (R/W) |
|
|
Bits [15:0]: |
esr_i_off_settling (Default = 8) |
|
Time to wait after turning the charge current off before measuring the charge voltage and current for ESR. Each LSB is 1024 switcher periods. |
| |
| esr_i_override_reg Address: 0x1C (R/W) |
|
|
Bits [15:0]: |
esr_i_override (Default = 0) |
|
This value overrides the LTC3351's adaptive test current selection for the ESR test. If this register is non-zero, the lower 8 bits will be used as an 8 bit DAC value to set the charge current during the ESR test. Typically this register will not need to be set. ITEST = 32mV * (esr_i_override[7:0] + 1) / 256 / Rsnsc |
| |
| cap_i_on_settling_reg Address: 0x1D (R/W) |
|
|
Bits [15:0]: |
cap_i_on_settling (Default = 8) |
|
Time to wait after turning the test current on before measuring the first voltage of the capacitance measurement. Each LSB is 1024 switcher periods. |
| |
| cap_delta_v_setting_reg Address: 0x1E (R/W) |
|
|
Bits [15:0]: |
cap_delta_v_setting (Default = 550) |
|
The target delta V for the capacitance test. The scale is 182.8µV per LSB. The default is approximately 100mV. |
| |
| min_boost_cap_voltage_reg Address: 0x1F (R/W) |
|
|
Bits [15:0]: |
min_boost_cap_voltage (Default = 0) |
|
If this register is non-zero, it sets the minimum capacitor voltage the boost will operate at. If any capacitor voltage falls below this value in boost mode the boost will be forced off, the boost will not turn back on even if the capacitor voltage rises above this voltage. Only after input power returns will the boost be re-enabled. This prevents the boost from cycling on and off many times once the capacitors' voltage has discharged to the point it can no longer support the system load through the boost. To use this feature vcap[1:num_caps+1] measurements must be enabled in backup mode, see adc_backup_ch_en_reg. Also the capacitor voltages are only measured as often as set by adc_wait_backup. |
| |
| min_vout_hs_disable_reg Address: 0x20 (R/W) |
|
|
Bits [15:0]: |
min_vout_hs_disable (Default = 0) |
|
If this register is non-zero, it sets the minimum voltage VOUT is allowed to reach while the HotSwap is disabled. If the voltage falls below this level the ctl_hotswap_disable bit will be cleared, re-enabling the HotSwap controller. To use this feature the VOUT measurement must be enabled in boost mode, see adc_backup_ch_en_reg. Also the VOUT voltage is only measured as often as set by adc_wait_backup. |
| |
| alarm_reg Address: 0x23 (R/W) |
| Alarms Register: A one in any bit in the register indicates its respective alarm has triggered. All bits are active high. Alarms are cleared by clearing (writing 0) the appropriate bit in this register. Setting (writing 1) bits has no effect. For example to clear the alarm_gpi_uv alarm, write 0xFFFD. |
|
Bit 0: |
alarm_gpi_uv (Default = 0) |
|
GPI Under Voltage alarm |
|
Bit 1: |
alarm_gpi_ov (Default = 0) |
|
GPI Over Voltage alarm |
|
Bit 2: |
alarm_vin_uv (Default = 0) |
|
VIN Under Voltage alarm |
|
Bit 3: |
alarm_vin_ov (Default = 0) |
|
VIN Over Voltage alarm |
|
Bit 4: |
alarm_vcap_uv (Default = 0) |
|
VCAP Under Voltage alarm |
|
Bit 5: |
alarm_vcap_ov (Default = 0) |
|
VCAP Over Voltage alarm |
|
Bit 6: |
alarm_vout_uv (Default = 0) |
|
VOUT Under Voltage alarm |
|
Bit 7: |
alarm_vout_ov (Default = 0) |
|
VOUT Over Voltage alarm |
|
Bit 8: |
alarm_dtemp_cold (Default = 0) |
|
Die temperature cold alarm |
|
Bit 9: |
alarm_dtemp_hot (Default = 0) |
|
Die temperature hot alarm |
|
Bit 10: |
alarm_ichg_uc (Default = 0) |
|
Charge undercurrent alarm |
|
Bit 11: |
alarm_iin_oc (Default = 0) |
|
Input overcurrent alarm |
|
Bit 12: |
alarm_cap_uv (Default = 0) |
|
Capacitor Under Voltage alarm |
|
Bit 13: |
alarm_cap_ov (Default = 0) |
|
Capacitor Over Voltage alarm |
|
Bit 14: |
alarm_cap_lo (Default = 0) |
|
Capacitance low alarm |
|
Bit 15: |
alarm_esr_hi (Default = 0) |
|
ESR high alarm |
| |
| monitor_status_reg Address: 0x24 (R) |
| Monitor Status: This register provides real time status information about the state of the monitoring system. Each bit is active high. |
|
Bit 0: |
mon_meas_active |
|
Capacitance/ESR measurement is active. This bit becomes one at the begining of a capacitance/ESR measurement and remains 1 after the measurement has completed until the capacitors have been discharged back to their regulation voltage. |
|
Bit 1: |
mon_capesr_scheduled |
|
Indicates that the LTC3351 is waiting programmed time to begin a capacitance/ESR measurement |
|
Bit 2: |
mon_capesr_pending |
|
Indicates that the LTC3351 is waiting for satisfactory conditions to begin a capacitance/ESR measurement |
|
Bit 3: |
mon_cap_done |
|
Indicates that the capacitance measurement has completed |
|
Bit 4: |
mon_esr_done |
|
Indicates that the ESR Measurement has completed |
|
Bit 5: |
mon_meas_failed |
|
Indicates the last attempted capacitance and ESR measurement was unable to complete |
|
Bit 6: |
mon_boost_shutdown |
|
This bit is set in boost mode when any capacitor falls below min_boost_cap_voltage_reg. It is cleared when power returns. |
|
Bit 7: |
mon_disable_charger |
|
Indicates the capacitance and ESR measurement system has temporarily disabled the charger. |
|
Bit 8: |
mon_cap_meas_active |
|
Indicates the capacitance and ESR measurement system is measuring capacitance. |
|
Bit 9: |
mon_esr_meas_active |
|
Indicates the capacitance and ESR measurement system is measuring ESR. |
|
Bit 10: |
mon_power_failed |
|
This bit is set when VIN is outside the UV/OV range or the HotSwap controller is disabled by setting the ctl_hotswap_disable. It is cleared only when mon_power_returned is set. |
|
Bit 11: |
mon_power_returned |
|
This bit is set when the output is powered by the input and the charger is able to charge. It is cleared only when mon_power_failed is set. |
|
Bit 12: |
mon_balancing |
|
Indicates the LTC3351 is balancing the capacitor voltage. |
|
Bit 13: |
mon_shunting |
|
Indicates a capacitor voltage is approaching vshunt and a shunt is turned on. |
|
Bit 14: |
mon_cap_precharge |
|
Indicates the capacitor stack is being precharged for a capacitance measurement. |
|
Bit 15: |
mon_reset |
|
This bit is set during a power on reset. It is cleared on any I2C/SMBus write. It can be used to determine if the chip has reset during a power loss followed by a power return. |
| |
| meas_gpi_reg Address: 0x25 (R) |
|
|
Bits [15:0]: |
meas_gpi |
|
Measurement of GPI pin voltage. 182.8µV per LSB |
| |
| meas_vin_reg Address: 0x26 (R) |
|
|
Bits [15:0]: |
meas_vin |
|
Measured Input Voltage. 2.19mV per LSB |
| |
| meas_vcap_reg Address: 0x27 (R) |
|
|
Bits [15:0]: |
meas_vcap |
|
Measured Capacitor Stack Voltage. 1.46mV per LSB. |
| |
| meas_vout_reg Address: 0x28 (R) |
|
|
Bits [15:0]: |
meas_vout |
|
Measured Output Voltage. 2.19mV per LSB. |
| |
| meas_dtemp_reg Address: 0x29 (R) |
|
|
Bits [15:0]: |
meas_dtemp |
|
Measured die temperature. Temperature = 0.0295°C per LSB - 274°C. |
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| meas_ichg_reg Address: 0x2A (R) |
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Bits [15:0]: |
meas_ichg |
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Measured Charge Current. 1.955µV/Rsnsc per LSB |
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| meas_iin_reg Address: 0x2B (R) |
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Bits [15:0]: |
meas_iin |
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Measured Input Current. 1.955µV/Rsnsi per LSB |
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| lo_vcap_reg Address: 0x2C (R) |
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Bits [15:0]: |
lo_vcap |
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The lowest measured capacitor voltage from the last measurement set. |
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| hi_vcap_reg Address: 0x2D (R) |
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Bits [15:0]: |
hi_vcap |
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The highest measured capacitor voltage from the last measurement set. |
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| meas_cap_reg Address: 0x2E (R) |
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Bits [15:0]: |
meas_cap |
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Measured capacitor stack capacitance value. When ctl_cap_scale is set to 1, capacitance is 3.36µF * RT/RTST per LSB. When ctl_cap_scale is set to 0 it is 336µF * RT/RTST per LSB. |
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| meas_esr_reg Address: 0x2F (R) |
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Bits [15:0]: |
meas_esr |
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Measured capacitor stack equivalent series resistance (ESR) value. Rsnsc/64 per LSB |
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| meas_vcap1_reg Address: 0x30 (R) |
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Bits [15:0]: |
meas_vcap1 |
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Measured voltage between the CAP1 and CAPRTN pins. 182.8µV per LSB |
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| meas_vcap2_reg Address: 0x31 (R) |
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Bits [15:0]: |
meas_vcap2 |
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Measured voltage between the CAP2 and CAP1 pins. 182.8µV per LSB |
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| meas_vcap3_reg Address: 0x32 (R) |
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Bits [15:0]: |
meas_vcap3 |
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Measured voltage between the CAP3 and CAP2 pins. 182.8µV per LSB |
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| meas_vcap4_reg Address: 0x33 (R) |
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Bits [15:0]: |
meas_vcap4 |
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Measured voltage between the CAP4 and CAP3 pins. 182.8µV per LSB. When the ITST current is on, either due to ctl_force_itst_on or during a capacitance measurement, this voltage measurement will temporarily be low due to the ITST current flowing in the shunt resistor. |
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| cap_m0_vc1_reg Address: 0x34 (R) |
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Bits [15:0]: |
cap_m0_vc1 |
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The voltage change on cap1 due to the capacitance measurement. The relative voltage change on each capacitor during the capacitance measurement and the total capacitance can be used to calculate the capacitance of each individual capacitor. |
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| cap_m0_vc2_reg Address: 0x35 (R) |
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Bits [15:0]: |
cap_m0_vc2 |
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The voltage change on cap2 due to the capacitance measurement. The relative voltage change on each capacitor during the capacitance measurement and the total capacitance can be used to calculate the capacitance of each individual capacitor. |
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| cap_m0_vc3_reg Address: 0x36 (R) |
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Bits [15:0]: |
cap_m0_vc3 |
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The voltage change on cap3 due to the capacitance measurement. The relative voltage change on each capacitor during the capacitance measurement and the total capacitance can be used to calculate the capacitance of each individual capacitor. |
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| cap_m0_vc4_reg Address: 0x37 (R) |
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Bits [15:0]: |
cap_m0_vc4 |
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The voltage change on cap4 due to the capacitance measurement. The relative voltage change on each capacitor during the capacitance measurement and the total capacitance can be used to calculate the capacitance of each individual capacitor. |
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| esr_m0_vc1_reg Address: 0x38 (R) |
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Bits [15:0]: |
esr_m0_vc1 |
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A measurement of VCAP1 just before turning current on for the ESR measurement. This value is used by the LTC3351 in the calculation of meas_esr. |
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| esr_m0_vc2_reg Address: 0x39 (R) |
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Bits [15:0]: |
esr_m0_vc2 |
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A measurement of VCAP2 just before turning current on for the ESR measurement. This value is used by the LTC3351 in the calculation of meas_esr. |
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| esr_m0_vc3_reg Address: 0x3A (R) |
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Bits [15:0]: |
esr_m0_vc3 |
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A measurement of VCAP3 just before turning current on for the ESR measurement. This value is used by the LTC3351 in the calculation of meas_esr. |
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| esr_m0_vc4_reg Address: 0x3B (R) |
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Bits [15:0]: |
esr_m0_vc4 |
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A measurement of VCAP4 just before turning current on for the ESR measurement. This value is used by the LTC3351 in the calculation of meas_esr. |
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| esr_m1_vc1_reg Address: 0x3C (R) |
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Bits [15:0]: |
esr_m1_vc1 |
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The first VCAP1 voltage measurement with charge current on for the ESR measurement. This value is used by the LTC3351 in the calculation of meas_esr. |
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| esr_m1_vc2_reg Address: 0x3D (R) |
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Bits [15:0]: |
esr_m1_vc2 |
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The first VCAP2 voltage measurement with charge current on for the ESR measurement. This value is used by the LTC3351 in the calculation of meas_esr. |
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| esr_m1_vc3_reg Address: 0x3E (R) |
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Bits [15:0]: |
esr_m1_vc3 |
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The first VCAP3 voltage measurement with charge current on for the ESR measurement. This value is used by the LTC3351 in the calculation of meas_esr. |
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| esr_m1_vc4_reg Address: 0x3F (R) |
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Bits [15:0]: |
esr_m1_vc4 |
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The first VCAP4 voltage measurement with charge current on for the ESR measurement. This value is used by the LTC3351 in the calculation of meas_esr. |
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| esr_m1_i_reg Address: 0x40 (R) |
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Bits [15:0]: |
esr_m1_i |
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The first charge current measurement with charge current on for the ESR measurement. This value is used by the LTC3351 in the calculation of meas_esr. |
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| esr_m2_vc1_reg Address: 0x41 (R) |
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Bits [15:0]: |
esr_m2_vc1 |
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The second VCAP1 voltage measurement with the charge current on for the ESR measurement. This value is used by the LTC3351 in the calculation of meas_esr. |
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| esr_m2_vc2_reg Address: 0x42 (R) |
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Bits [15:0]: |
esr_m2_vc2 |
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The second VCAP2 voltage measurement with the charge current on for the ESR measurement. This value is used by the LTC3351 in the calculation of meas_esr. |
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| esr_m2_vc3_reg Address: 0x43 (R) |
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Bits [15:0]: |
esr_m2_vc3 |
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The second VCAP3 voltage measurement with the charge current on for the ESR measurement. This value is used by the LTC3351 in the calculation of meas_esr. |
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| esr_m2_vc4_reg Address: 0x44 (R) |
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Bits [15:0]: |
esr_m2_vc4 |
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The second VCAP4 voltage measurement with the charge current on for the ESR measurement. This value is used by the LTC3351 in the calculation of meas_esr. |
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| esr_m2_i_reg Address: 0x45 (R) |
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Bits [15:0]: |
esr_m2_i |
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The second charge current measurement with charge current on for the ESR measurement. This value is used by the LTC3351 in the calculation of meas_esr. |
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| esr_m3_vc1_reg Address: 0x46 (R) |
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Bits [15:0]: |
esr_m3_vc1 |
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The VCAP1 voltage measurement with charge current off for the ESR measurement. This value is used by the LTC3351 in the calculation of meas_esr. |
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| esr_m3_vc2_reg Address: 0x47 (R) |
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Bits [15:0]: |
esr_m3_vc2 |
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The VCAP2 voltage measurement with charge current off for the ESR measurement. This value is used by the LTC3351 in the calculation of meas_esr. |
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| esr_m3_vc3_reg Address: 0x48 (R) |
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Bits [15:0]: |
esr_m3_vc3 |
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The VCAP3 voltage measurement with charge current off for the ESR measurement. This value is used by the LTC3351 in the calculation of meas_esr. |
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| esr_m3_vc4_reg Address: 0x49 (R) |
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Bits [15:0]: |
esr_m3_vc4 |
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The VCAP4 voltage measurement with charge current off for the ESR measurement. This value is used by the LTC3351 in the calculation of meas_esr. |
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| esr_m3_i_reg Address: 0x4A (R) |
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Bits [15:0]: |
esr_m3_i |
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The charge current measurement with charge current off for the ESR measurement. This value is used by the LTC3351 in the calculation of meas_esr. |
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| rev_reg Address: 0x50 (R) |
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Bits [15:0]: |
rev_code |
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The LTC3351 revision code. |
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| next_ichrg_control_test_current Address: 0x54 (R) |
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Bits [7:0]: |
next_esr_i |
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The 8 bit DAC setting for the charge current that the LTC3351 has calculated for the next ESR measurement based on the previous ESR measurement. The first ESR measurement will use a setting of 32. If esr_i_override is non-zero, this register will be calculated but esr_i_override will be used instead. If non-zero ITEST = 32mV * (next_esr_i[7:0] + 1) / 256 / Rsnsc |
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| num_caps_reg Address: 0xED (R) |
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Bits [1:0]: |
num_caps |
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Number of Capacitors. This register shows the state of the CAP_SLCT1, CAP_SLCT0 pins. The value read in this register is the number of capacitors programmed minus one. |
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| sys_status Address: 0xEE (R) |
| System Status Register: This register provides real time status information about the instantaneous state of the system. Each bit is active high. |
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Bit 0: |
stepdown_mode |
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The synchronous controller is in step-down mode (charging) |
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Bit 1: |
stepup_mode |
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The synchronous controller is in step-up mode (backup) |
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Bit 2: |
chrg_cv |
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The charger is in constant voltage mode |
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Bit 3: |
chrg_uvlo |
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The charger is in under-voltage lockout or has been disabled by ctl_force_charger_off. |
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Bit 4: |
chrg_input_ilim |
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The charger is in input current limit |
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Bit 5: |
cappg |
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The capacitor voltage is above power good threshold |
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Bit 7: |
boost_en |
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Indicates the boost is enabled |
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Bit 8: |
buck_en |
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Indicates the charger is enabled |
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Bit 9: |
chrg_ci |
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Indicates the charger is in constant current mode |
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Bit 11: |
vingd |
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Indicates the input voltage is inside the UV/OV range. |