/*******************************************************************************
* File Name: cydevicegnu_trm.inc
* 
* PSoC Creator  3.3 DP1
*
* Description:
* This file provides all of the address values for the entire PSoC device.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
* Copyright (c) 2007-2016 Cypress Semiconductor.  All rights reserved.
* You may use this file only in accordance with the license, terms, conditions, 
* disclaimers, and limitations in the end user license agreement accompanying 
* the software package with which this file was provided.
********************************************************************************/

.set CYDEV_FLASH_BASE, 0x00000000
.set CYDEV_FLASH_SIZE, 0x00020000
.set CYREG_FLASH_DATA_MBASE, 0x00000000
.set CYREG_FLASH_DATA_MSIZE, 0x00020000
.set CYDEV_SFLASH_BASE, 0x0ffff000
.set CYDEV_SFLASH_SIZE, 0x00000800
.set CYREG_SFLASH_PROT_ROW0, 0x0ffff000
.set CYFLD_SFLASH_DATA8__OFFSET, 0x00000000
.set CYFLD_SFLASH_DATA8__SIZE, 0x00000008
.set CYREG_SFLASH_PROT_ROW1, 0x0ffff001
.set CYREG_SFLASH_PROT_ROW2, 0x0ffff002
.set CYREG_SFLASH_PROT_ROW3, 0x0ffff003
.set CYREG_SFLASH_PROT_ROW4, 0x0ffff004
.set CYREG_SFLASH_PROT_ROW5, 0x0ffff005
.set CYREG_SFLASH_PROT_ROW6, 0x0ffff006
.set CYREG_SFLASH_PROT_ROW7, 0x0ffff007
.set CYREG_SFLASH_PROT_ROW8, 0x0ffff008
.set CYREG_SFLASH_PROT_ROW9, 0x0ffff009
.set CYREG_SFLASH_PROT_ROW10, 0x0ffff00a
.set CYREG_SFLASH_PROT_ROW11, 0x0ffff00b
.set CYREG_SFLASH_PROT_ROW12, 0x0ffff00c
.set CYREG_SFLASH_PROT_ROW13, 0x0ffff00d
.set CYREG_SFLASH_PROT_ROW14, 0x0ffff00e
.set CYREG_SFLASH_PROT_ROW15, 0x0ffff00f
.set CYREG_SFLASH_PROT_ROW16, 0x0ffff010
.set CYREG_SFLASH_PROT_ROW17, 0x0ffff011
.set CYREG_SFLASH_PROT_ROW18, 0x0ffff012
.set CYREG_SFLASH_PROT_ROW19, 0x0ffff013
.set CYREG_SFLASH_PROT_ROW20, 0x0ffff014
.set CYREG_SFLASH_PROT_ROW21, 0x0ffff015
.set CYREG_SFLASH_PROT_ROW22, 0x0ffff016
.set CYREG_SFLASH_PROT_ROW23, 0x0ffff017
.set CYREG_SFLASH_PROT_ROW24, 0x0ffff018
.set CYREG_SFLASH_PROT_ROW25, 0x0ffff019
.set CYREG_SFLASH_PROT_ROW26, 0x0ffff01a
.set CYREG_SFLASH_PROT_ROW27, 0x0ffff01b
.set CYREG_SFLASH_PROT_ROW28, 0x0ffff01c
.set CYREG_SFLASH_PROT_ROW29, 0x0ffff01d
.set CYREG_SFLASH_PROT_ROW30, 0x0ffff01e
.set CYREG_SFLASH_PROT_ROW31, 0x0ffff01f
.set CYREG_SFLASH_PROT_ROW32, 0x0ffff020
.set CYREG_SFLASH_PROT_ROW33, 0x0ffff021
.set CYREG_SFLASH_PROT_ROW34, 0x0ffff022
.set CYREG_SFLASH_PROT_ROW35, 0x0ffff023
.set CYREG_SFLASH_PROT_ROW36, 0x0ffff024
.set CYREG_SFLASH_PROT_ROW37, 0x0ffff025
.set CYREG_SFLASH_PROT_ROW38, 0x0ffff026
.set CYREG_SFLASH_PROT_ROW39, 0x0ffff027
.set CYREG_SFLASH_PROT_ROW40, 0x0ffff028
.set CYREG_SFLASH_PROT_ROW41, 0x0ffff029
.set CYREG_SFLASH_PROT_ROW42, 0x0ffff02a
.set CYREG_SFLASH_PROT_ROW43, 0x0ffff02b
.set CYREG_SFLASH_PROT_ROW44, 0x0ffff02c
.set CYREG_SFLASH_PROT_ROW45, 0x0ffff02d
.set CYREG_SFLASH_PROT_ROW46, 0x0ffff02e
.set CYREG_SFLASH_PROT_ROW47, 0x0ffff02f
.set CYREG_SFLASH_PROT_ROW48, 0x0ffff030
.set CYREG_SFLASH_PROT_ROW49, 0x0ffff031
.set CYREG_SFLASH_PROT_ROW50, 0x0ffff032
.set CYREG_SFLASH_PROT_ROW51, 0x0ffff033
.set CYREG_SFLASH_PROT_ROW52, 0x0ffff034
.set CYREG_SFLASH_PROT_ROW53, 0x0ffff035
.set CYREG_SFLASH_PROT_ROW54, 0x0ffff036
.set CYREG_SFLASH_PROT_ROW55, 0x0ffff037
.set CYREG_SFLASH_PROT_ROW56, 0x0ffff038
.set CYREG_SFLASH_PROT_ROW57, 0x0ffff039
.set CYREG_SFLASH_PROT_ROW58, 0x0ffff03a
.set CYREG_SFLASH_PROT_ROW59, 0x0ffff03b
.set CYREG_SFLASH_PROT_ROW60, 0x0ffff03c
.set CYREG_SFLASH_PROT_ROW61, 0x0ffff03d
.set CYREG_SFLASH_PROT_ROW62, 0x0ffff03e
.set CYREG_SFLASH_PROT_ROW63, 0x0ffff03f
.set CYREG_SFLASH_PROT_PROTECTION, 0x0ffff07f
.set CYFLD_SFLASH_PROT_LEVEL__OFFSET, 0x00000000
.set CYFLD_SFLASH_PROT_LEVEL__SIZE, 0x00000002
.set CYVAL_SFLASH_PROT_LEVEL_VIRGIN, 0x00000001
.set CYVAL_SFLASH_PROT_LEVEL_OPEN, 0x00000000
.set CYVAL_SFLASH_PROT_LEVEL_PROTECTED, 0x00000002
.set CYVAL_SFLASH_PROT_LEVEL_KILL, 0x00000003
.set CYREG_SFLASH_AV_PAIRS_8B0, 0x0ffff080
.set CYREG_SFLASH_AV_PAIRS_8B1, 0x0ffff081
.set CYREG_SFLASH_AV_PAIRS_8B2, 0x0ffff082
.set CYREG_SFLASH_AV_PAIRS_8B3, 0x0ffff083
.set CYREG_SFLASH_AV_PAIRS_8B4, 0x0ffff084
.set CYREG_SFLASH_AV_PAIRS_8B5, 0x0ffff085
.set CYREG_SFLASH_AV_PAIRS_8B6, 0x0ffff086
.set CYREG_SFLASH_AV_PAIRS_8B7, 0x0ffff087
.set CYREG_SFLASH_AV_PAIRS_8B8, 0x0ffff088
.set CYREG_SFLASH_AV_PAIRS_8B9, 0x0ffff089
.set CYREG_SFLASH_AV_PAIRS_8B10, 0x0ffff08a
.set CYREG_SFLASH_AV_PAIRS_8B11, 0x0ffff08b
.set CYREG_SFLASH_AV_PAIRS_8B12, 0x0ffff08c
.set CYREG_SFLASH_AV_PAIRS_8B13, 0x0ffff08d
.set CYREG_SFLASH_AV_PAIRS_8B14, 0x0ffff08e
.set CYREG_SFLASH_AV_PAIRS_8B15, 0x0ffff08f
.set CYREG_SFLASH_AV_PAIRS_8B16, 0x0ffff090
.set CYREG_SFLASH_AV_PAIRS_8B17, 0x0ffff091
.set CYREG_SFLASH_AV_PAIRS_8B18, 0x0ffff092
.set CYREG_SFLASH_AV_PAIRS_8B19, 0x0ffff093
.set CYREG_SFLASH_AV_PAIRS_8B20, 0x0ffff094
.set CYREG_SFLASH_AV_PAIRS_8B21, 0x0ffff095
.set CYREG_SFLASH_AV_PAIRS_8B22, 0x0ffff096
.set CYREG_SFLASH_AV_PAIRS_8B23, 0x0ffff097
.set CYREG_SFLASH_AV_PAIRS_8B24, 0x0ffff098
.set CYREG_SFLASH_AV_PAIRS_8B25, 0x0ffff099
.set CYREG_SFLASH_AV_PAIRS_8B26, 0x0ffff09a
.set CYREG_SFLASH_AV_PAIRS_8B27, 0x0ffff09b
.set CYREG_SFLASH_AV_PAIRS_8B28, 0x0ffff09c
.set CYREG_SFLASH_AV_PAIRS_8B29, 0x0ffff09d
.set CYREG_SFLASH_AV_PAIRS_8B30, 0x0ffff09e
.set CYREG_SFLASH_AV_PAIRS_8B31, 0x0ffff09f
.set CYREG_SFLASH_AV_PAIRS_8B32, 0x0ffff0a0
.set CYREG_SFLASH_AV_PAIRS_8B33, 0x0ffff0a1
.set CYREG_SFLASH_AV_PAIRS_8B34, 0x0ffff0a2
.set CYREG_SFLASH_AV_PAIRS_8B35, 0x0ffff0a3
.set CYREG_SFLASH_AV_PAIRS_8B36, 0x0ffff0a4
.set CYREG_SFLASH_AV_PAIRS_8B37, 0x0ffff0a5
.set CYREG_SFLASH_AV_PAIRS_8B38, 0x0ffff0a6
.set CYREG_SFLASH_AV_PAIRS_8B39, 0x0ffff0a7
.set CYREG_SFLASH_AV_PAIRS_8B40, 0x0ffff0a8
.set CYREG_SFLASH_AV_PAIRS_8B41, 0x0ffff0a9
.set CYREG_SFLASH_AV_PAIRS_8B42, 0x0ffff0aa
.set CYREG_SFLASH_AV_PAIRS_8B43, 0x0ffff0ab
.set CYREG_SFLASH_AV_PAIRS_8B44, 0x0ffff0ac
.set CYREG_SFLASH_AV_PAIRS_8B45, 0x0ffff0ad
.set CYREG_SFLASH_AV_PAIRS_8B46, 0x0ffff0ae
.set CYREG_SFLASH_AV_PAIRS_8B47, 0x0ffff0af
.set CYREG_SFLASH_AV_PAIRS_8B48, 0x0ffff0b0
.set CYREG_SFLASH_AV_PAIRS_8B49, 0x0ffff0b1
.set CYREG_SFLASH_AV_PAIRS_8B50, 0x0ffff0b2
.set CYREG_SFLASH_AV_PAIRS_8B51, 0x0ffff0b3
.set CYREG_SFLASH_AV_PAIRS_8B52, 0x0ffff0b4
.set CYREG_SFLASH_AV_PAIRS_8B53, 0x0ffff0b5
.set CYREG_SFLASH_AV_PAIRS_8B54, 0x0ffff0b6
.set CYREG_SFLASH_AV_PAIRS_8B55, 0x0ffff0b7
.set CYREG_SFLASH_AV_PAIRS_8B56, 0x0ffff0b8
.set CYREG_SFLASH_AV_PAIRS_8B57, 0x0ffff0b9
.set CYREG_SFLASH_AV_PAIRS_8B58, 0x0ffff0ba
.set CYREG_SFLASH_AV_PAIRS_8B59, 0x0ffff0bb
.set CYREG_SFLASH_AV_PAIRS_8B60, 0x0ffff0bc
.set CYREG_SFLASH_AV_PAIRS_8B61, 0x0ffff0bd
.set CYREG_SFLASH_AV_PAIRS_8B62, 0x0ffff0be
.set CYREG_SFLASH_AV_PAIRS_8B63, 0x0ffff0bf
.set CYREG_SFLASH_AV_PAIRS_8B64, 0x0ffff0c0
.set CYREG_SFLASH_AV_PAIRS_8B65, 0x0ffff0c1
.set CYREG_SFLASH_AV_PAIRS_8B66, 0x0ffff0c2
.set CYREG_SFLASH_AV_PAIRS_8B67, 0x0ffff0c3
.set CYREG_SFLASH_AV_PAIRS_8B68, 0x0ffff0c4
.set CYREG_SFLASH_AV_PAIRS_8B69, 0x0ffff0c5
.set CYREG_SFLASH_AV_PAIRS_8B70, 0x0ffff0c6
.set CYREG_SFLASH_AV_PAIRS_8B71, 0x0ffff0c7
.set CYREG_SFLASH_AV_PAIRS_8B72, 0x0ffff0c8
.set CYREG_SFLASH_AV_PAIRS_8B73, 0x0ffff0c9
.set CYREG_SFLASH_AV_PAIRS_8B74, 0x0ffff0ca
.set CYREG_SFLASH_AV_PAIRS_8B75, 0x0ffff0cb
.set CYREG_SFLASH_AV_PAIRS_8B76, 0x0ffff0cc
.set CYREG_SFLASH_AV_PAIRS_8B77, 0x0ffff0cd
.set CYREG_SFLASH_AV_PAIRS_8B78, 0x0ffff0ce
.set CYREG_SFLASH_AV_PAIRS_8B79, 0x0ffff0cf
.set CYREG_SFLASH_AV_PAIRS_8B80, 0x0ffff0d0
.set CYREG_SFLASH_AV_PAIRS_8B81, 0x0ffff0d1
.set CYREG_SFLASH_AV_PAIRS_8B82, 0x0ffff0d2
.set CYREG_SFLASH_AV_PAIRS_8B83, 0x0ffff0d3
.set CYREG_SFLASH_AV_PAIRS_8B84, 0x0ffff0d4
.set CYREG_SFLASH_AV_PAIRS_8B85, 0x0ffff0d5
.set CYREG_SFLASH_AV_PAIRS_8B86, 0x0ffff0d6
.set CYREG_SFLASH_AV_PAIRS_8B87, 0x0ffff0d7
.set CYREG_SFLASH_AV_PAIRS_8B88, 0x0ffff0d8
.set CYREG_SFLASH_AV_PAIRS_8B89, 0x0ffff0d9
.set CYREG_SFLASH_AV_PAIRS_8B90, 0x0ffff0da
.set CYREG_SFLASH_AV_PAIRS_8B91, 0x0ffff0db
.set CYREG_SFLASH_AV_PAIRS_8B92, 0x0ffff0dc
.set CYREG_SFLASH_AV_PAIRS_8B93, 0x0ffff0dd
.set CYREG_SFLASH_AV_PAIRS_8B94, 0x0ffff0de
.set CYREG_SFLASH_AV_PAIRS_8B95, 0x0ffff0df
.set CYREG_SFLASH_AV_PAIRS_8B96, 0x0ffff0e0
.set CYREG_SFLASH_AV_PAIRS_8B97, 0x0ffff0e1
.set CYREG_SFLASH_AV_PAIRS_8B98, 0x0ffff0e2
.set CYREG_SFLASH_AV_PAIRS_8B99, 0x0ffff0e3
.set CYREG_SFLASH_AV_PAIRS_8B100, 0x0ffff0e4
.set CYREG_SFLASH_AV_PAIRS_8B101, 0x0ffff0e5
.set CYREG_SFLASH_AV_PAIRS_8B102, 0x0ffff0e6
.set CYREG_SFLASH_AV_PAIRS_8B103, 0x0ffff0e7
.set CYREG_SFLASH_AV_PAIRS_8B104, 0x0ffff0e8
.set CYREG_SFLASH_AV_PAIRS_8B105, 0x0ffff0e9
.set CYREG_SFLASH_AV_PAIRS_8B106, 0x0ffff0ea
.set CYREG_SFLASH_AV_PAIRS_8B107, 0x0ffff0eb
.set CYREG_SFLASH_AV_PAIRS_8B108, 0x0ffff0ec
.set CYREG_SFLASH_AV_PAIRS_8B109, 0x0ffff0ed
.set CYREG_SFLASH_AV_PAIRS_8B110, 0x0ffff0ee
.set CYREG_SFLASH_AV_PAIRS_8B111, 0x0ffff0ef
.set CYREG_SFLASH_AV_PAIRS_8B112, 0x0ffff0f0
.set CYREG_SFLASH_AV_PAIRS_8B113, 0x0ffff0f1
.set CYREG_SFLASH_AV_PAIRS_8B114, 0x0ffff0f2
.set CYREG_SFLASH_AV_PAIRS_8B115, 0x0ffff0f3
.set CYREG_SFLASH_AV_PAIRS_8B116, 0x0ffff0f4
.set CYREG_SFLASH_AV_PAIRS_8B117, 0x0ffff0f5
.set CYREG_SFLASH_AV_PAIRS_8B118, 0x0ffff0f6
.set CYREG_SFLASH_AV_PAIRS_8B119, 0x0ffff0f7
.set CYREG_SFLASH_AV_PAIRS_8B120, 0x0ffff0f8
.set CYREG_SFLASH_AV_PAIRS_8B121, 0x0ffff0f9
.set CYREG_SFLASH_AV_PAIRS_8B122, 0x0ffff0fa
.set CYREG_SFLASH_AV_PAIRS_8B123, 0x0ffff0fb
.set CYREG_SFLASH_AV_PAIRS_8B124, 0x0ffff0fc
.set CYREG_SFLASH_AV_PAIRS_8B125, 0x0ffff0fd
.set CYREG_SFLASH_AV_PAIRS_8B126, 0x0ffff0fe
.set CYREG_SFLASH_AV_PAIRS_8B127, 0x0ffff0ff
.set CYREG_SFLASH_AV_PAIRS_32B0, 0x0ffff100
.set CYFLD_SFLASH_DATA32__OFFSET, 0x00000000
.set CYFLD_SFLASH_DATA32__SIZE, 0x00000020
.set CYREG_SFLASH_AV_PAIRS_32B1, 0x0ffff104
.set CYREG_SFLASH_AV_PAIRS_32B2, 0x0ffff108
.set CYREG_SFLASH_AV_PAIRS_32B3, 0x0ffff10c
.set CYREG_SFLASH_AV_PAIRS_32B4, 0x0ffff110
.set CYREG_SFLASH_AV_PAIRS_32B5, 0x0ffff114
.set CYREG_SFLASH_AV_PAIRS_32B6, 0x0ffff118
.set CYREG_SFLASH_AV_PAIRS_32B7, 0x0ffff11c
.set CYREG_SFLASH_AV_PAIRS_32B8, 0x0ffff120
.set CYREG_SFLASH_AV_PAIRS_32B9, 0x0ffff124
.set CYREG_SFLASH_AV_PAIRS_32B10, 0x0ffff128
.set CYREG_SFLASH_AV_PAIRS_32B11, 0x0ffff12c
.set CYREG_SFLASH_AV_PAIRS_32B12, 0x0ffff130
.set CYREG_SFLASH_AV_PAIRS_32B13, 0x0ffff134
.set CYREG_SFLASH_AV_PAIRS_32B14, 0x0ffff138
.set CYREG_SFLASH_AV_PAIRS_32B15, 0x0ffff13c
.set CYREG_SFLASH_CPUSS_WOUNDING, 0x0ffff140
.set CYREG_SFLASH_SILICON_ID, 0x0ffff144
.set CYFLD_SFLASH_ID__OFFSET, 0x00000000
.set CYFLD_SFLASH_ID__SIZE, 0x00000010
.set CYREG_SFLASH_CPUSS_PRIV_RAM, 0x0ffff148
.set CYFLD_SFLASH_RAM_PROT_LIMIT__OFFSET, 0x00000000
.set CYFLD_SFLASH_RAM_PROT_LIMIT__SIZE, 0x00000009
.set CYREG_SFLASH_CPUSS_PRIV_ROM_BROM, 0x0ffff14a
.set CYFLD_SFLASH_BROM_PROT_LIMIT__OFFSET, 0x00000000
.set CYFLD_SFLASH_BROM_PROT_LIMIT__SIZE, 0x00000008
.set CYREG_SFLASH_CPUSS_PRIV_FLASH, 0x0ffff14c
.set CYFLD_SFLASH_FLASH_PROT_LIMIT__OFFSET, 0x00000000
.set CYFLD_SFLASH_FLASH_PROT_LIMIT__SIZE, 0x0000000b
.set CYREG_SFLASH_CPUSS_PRIV_ROM_SROM, 0x0ffff14e
.set CYFLD_SFLASH_SROM_PROT_LIMIT__OFFSET, 0x00000000
.set CYFLD_SFLASH_SROM_PROT_LIMIT__SIZE, 0x0000000a
.set CYREG_SFLASH_HIB_KEY_DELAY, 0x0ffff150
.set CYFLD_SFLASH_WAKEUP_HOLDOFF__OFFSET, 0x00000000
.set CYFLD_SFLASH_WAKEUP_HOLDOFF__SIZE, 0x0000000a
.set CYREG_SFLASH_DPSLP_KEY_DELAY, 0x0ffff152
.set CYREG_SFLASH_SWD_CONFIG, 0x0ffff154
.set CYFLD_SFLASH_SWD_SELECT__OFFSET, 0x00000000
.set CYFLD_SFLASH_SWD_SELECT__SIZE, 0x00000001
.set CYREG_SFLASH_INITIAL_SPCIF_TRIM_M1_DAC0, 0x0ffff155
.set CYFLD_SFLASH_IDAC__OFFSET, 0x00000000
.set CYFLD_SFLASH_IDAC__SIZE, 0x00000005
.set CYFLD_SFLASH_SLOPE__OFFSET, 0x00000005
.set CYFLD_SFLASH_SLOPE__SIZE, 0x00000003
.set CYREG_SFLASH_SWD_LISTEN, 0x0ffff158
.set CYFLD_SFLASH_CYCLES__OFFSET, 0x00000000
.set CYFLD_SFLASH_CYCLES__SIZE, 0x00000020
.set CYREG_SFLASH_FLASH_START, 0x0ffff15c
.set CYFLD_SFLASH_ADDRESS__OFFSET, 0x00000000
.set CYFLD_SFLASH_ADDRESS__SIZE, 0x00000020
.set CYREG_SFLASH_SKIP_CHECKSUM, 0x0ffff169
.set CYFLD_SFLASH_SKIP__OFFSET, 0x00000000
.set CYFLD_SFLASH_SKIP__SIZE, 0x00000008
.set CYREG_SFLASH_INITIAL_PWR_BG_TRIM1, 0x0ffff16a
.set CYFLD_SFLASH_REF_ITRIM__OFFSET, 0x00000000
.set CYFLD_SFLASH_REF_ITRIM__SIZE, 0x00000006
.set CYREG_SFLASH_INITIAL_PWR_BG_TRIM1_INV, 0x0ffff16b
.set CYREG_SFLASH_INITIAL_PWR_BG_TRIM2, 0x0ffff16c
.set CYREG_SFLASH_INITIAL_PWR_BG_TRIM2_INV, 0x0ffff16d
.set CYREG_SFLASH_INITIAL_SPCIF_TRIM_M0_DAC0, 0x0ffff16e
.set CYREG_SFLASH_INITIAL_SPCIF_TRIM_M0_DAC0_INV, 0x0ffff16f
.set CYREG_SFLASH_PROT_VIRGINKEY0, 0x0ffff170
.set CYFLD_SFLASH_KEY8__OFFSET, 0x00000000
.set CYFLD_SFLASH_KEY8__SIZE, 0x00000008
.set CYREG_SFLASH_PROT_VIRGINKEY1, 0x0ffff171
.set CYREG_SFLASH_PROT_VIRGINKEY2, 0x0ffff172
.set CYREG_SFLASH_PROT_VIRGINKEY3, 0x0ffff173
.set CYREG_SFLASH_PROT_VIRGINKEY4, 0x0ffff174
.set CYREG_SFLASH_PROT_VIRGINKEY5, 0x0ffff175
.set CYREG_SFLASH_PROT_VIRGINKEY6, 0x0ffff176
.set CYREG_SFLASH_PROT_VIRGINKEY7, 0x0ffff177
.set CYREG_SFLASH_DIE_LOT0, 0x0ffff178
.set CYFLD_SFLASH_LOT__OFFSET, 0x00000000
.set CYFLD_SFLASH_LOT__SIZE, 0x00000008
.set CYREG_SFLASH_DIE_LOT1, 0x0ffff179
.set CYREG_SFLASH_DIE_LOT2, 0x0ffff17a
.set CYREG_SFLASH_DIE_WAFER, 0x0ffff17b
.set CYFLD_SFLASH_WAFER__OFFSET, 0x00000000
.set CYFLD_SFLASH_WAFER__SIZE, 0x00000008
.set CYREG_SFLASH_DIE_X, 0x0ffff17c
.set CYFLD_SFLASH_X__OFFSET, 0x00000000
.set CYFLD_SFLASH_X__SIZE, 0x00000008
.set CYREG_SFLASH_DIE_Y, 0x0ffff17d
.set CYFLD_SFLASH_Y__OFFSET, 0x00000000
.set CYFLD_SFLASH_Y__SIZE, 0x00000008
.set CYREG_SFLASH_DIE_SORT, 0x0ffff17e
.set CYFLD_SFLASH_S1_PASS__OFFSET, 0x00000000
.set CYFLD_SFLASH_S1_PASS__SIZE, 0x00000001
.set CYFLD_SFLASH_S2_PASS__OFFSET, 0x00000001
.set CYFLD_SFLASH_S2_PASS__SIZE, 0x00000001
.set CYFLD_SFLASH_S3_PASS__OFFSET, 0x00000002
.set CYFLD_SFLASH_S3_PASS__SIZE, 0x00000001
.set CYFLD_SFLASH_CRI_PASS__OFFSET, 0x00000003
.set CYFLD_SFLASH_CRI_PASS__SIZE, 0x00000001
.set CYFLD_SFLASH_CHI_PASS__OFFSET, 0x00000004
.set CYFLD_SFLASH_CHI_PASS__SIZE, 0x00000001
.set CYFLD_SFLASH_ENG_PASS__OFFSET, 0x00000005
.set CYFLD_SFLASH_ENG_PASS__SIZE, 0x00000001
.set CYREG_SFLASH_DIE_MINOR, 0x0ffff17f
.set CYFLD_SFLASH_MINOR__OFFSET, 0x00000000
.set CYFLD_SFLASH_MINOR__SIZE, 0x00000008
.set CYREG_SFLASH_PE_TE_DATA0, 0x0ffff180
.set CYREG_SFLASH_PE_TE_DATA1, 0x0ffff181
.set CYREG_SFLASH_PE_TE_DATA2, 0x0ffff182
.set CYREG_SFLASH_PE_TE_DATA3, 0x0ffff183
.set CYREG_SFLASH_PE_TE_DATA4, 0x0ffff184
.set CYREG_SFLASH_PE_TE_DATA5, 0x0ffff185
.set CYREG_SFLASH_PE_TE_DATA6, 0x0ffff186
.set CYREG_SFLASH_PE_TE_DATA7, 0x0ffff187
.set CYREG_SFLASH_PE_TE_DATA8, 0x0ffff188
.set CYREG_SFLASH_PE_TE_DATA9, 0x0ffff189
.set CYREG_SFLASH_PE_TE_DATA10, 0x0ffff18a
.set CYREG_SFLASH_PE_TE_DATA11, 0x0ffff18b
.set CYREG_SFLASH_PE_TE_DATA12, 0x0ffff18c
.set CYREG_SFLASH_PE_TE_DATA13, 0x0ffff18d
.set CYREG_SFLASH_PE_TE_DATA14, 0x0ffff18e
.set CYREG_SFLASH_PE_TE_DATA15, 0x0ffff18f
.set CYREG_SFLASH_PE_TE_DATA16, 0x0ffff190
.set CYREG_SFLASH_PE_TE_DATA17, 0x0ffff191
.set CYREG_SFLASH_PE_TE_DATA18, 0x0ffff192
.set CYREG_SFLASH_PE_TE_DATA19, 0x0ffff193
.set CYREG_SFLASH_PE_TE_DATA20, 0x0ffff194
.set CYREG_SFLASH_PE_TE_DATA21, 0x0ffff195
.set CYREG_SFLASH_PE_TE_DATA22, 0x0ffff196
.set CYREG_SFLASH_PE_TE_DATA23, 0x0ffff197
.set CYREG_SFLASH_PE_TE_DATA24, 0x0ffff198
.set CYREG_SFLASH_PE_TE_DATA25, 0x0ffff199
.set CYREG_SFLASH_PE_TE_DATA26, 0x0ffff19a
.set CYREG_SFLASH_PE_TE_DATA27, 0x0ffff19b
.set CYREG_SFLASH_PE_TE_DATA28, 0x0ffff19c
.set CYREG_SFLASH_PE_TE_DATA29, 0x0ffff19d
.set CYREG_SFLASH_PE_TE_DATA30, 0x0ffff19e
.set CYREG_SFLASH_PE_TE_DATA31, 0x0ffff19f
.set CYREG_SFLASH_PP, 0x0ffff1a0
.set CYFLD_SFLASH_PERIOD__OFFSET, 0x00000000
.set CYFLD_SFLASH_PERIOD__SIZE, 0x00000018
.set CYFLD_SFLASH_PDAC__OFFSET, 0x00000018
.set CYFLD_SFLASH_PDAC__SIZE, 0x00000004
.set CYFLD_SFLASH_NDAC__OFFSET, 0x0000001c
.set CYFLD_SFLASH_NDAC__SIZE, 0x00000004
.set CYREG_SFLASH_E, 0x0ffff1a4
.set CYREG_SFLASH_P, 0x0ffff1a8
.set CYREG_SFLASH_EA_E, 0x0ffff1ac
.set CYREG_SFLASH_EA_P, 0x0ffff1b0
.set CYREG_SFLASH_ES_E, 0x0ffff1b4
.set CYREG_SFLASH_ES_P_EO, 0x0ffff1b8
.set CYREG_SFLASH_IMO_TRIM_USBMODE_24, 0x0ffff1be
.set CYFLD_SFLASH_TRIM_24__OFFSET, 0x00000000
.set CYFLD_SFLASH_TRIM_24__SIZE, 0x00000008
.set CYREG_SFLASH_IMO_TRIM_USBMODE_48, 0x0ffff1bf
.set CYREG_SFLASH_IMO_TCTRIM_LT0, 0x0ffff1cc
.set CYFLD_SFLASH_STEPSIZE__OFFSET, 0x00000000
.set CYFLD_SFLASH_STEPSIZE__SIZE, 0x00000005
.set CYFLD_SFLASH_TCTRIM__OFFSET, 0x00000005
.set CYFLD_SFLASH_TCTRIM__SIZE, 0x00000002
.set CYREG_SFLASH_IMO_TCTRIM_LT1, 0x0ffff1cd
.set CYREG_SFLASH_IMO_TCTRIM_LT2, 0x0ffff1ce
.set CYREG_SFLASH_IMO_TCTRIM_LT3, 0x0ffff1cf
.set CYREG_SFLASH_IMO_TCTRIM_LT4, 0x0ffff1d0
.set CYREG_SFLASH_IMO_TCTRIM_LT5, 0x0ffff1d1
.set CYREG_SFLASH_IMO_TCTRIM_LT6, 0x0ffff1d2
.set CYREG_SFLASH_IMO_TCTRIM_LT7, 0x0ffff1d3
.set CYREG_SFLASH_IMO_TCTRIM_LT8, 0x0ffff1d4
.set CYREG_SFLASH_IMO_TCTRIM_LT9, 0x0ffff1d5
.set CYREG_SFLASH_IMO_TCTRIM_LT10, 0x0ffff1d6
.set CYREG_SFLASH_IMO_TCTRIM_LT11, 0x0ffff1d7
.set CYREG_SFLASH_IMO_TCTRIM_LT12, 0x0ffff1d8
.set CYREG_SFLASH_IMO_TCTRIM_LT13, 0x0ffff1d9
.set CYREG_SFLASH_IMO_TCTRIM_LT14, 0x0ffff1da
.set CYREG_SFLASH_IMO_TCTRIM_LT15, 0x0ffff1db
.set CYREG_SFLASH_IMO_TCTRIM_LT16, 0x0ffff1dc
.set CYREG_SFLASH_IMO_TCTRIM_LT17, 0x0ffff1dd
.set CYREG_SFLASH_IMO_TCTRIM_LT18, 0x0ffff1de
.set CYREG_SFLASH_IMO_TCTRIM_LT19, 0x0ffff1df
.set CYREG_SFLASH_IMO_TCTRIM_LT20, 0x0ffff1e0
.set CYREG_SFLASH_IMO_TCTRIM_LT21, 0x0ffff1e1
.set CYREG_SFLASH_IMO_TCTRIM_LT22, 0x0ffff1e2
.set CYREG_SFLASH_IMO_TCTRIM_LT23, 0x0ffff1e3
.set CYREG_SFLASH_IMO_TCTRIM_LT24, 0x0ffff1e4
.set CYREG_SFLASH_IMO_TRIM_LT0, 0x0ffff1e5
.set CYFLD_SFLASH_OFFSET__OFFSET, 0x00000000
.set CYFLD_SFLASH_OFFSET__SIZE, 0x00000008
.set CYREG_SFLASH_IMO_TRIM_LT1, 0x0ffff1e6
.set CYREG_SFLASH_IMO_TRIM_LT2, 0x0ffff1e7
.set CYREG_SFLASH_IMO_TRIM_LT3, 0x0ffff1e8
.set CYREG_SFLASH_IMO_TRIM_LT4, 0x0ffff1e9
.set CYREG_SFLASH_IMO_TRIM_LT5, 0x0ffff1ea
.set CYREG_SFLASH_IMO_TRIM_LT6, 0x0ffff1eb
.set CYREG_SFLASH_IMO_TRIM_LT7, 0x0ffff1ec
.set CYREG_SFLASH_IMO_TRIM_LT8, 0x0ffff1ed
.set CYREG_SFLASH_IMO_TRIM_LT9, 0x0ffff1ee
.set CYREG_SFLASH_IMO_TRIM_LT10, 0x0ffff1ef
.set CYREG_SFLASH_IMO_TRIM_LT11, 0x0ffff1f0
.set CYREG_SFLASH_IMO_TRIM_LT12, 0x0ffff1f1
.set CYREG_SFLASH_IMO_TRIM_LT13, 0x0ffff1f2
.set CYREG_SFLASH_IMO_TRIM_LT14, 0x0ffff1f3
.set CYREG_SFLASH_IMO_TRIM_LT15, 0x0ffff1f4
.set CYREG_SFLASH_IMO_TRIM_LT16, 0x0ffff1f5
.set CYREG_SFLASH_IMO_TRIM_LT17, 0x0ffff1f6
.set CYREG_SFLASH_IMO_TRIM_LT18, 0x0ffff1f7
.set CYREG_SFLASH_IMO_TRIM_LT19, 0x0ffff1f8
.set CYREG_SFLASH_IMO_TRIM_LT20, 0x0ffff1f9
.set CYREG_SFLASH_IMO_TRIM_LT21, 0x0ffff1fa
.set CYREG_SFLASH_IMO_TRIM_LT22, 0x0ffff1fb
.set CYREG_SFLASH_IMO_TRIM_LT23, 0x0ffff1fc
.set CYREG_SFLASH_IMO_TRIM_LT24, 0x0ffff1fd
.set CYREG_SFLASH_CHECKSUM, 0x0ffff1fe
.set CYFLD_SFLASH_CHECKSUM__OFFSET, 0x00000000
.set CYFLD_SFLASH_CHECKSUM__SIZE, 0x00000010
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH0, 0x0ffff200
.set CYFLD_SFLASH_BYTE_MEM__OFFSET, 0x00000000
.set CYFLD_SFLASH_BYTE_MEM__SIZE, 0x00000008
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH1, 0x0ffff201
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH2, 0x0ffff202
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH3, 0x0ffff203
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH4, 0x0ffff204
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH5, 0x0ffff205
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH6, 0x0ffff206
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH7, 0x0ffff207
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH8, 0x0ffff208
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH9, 0x0ffff209
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH10, 0x0ffff20a
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH11, 0x0ffff20b
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH12, 0x0ffff20c
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH13, 0x0ffff20d
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH14, 0x0ffff20e
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH15, 0x0ffff20f
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH16, 0x0ffff210
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH17, 0x0ffff211
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH18, 0x0ffff212
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH19, 0x0ffff213
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH20, 0x0ffff214
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH21, 0x0ffff215
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH22, 0x0ffff216
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH23, 0x0ffff217
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH24, 0x0ffff218
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH25, 0x0ffff219
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH26, 0x0ffff21a
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH27, 0x0ffff21b
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH28, 0x0ffff21c
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH29, 0x0ffff21d
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH30, 0x0ffff21e
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH31, 0x0ffff21f
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH32, 0x0ffff220
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH33, 0x0ffff221
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH34, 0x0ffff222
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH35, 0x0ffff223
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH36, 0x0ffff224
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH37, 0x0ffff225
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH38, 0x0ffff226
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH39, 0x0ffff227
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH40, 0x0ffff228
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH41, 0x0ffff229
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH42, 0x0ffff22a
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH43, 0x0ffff22b
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH44, 0x0ffff22c
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH45, 0x0ffff22d
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH46, 0x0ffff22e
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH47, 0x0ffff22f
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH48, 0x0ffff230
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH49, 0x0ffff231
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH50, 0x0ffff232
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH51, 0x0ffff233
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH52, 0x0ffff234
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH53, 0x0ffff235
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH54, 0x0ffff236
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH55, 0x0ffff237
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH56, 0x0ffff238
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH57, 0x0ffff239
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH58, 0x0ffff23a
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH59, 0x0ffff23b
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH60, 0x0ffff23c
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH61, 0x0ffff23d
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH62, 0x0ffff23e
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH63, 0x0ffff23f
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH64, 0x0ffff240
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH65, 0x0ffff241
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH66, 0x0ffff242
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH67, 0x0ffff243
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH68, 0x0ffff244
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH69, 0x0ffff245
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH70, 0x0ffff246
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH71, 0x0ffff247
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH72, 0x0ffff248
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH73, 0x0ffff249
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH74, 0x0ffff24a
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH75, 0x0ffff24b
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH76, 0x0ffff24c
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH77, 0x0ffff24d
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH78, 0x0ffff24e
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH79, 0x0ffff24f
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH80, 0x0ffff250
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH81, 0x0ffff251
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH82, 0x0ffff252
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH83, 0x0ffff253
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH84, 0x0ffff254
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH85, 0x0ffff255
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH86, 0x0ffff256
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH87, 0x0ffff257
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH88, 0x0ffff258
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH89, 0x0ffff259
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH90, 0x0ffff25a
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH91, 0x0ffff25b
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH92, 0x0ffff25c
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH93, 0x0ffff25d
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH94, 0x0ffff25e
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH95, 0x0ffff25f
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH96, 0x0ffff260
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH97, 0x0ffff261
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH98, 0x0ffff262
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH99, 0x0ffff263
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH100, 0x0ffff264
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH101, 0x0ffff265
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH102, 0x0ffff266
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH103, 0x0ffff267
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH104, 0x0ffff268
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH105, 0x0ffff269
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH106, 0x0ffff26a
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH107, 0x0ffff26b
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH108, 0x0ffff26c
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH109, 0x0ffff26d
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH110, 0x0ffff26e
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH111, 0x0ffff26f
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH112, 0x0ffff270
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH113, 0x0ffff271
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH114, 0x0ffff272
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH115, 0x0ffff273
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH116, 0x0ffff274
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH117, 0x0ffff275
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH118, 0x0ffff276
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH119, 0x0ffff277
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH120, 0x0ffff278
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH121, 0x0ffff279
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH122, 0x0ffff27a
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH123, 0x0ffff27b
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH124, 0x0ffff27c
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH125, 0x0ffff27d
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH126, 0x0ffff27e
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH127, 0x0ffff27f
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH128, 0x0ffff280
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH129, 0x0ffff281
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH130, 0x0ffff282
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH131, 0x0ffff283
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH132, 0x0ffff284
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH133, 0x0ffff285
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH134, 0x0ffff286
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH135, 0x0ffff287
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH136, 0x0ffff288
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH137, 0x0ffff289
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH138, 0x0ffff28a
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH139, 0x0ffff28b
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH140, 0x0ffff28c
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH141, 0x0ffff28d
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH142, 0x0ffff28e
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH143, 0x0ffff28f
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH144, 0x0ffff290
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH145, 0x0ffff291
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH146, 0x0ffff292
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH147, 0x0ffff293
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH148, 0x0ffff294
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH149, 0x0ffff295
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH150, 0x0ffff296
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH151, 0x0ffff297
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH152, 0x0ffff298
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH153, 0x0ffff299
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH154, 0x0ffff29a
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH155, 0x0ffff29b
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH156, 0x0ffff29c
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH157, 0x0ffff29d
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH158, 0x0ffff29e
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH159, 0x0ffff29f
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH160, 0x0ffff2a0
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH161, 0x0ffff2a1
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH162, 0x0ffff2a2
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH163, 0x0ffff2a3
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH164, 0x0ffff2a4
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH165, 0x0ffff2a5
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH166, 0x0ffff2a6
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH167, 0x0ffff2a7
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH168, 0x0ffff2a8
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH169, 0x0ffff2a9
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH170, 0x0ffff2aa
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH171, 0x0ffff2ab
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH172, 0x0ffff2ac
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH173, 0x0ffff2ad
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH174, 0x0ffff2ae
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH175, 0x0ffff2af
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH176, 0x0ffff2b0
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH177, 0x0ffff2b1
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH178, 0x0ffff2b2
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH179, 0x0ffff2b3
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH180, 0x0ffff2b4
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH181, 0x0ffff2b5
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH182, 0x0ffff2b6
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH183, 0x0ffff2b7
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH184, 0x0ffff2b8
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH185, 0x0ffff2b9
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH186, 0x0ffff2ba
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH187, 0x0ffff2bb
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH188, 0x0ffff2bc
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH189, 0x0ffff2bd
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH190, 0x0ffff2be
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH191, 0x0ffff2bf
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH192, 0x0ffff2c0
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH193, 0x0ffff2c1
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH194, 0x0ffff2c2
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH195, 0x0ffff2c3
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH196, 0x0ffff2c4
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH197, 0x0ffff2c5
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH198, 0x0ffff2c6
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH199, 0x0ffff2c7
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH200, 0x0ffff2c8
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH201, 0x0ffff2c9
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH202, 0x0ffff2ca
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH203, 0x0ffff2cb
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH204, 0x0ffff2cc
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH205, 0x0ffff2cd
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH206, 0x0ffff2ce
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH207, 0x0ffff2cf
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH208, 0x0ffff2d0
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH209, 0x0ffff2d1
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH210, 0x0ffff2d2
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH211, 0x0ffff2d3
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH212, 0x0ffff2d4
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH213, 0x0ffff2d5
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH214, 0x0ffff2d6
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH215, 0x0ffff2d7
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH216, 0x0ffff2d8
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH217, 0x0ffff2d9
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH218, 0x0ffff2da
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH219, 0x0ffff2db
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH220, 0x0ffff2dc
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH221, 0x0ffff2dd
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH222, 0x0ffff2de
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH223, 0x0ffff2df
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH224, 0x0ffff2e0
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH225, 0x0ffff2e1
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH226, 0x0ffff2e2
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH227, 0x0ffff2e3
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH228, 0x0ffff2e4
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH229, 0x0ffff2e5
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH230, 0x0ffff2e6
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH231, 0x0ffff2e7
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH232, 0x0ffff2e8
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH233, 0x0ffff2e9
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH234, 0x0ffff2ea
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH235, 0x0ffff2eb
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH236, 0x0ffff2ec
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH237, 0x0ffff2ed
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH238, 0x0ffff2ee
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH239, 0x0ffff2ef
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH240, 0x0ffff2f0
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH241, 0x0ffff2f1
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH242, 0x0ffff2f2
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH243, 0x0ffff2f3
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH244, 0x0ffff2f4
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH245, 0x0ffff2f5
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH246, 0x0ffff2f6
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH247, 0x0ffff2f7
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH248, 0x0ffff2f8
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH249, 0x0ffff2f9
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH250, 0x0ffff2fa
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH251, 0x0ffff2fb
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH252, 0x0ffff2fc
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH253, 0x0ffff2fd
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH254, 0x0ffff2fe
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH255, 0x0ffff2ff
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH256, 0x0ffff300
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH257, 0x0ffff301
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH258, 0x0ffff302
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH259, 0x0ffff303
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH260, 0x0ffff304
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH261, 0x0ffff305
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH262, 0x0ffff306
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH263, 0x0ffff307
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH264, 0x0ffff308
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH265, 0x0ffff309
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH266, 0x0ffff30a
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH267, 0x0ffff30b
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH268, 0x0ffff30c
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH269, 0x0ffff30d
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH270, 0x0ffff30e
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH271, 0x0ffff30f
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH272, 0x0ffff310
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH273, 0x0ffff311
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH274, 0x0ffff312
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH275, 0x0ffff313
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH276, 0x0ffff314
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH277, 0x0ffff315
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH278, 0x0ffff316
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH279, 0x0ffff317
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH280, 0x0ffff318
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH281, 0x0ffff319
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH282, 0x0ffff31a
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH283, 0x0ffff31b
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH284, 0x0ffff31c
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH285, 0x0ffff31d
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH286, 0x0ffff31e
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH287, 0x0ffff31f
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH288, 0x0ffff320
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH289, 0x0ffff321
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH290, 0x0ffff322
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH291, 0x0ffff323
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH292, 0x0ffff324
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH293, 0x0ffff325
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH294, 0x0ffff326
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH295, 0x0ffff327
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH296, 0x0ffff328
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH297, 0x0ffff329
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH298, 0x0ffff32a
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH299, 0x0ffff32b
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH300, 0x0ffff32c
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH301, 0x0ffff32d
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH302, 0x0ffff32e
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH303, 0x0ffff32f
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH304, 0x0ffff330
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH305, 0x0ffff331
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH306, 0x0ffff332
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH307, 0x0ffff333
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH308, 0x0ffff334
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH309, 0x0ffff335
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH310, 0x0ffff336
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH311, 0x0ffff337
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH312, 0x0ffff338
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH313, 0x0ffff339
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH314, 0x0ffff33a
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH315, 0x0ffff33b
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH316, 0x0ffff33c
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH317, 0x0ffff33d
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH318, 0x0ffff33e
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH319, 0x0ffff33f
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH320, 0x0ffff340
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH321, 0x0ffff341
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH322, 0x0ffff342
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH323, 0x0ffff343
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH324, 0x0ffff344
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH325, 0x0ffff345
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH326, 0x0ffff346
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH327, 0x0ffff347
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH328, 0x0ffff348
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH329, 0x0ffff349
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH330, 0x0ffff34a
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH331, 0x0ffff34b
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH332, 0x0ffff34c
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH333, 0x0ffff34d
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH334, 0x0ffff34e
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH335, 0x0ffff34f
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH336, 0x0ffff350
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH337, 0x0ffff351
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH338, 0x0ffff352
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH339, 0x0ffff353
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH340, 0x0ffff354
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH341, 0x0ffff355
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH342, 0x0ffff356
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH343, 0x0ffff357
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH344, 0x0ffff358
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH345, 0x0ffff359
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH346, 0x0ffff35a
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH347, 0x0ffff35b
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH348, 0x0ffff35c
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH349, 0x0ffff35d
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH350, 0x0ffff35e
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH351, 0x0ffff35f
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH352, 0x0ffff360
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH353, 0x0ffff361
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH354, 0x0ffff362
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH355, 0x0ffff363
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH356, 0x0ffff364
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH357, 0x0ffff365
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH358, 0x0ffff366
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH359, 0x0ffff367
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH360, 0x0ffff368
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH361, 0x0ffff369
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH362, 0x0ffff36a
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH363, 0x0ffff36b
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH364, 0x0ffff36c
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH365, 0x0ffff36d
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH366, 0x0ffff36e
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH367, 0x0ffff36f
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH368, 0x0ffff370
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH369, 0x0ffff371
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH370, 0x0ffff372
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH371, 0x0ffff373
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH372, 0x0ffff374
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH373, 0x0ffff375
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH374, 0x0ffff376
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH375, 0x0ffff377
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH376, 0x0ffff378
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH377, 0x0ffff379
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH378, 0x0ffff37a
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH379, 0x0ffff37b
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH380, 0x0ffff37c
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH381, 0x0ffff37d
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH382, 0x0ffff37e
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH383, 0x0ffff37f
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH384, 0x0ffff380
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH385, 0x0ffff381
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH386, 0x0ffff382
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH387, 0x0ffff383
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH388, 0x0ffff384
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH389, 0x0ffff385
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH390, 0x0ffff386
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH391, 0x0ffff387
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH392, 0x0ffff388
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH393, 0x0ffff389
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH394, 0x0ffff38a
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH395, 0x0ffff38b
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH396, 0x0ffff38c
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH397, 0x0ffff38d
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH398, 0x0ffff38e
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH399, 0x0ffff38f
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH400, 0x0ffff390
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH401, 0x0ffff391
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH402, 0x0ffff392
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH403, 0x0ffff393
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH404, 0x0ffff394
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH405, 0x0ffff395
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH406, 0x0ffff396
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH407, 0x0ffff397
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH408, 0x0ffff398
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH409, 0x0ffff399
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH410, 0x0ffff39a
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH411, 0x0ffff39b
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH412, 0x0ffff39c
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH413, 0x0ffff39d
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH414, 0x0ffff39e
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH415, 0x0ffff39f
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH416, 0x0ffff3a0
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH417, 0x0ffff3a1
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH418, 0x0ffff3a2
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH419, 0x0ffff3a3
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH420, 0x0ffff3a4
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH421, 0x0ffff3a5
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH422, 0x0ffff3a6
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH423, 0x0ffff3a7
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH424, 0x0ffff3a8
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH425, 0x0ffff3a9
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH426, 0x0ffff3aa
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH427, 0x0ffff3ab
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH428, 0x0ffff3ac
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH429, 0x0ffff3ad
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH430, 0x0ffff3ae
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH431, 0x0ffff3af
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH432, 0x0ffff3b0
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH433, 0x0ffff3b1
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH434, 0x0ffff3b2
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH435, 0x0ffff3b3
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH436, 0x0ffff3b4
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH437, 0x0ffff3b5
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH438, 0x0ffff3b6
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH439, 0x0ffff3b7
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH440, 0x0ffff3b8
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH441, 0x0ffff3b9
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH442, 0x0ffff3ba
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH443, 0x0ffff3bb
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH444, 0x0ffff3bc
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH445, 0x0ffff3bd
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH446, 0x0ffff3be
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH447, 0x0ffff3bf
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH448, 0x0ffff3c0
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH449, 0x0ffff3c1
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH450, 0x0ffff3c2
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH451, 0x0ffff3c3
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH452, 0x0ffff3c4
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH453, 0x0ffff3c5
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH454, 0x0ffff3c6
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH455, 0x0ffff3c7
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH456, 0x0ffff3c8
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH457, 0x0ffff3c9
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH458, 0x0ffff3ca
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH459, 0x0ffff3cb
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH460, 0x0ffff3cc
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH461, 0x0ffff3cd
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH462, 0x0ffff3ce
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH463, 0x0ffff3cf
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH464, 0x0ffff3d0
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH465, 0x0ffff3d1
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH466, 0x0ffff3d2
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH467, 0x0ffff3d3
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH468, 0x0ffff3d4
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH469, 0x0ffff3d5
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH470, 0x0ffff3d6
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH471, 0x0ffff3d7
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH472, 0x0ffff3d8
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH473, 0x0ffff3d9
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH474, 0x0ffff3da
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH475, 0x0ffff3db
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH476, 0x0ffff3dc
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH477, 0x0ffff3dd
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH478, 0x0ffff3de
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH479, 0x0ffff3df
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH480, 0x0ffff3e0
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH481, 0x0ffff3e1
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH482, 0x0ffff3e2
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH483, 0x0ffff3e3
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH484, 0x0ffff3e4
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH485, 0x0ffff3e5
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH486, 0x0ffff3e6
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH487, 0x0ffff3e7
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH488, 0x0ffff3e8
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH489, 0x0ffff3e9
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH490, 0x0ffff3ea
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH491, 0x0ffff3eb
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH492, 0x0ffff3ec
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH493, 0x0ffff3ed
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH494, 0x0ffff3ee
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH495, 0x0ffff3ef
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH496, 0x0ffff3f0
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH497, 0x0ffff3f1
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH498, 0x0ffff3f2
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH499, 0x0ffff3f3
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH500, 0x0ffff3f4
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH501, 0x0ffff3f5
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH502, 0x0ffff3f6
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH503, 0x0ffff3f7
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH504, 0x0ffff3f8
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH505, 0x0ffff3f9
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH506, 0x0ffff3fa
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH507, 0x0ffff3fb
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH508, 0x0ffff3fc
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH509, 0x0ffff3fd
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH510, 0x0ffff3fe
.set CYREG_SFLASH_MACRO_0_FREE_SFLASH511, 0x0ffff3ff
.set CYREG_SFLASH_ALT_PROT_ROW0, 0x0ffff400
.set CYREG_SFLASH_ALT_PROT_ROW1, 0x0ffff401
.set CYREG_SFLASH_ALT_PROT_ROW2, 0x0ffff402
.set CYREG_SFLASH_ALT_PROT_ROW3, 0x0ffff403
.set CYREG_SFLASH_ALT_PROT_ROW4, 0x0ffff404
.set CYREG_SFLASH_ALT_PROT_ROW5, 0x0ffff405
.set CYREG_SFLASH_ALT_PROT_ROW6, 0x0ffff406
.set CYREG_SFLASH_ALT_PROT_ROW7, 0x0ffff407
.set CYREG_SFLASH_ALT_PROT_ROW8, 0x0ffff408
.set CYREG_SFLASH_ALT_PROT_ROW9, 0x0ffff409
.set CYREG_SFLASH_ALT_PROT_ROW10, 0x0ffff40a
.set CYREG_SFLASH_ALT_PROT_ROW11, 0x0ffff40b
.set CYREG_SFLASH_ALT_PROT_ROW12, 0x0ffff40c
.set CYREG_SFLASH_ALT_PROT_ROW13, 0x0ffff40d
.set CYREG_SFLASH_ALT_PROT_ROW14, 0x0ffff40e
.set CYREG_SFLASH_ALT_PROT_ROW15, 0x0ffff40f
.set CYREG_SFLASH_ALT_PROT_ROW16, 0x0ffff410
.set CYREG_SFLASH_ALT_PROT_ROW17, 0x0ffff411
.set CYREG_SFLASH_ALT_PROT_ROW18, 0x0ffff412
.set CYREG_SFLASH_ALT_PROT_ROW19, 0x0ffff413
.set CYREG_SFLASH_ALT_PROT_ROW20, 0x0ffff414
.set CYREG_SFLASH_ALT_PROT_ROW21, 0x0ffff415
.set CYREG_SFLASH_ALT_PROT_ROW22, 0x0ffff416
.set CYREG_SFLASH_ALT_PROT_ROW23, 0x0ffff417
.set CYREG_SFLASH_ALT_PROT_ROW24, 0x0ffff418
.set CYREG_SFLASH_ALT_PROT_ROW25, 0x0ffff419
.set CYREG_SFLASH_ALT_PROT_ROW26, 0x0ffff41a
.set CYREG_SFLASH_ALT_PROT_ROW27, 0x0ffff41b
.set CYREG_SFLASH_ALT_PROT_ROW28, 0x0ffff41c
.set CYREG_SFLASH_ALT_PROT_ROW29, 0x0ffff41d
.set CYREG_SFLASH_ALT_PROT_ROW30, 0x0ffff41e
.set CYREG_SFLASH_ALT_PROT_ROW31, 0x0ffff41f
.set CYREG_SFLASH_ALT_PROT_ROW32, 0x0ffff420
.set CYREG_SFLASH_ALT_PROT_ROW33, 0x0ffff421
.set CYREG_SFLASH_ALT_PROT_ROW34, 0x0ffff422
.set CYREG_SFLASH_ALT_PROT_ROW35, 0x0ffff423
.set CYREG_SFLASH_ALT_PROT_ROW36, 0x0ffff424
.set CYREG_SFLASH_ALT_PROT_ROW37, 0x0ffff425
.set CYREG_SFLASH_ALT_PROT_ROW38, 0x0ffff426
.set CYREG_SFLASH_ALT_PROT_ROW39, 0x0ffff427
.set CYREG_SFLASH_ALT_PROT_ROW40, 0x0ffff428
.set CYREG_SFLASH_ALT_PROT_ROW41, 0x0ffff429
.set CYREG_SFLASH_ALT_PROT_ROW42, 0x0ffff42a
.set CYREG_SFLASH_ALT_PROT_ROW43, 0x0ffff42b
.set CYREG_SFLASH_ALT_PROT_ROW44, 0x0ffff42c
.set CYREG_SFLASH_ALT_PROT_ROW45, 0x0ffff42d
.set CYREG_SFLASH_ALT_PROT_ROW46, 0x0ffff42e
.set CYREG_SFLASH_ALT_PROT_ROW47, 0x0ffff42f
.set CYREG_SFLASH_ALT_PROT_ROW48, 0x0ffff430
.set CYREG_SFLASH_ALT_PROT_ROW49, 0x0ffff431
.set CYREG_SFLASH_ALT_PROT_ROW50, 0x0ffff432
.set CYREG_SFLASH_ALT_PROT_ROW51, 0x0ffff433
.set CYREG_SFLASH_ALT_PROT_ROW52, 0x0ffff434
.set CYREG_SFLASH_ALT_PROT_ROW53, 0x0ffff435
.set CYREG_SFLASH_ALT_PROT_ROW54, 0x0ffff436
.set CYREG_SFLASH_ALT_PROT_ROW55, 0x0ffff437
.set CYREG_SFLASH_ALT_PROT_ROW56, 0x0ffff438
.set CYREG_SFLASH_ALT_PROT_ROW57, 0x0ffff439
.set CYREG_SFLASH_ALT_PROT_ROW58, 0x0ffff43a
.set CYREG_SFLASH_ALT_PROT_ROW59, 0x0ffff43b
.set CYREG_SFLASH_ALT_PROT_ROW60, 0x0ffff43c
.set CYREG_SFLASH_ALT_PROT_ROW61, 0x0ffff43d
.set CYREG_SFLASH_ALT_PROT_ROW62, 0x0ffff43e
.set CYREG_SFLASH_ALT_PROT_ROW63, 0x0ffff43f
.set CYREG_SFLASH_ALT_PROT_ROW64, 0x0ffff440
.set CYREG_SFLASH_ALT_PROT_ROW65, 0x0ffff441
.set CYREG_SFLASH_ALT_PROT_ROW66, 0x0ffff442
.set CYREG_SFLASH_ALT_PROT_ROW67, 0x0ffff443
.set CYREG_SFLASH_ALT_PROT_ROW68, 0x0ffff444
.set CYREG_SFLASH_ALT_PROT_ROW69, 0x0ffff445
.set CYREG_SFLASH_ALT_PROT_ROW70, 0x0ffff446
.set CYREG_SFLASH_ALT_PROT_ROW71, 0x0ffff447
.set CYREG_SFLASH_ALT_PROT_ROW72, 0x0ffff448
.set CYREG_SFLASH_ALT_PROT_ROW73, 0x0ffff449
.set CYREG_SFLASH_ALT_PROT_ROW74, 0x0ffff44a
.set CYREG_SFLASH_ALT_PROT_ROW75, 0x0ffff44b
.set CYREG_SFLASH_ALT_PROT_ROW76, 0x0ffff44c
.set CYREG_SFLASH_ALT_PROT_ROW77, 0x0ffff44d
.set CYREG_SFLASH_ALT_PROT_ROW78, 0x0ffff44e
.set CYREG_SFLASH_ALT_PROT_ROW79, 0x0ffff44f
.set CYREG_SFLASH_ALT_PROT_ROW80, 0x0ffff450
.set CYREG_SFLASH_ALT_PROT_ROW81, 0x0ffff451
.set CYREG_SFLASH_ALT_PROT_ROW82, 0x0ffff452
.set CYREG_SFLASH_ALT_PROT_ROW83, 0x0ffff453
.set CYREG_SFLASH_ALT_PROT_ROW84, 0x0ffff454
.set CYREG_SFLASH_ALT_PROT_ROW85, 0x0ffff455
.set CYREG_SFLASH_ALT_PROT_ROW86, 0x0ffff456
.set CYREG_SFLASH_ALT_PROT_ROW87, 0x0ffff457
.set CYREG_SFLASH_ALT_PROT_ROW88, 0x0ffff458
.set CYREG_SFLASH_ALT_PROT_ROW89, 0x0ffff459
.set CYREG_SFLASH_ALT_PROT_ROW90, 0x0ffff45a
.set CYREG_SFLASH_ALT_PROT_ROW91, 0x0ffff45b
.set CYREG_SFLASH_ALT_PROT_ROW92, 0x0ffff45c
.set CYREG_SFLASH_ALT_PROT_ROW93, 0x0ffff45d
.set CYREG_SFLASH_ALT_PROT_ROW94, 0x0ffff45e
.set CYREG_SFLASH_ALT_PROT_ROW95, 0x0ffff45f
.set CYREG_SFLASH_ALT_PROT_ROW96, 0x0ffff460
.set CYREG_SFLASH_ALT_PROT_ROW97, 0x0ffff461
.set CYREG_SFLASH_ALT_PROT_ROW98, 0x0ffff462
.set CYREG_SFLASH_ALT_PROT_ROW99, 0x0ffff463
.set CYREG_SFLASH_ALT_PROT_ROW100, 0x0ffff464
.set CYREG_SFLASH_ALT_PROT_ROW101, 0x0ffff465
.set CYREG_SFLASH_ALT_PROT_ROW102, 0x0ffff466
.set CYREG_SFLASH_ALT_PROT_ROW103, 0x0ffff467
.set CYREG_SFLASH_ALT_PROT_ROW104, 0x0ffff468
.set CYREG_SFLASH_ALT_PROT_ROW105, 0x0ffff469
.set CYREG_SFLASH_ALT_PROT_ROW106, 0x0ffff46a
.set CYREG_SFLASH_ALT_PROT_ROW107, 0x0ffff46b
.set CYREG_SFLASH_ALT_PROT_ROW108, 0x0ffff46c
.set CYREG_SFLASH_ALT_PROT_ROW109, 0x0ffff46d
.set CYREG_SFLASH_ALT_PROT_ROW110, 0x0ffff46e
.set CYREG_SFLASH_ALT_PROT_ROW111, 0x0ffff46f
.set CYREG_SFLASH_ALT_PROT_ROW112, 0x0ffff470
.set CYREG_SFLASH_ALT_PROT_ROW113, 0x0ffff471
.set CYREG_SFLASH_ALT_PROT_ROW114, 0x0ffff472
.set CYREG_SFLASH_ALT_PROT_ROW115, 0x0ffff473
.set CYREG_SFLASH_ALT_PROT_ROW116, 0x0ffff474
.set CYREG_SFLASH_ALT_PROT_ROW117, 0x0ffff475
.set CYREG_SFLASH_ALT_PROT_ROW118, 0x0ffff476
.set CYREG_SFLASH_ALT_PROT_ROW119, 0x0ffff477
.set CYREG_SFLASH_ALT_PROT_ROW120, 0x0ffff478
.set CYREG_SFLASH_ALT_PROT_ROW121, 0x0ffff479
.set CYREG_SFLASH_ALT_PROT_ROW122, 0x0ffff47a
.set CYREG_SFLASH_ALT_PROT_ROW123, 0x0ffff47b
.set CYREG_SFLASH_ALT_PROT_ROW124, 0x0ffff47c
.set CYREG_SFLASH_ALT_PROT_ROW125, 0x0ffff47d
.set CYREG_SFLASH_ALT_PROT_ROW126, 0x0ffff47e
.set CYREG_SFLASH_ALT_PROT_ROW127, 0x0ffff47f
.set CYREG_SFLASH_ALT_PROT_ROW128, 0x0ffff480
.set CYREG_SFLASH_ALT_PROT_ROW129, 0x0ffff481
.set CYREG_SFLASH_ALT_PROT_ROW130, 0x0ffff482
.set CYREG_SFLASH_ALT_PROT_ROW131, 0x0ffff483
.set CYREG_SFLASH_ALT_PROT_ROW132, 0x0ffff484
.set CYREG_SFLASH_ALT_PROT_ROW133, 0x0ffff485
.set CYREG_SFLASH_ALT_PROT_ROW134, 0x0ffff486
.set CYREG_SFLASH_ALT_PROT_ROW135, 0x0ffff487
.set CYREG_SFLASH_ALT_PROT_ROW136, 0x0ffff488
.set CYREG_SFLASH_ALT_PROT_ROW137, 0x0ffff489
.set CYREG_SFLASH_ALT_PROT_ROW138, 0x0ffff48a
.set CYREG_SFLASH_ALT_PROT_ROW139, 0x0ffff48b
.set CYREG_SFLASH_ALT_PROT_ROW140, 0x0ffff48c
.set CYREG_SFLASH_ALT_PROT_ROW141, 0x0ffff48d
.set CYREG_SFLASH_ALT_PROT_ROW142, 0x0ffff48e
.set CYREG_SFLASH_ALT_PROT_ROW143, 0x0ffff48f
.set CYREG_SFLASH_ALT_PROT_ROW144, 0x0ffff490
.set CYREG_SFLASH_ALT_PROT_ROW145, 0x0ffff491
.set CYREG_SFLASH_ALT_PROT_ROW146, 0x0ffff492
.set CYREG_SFLASH_ALT_PROT_ROW147, 0x0ffff493
.set CYREG_SFLASH_ALT_PROT_ROW148, 0x0ffff494
.set CYREG_SFLASH_ALT_PROT_ROW149, 0x0ffff495
.set CYREG_SFLASH_ALT_PROT_ROW150, 0x0ffff496
.set CYREG_SFLASH_ALT_PROT_ROW151, 0x0ffff497
.set CYREG_SFLASH_ALT_PROT_ROW152, 0x0ffff498
.set CYREG_SFLASH_ALT_PROT_ROW153, 0x0ffff499
.set CYREG_SFLASH_ALT_PROT_ROW154, 0x0ffff49a
.set CYREG_SFLASH_ALT_PROT_ROW155, 0x0ffff49b
.set CYREG_SFLASH_ALT_PROT_ROW156, 0x0ffff49c
.set CYREG_SFLASH_ALT_PROT_ROW157, 0x0ffff49d
.set CYREG_SFLASH_ALT_PROT_ROW158, 0x0ffff49e
.set CYREG_SFLASH_ALT_PROT_ROW159, 0x0ffff49f
.set CYREG_SFLASH_ALT_PROT_ROW160, 0x0ffff4a0
.set CYREG_SFLASH_ALT_PROT_ROW161, 0x0ffff4a1
.set CYREG_SFLASH_ALT_PROT_ROW162, 0x0ffff4a2
.set CYREG_SFLASH_ALT_PROT_ROW163, 0x0ffff4a3
.set CYREG_SFLASH_ALT_PROT_ROW164, 0x0ffff4a4
.set CYREG_SFLASH_ALT_PROT_ROW165, 0x0ffff4a5
.set CYREG_SFLASH_ALT_PROT_ROW166, 0x0ffff4a6
.set CYREG_SFLASH_ALT_PROT_ROW167, 0x0ffff4a7
.set CYREG_SFLASH_ALT_PROT_ROW168, 0x0ffff4a8
.set CYREG_SFLASH_ALT_PROT_ROW169, 0x0ffff4a9
.set CYREG_SFLASH_ALT_PROT_ROW170, 0x0ffff4aa
.set CYREG_SFLASH_ALT_PROT_ROW171, 0x0ffff4ab
.set CYREG_SFLASH_ALT_PROT_ROW172, 0x0ffff4ac
.set CYREG_SFLASH_ALT_PROT_ROW173, 0x0ffff4ad
.set CYREG_SFLASH_ALT_PROT_ROW174, 0x0ffff4ae
.set CYREG_SFLASH_ALT_PROT_ROW175, 0x0ffff4af
.set CYREG_SFLASH_ALT_PROT_ROW176, 0x0ffff4b0
.set CYREG_SFLASH_ALT_PROT_ROW177, 0x0ffff4b1
.set CYREG_SFLASH_ALT_PROT_ROW178, 0x0ffff4b2
.set CYREG_SFLASH_ALT_PROT_ROW179, 0x0ffff4b3
.set CYREG_SFLASH_ALT_PROT_ROW180, 0x0ffff4b4
.set CYREG_SFLASH_ALT_PROT_ROW181, 0x0ffff4b5
.set CYREG_SFLASH_ALT_PROT_ROW182, 0x0ffff4b6
.set CYREG_SFLASH_ALT_PROT_ROW183, 0x0ffff4b7
.set CYREG_SFLASH_ALT_PROT_ROW184, 0x0ffff4b8
.set CYREG_SFLASH_ALT_PROT_ROW185, 0x0ffff4b9
.set CYREG_SFLASH_ALT_PROT_ROW186, 0x0ffff4ba
.set CYREG_SFLASH_ALT_PROT_ROW187, 0x0ffff4bb
.set CYREG_SFLASH_ALT_PROT_ROW188, 0x0ffff4bc
.set CYREG_SFLASH_ALT_PROT_ROW189, 0x0ffff4bd
.set CYREG_SFLASH_ALT_PROT_ROW190, 0x0ffff4be
.set CYREG_SFLASH_ALT_PROT_ROW191, 0x0ffff4bf
.set CYREG_SFLASH_ALT_PROT_ROW192, 0x0ffff4c0
.set CYREG_SFLASH_ALT_PROT_ROW193, 0x0ffff4c1
.set CYREG_SFLASH_ALT_PROT_ROW194, 0x0ffff4c2
.set CYREG_SFLASH_ALT_PROT_ROW195, 0x0ffff4c3
.set CYREG_SFLASH_ALT_PROT_ROW196, 0x0ffff4c4
.set CYREG_SFLASH_ALT_PROT_ROW197, 0x0ffff4c5
.set CYREG_SFLASH_ALT_PROT_ROW198, 0x0ffff4c6
.set CYREG_SFLASH_ALT_PROT_ROW199, 0x0ffff4c7
.set CYREG_SFLASH_ALT_PROT_ROW200, 0x0ffff4c8
.set CYREG_SFLASH_ALT_PROT_ROW201, 0x0ffff4c9
.set CYREG_SFLASH_ALT_PROT_ROW202, 0x0ffff4ca
.set CYREG_SFLASH_ALT_PROT_ROW203, 0x0ffff4cb
.set CYREG_SFLASH_ALT_PROT_ROW204, 0x0ffff4cc
.set CYREG_SFLASH_ALT_PROT_ROW205, 0x0ffff4cd
.set CYREG_SFLASH_ALT_PROT_ROW206, 0x0ffff4ce
.set CYREG_SFLASH_ALT_PROT_ROW207, 0x0ffff4cf
.set CYREG_SFLASH_ALT_PROT_ROW208, 0x0ffff4d0
.set CYREG_SFLASH_ALT_PROT_ROW209, 0x0ffff4d1
.set CYREG_SFLASH_ALT_PROT_ROW210, 0x0ffff4d2
.set CYREG_SFLASH_ALT_PROT_ROW211, 0x0ffff4d3
.set CYREG_SFLASH_ALT_PROT_ROW212, 0x0ffff4d4
.set CYREG_SFLASH_ALT_PROT_ROW213, 0x0ffff4d5
.set CYREG_SFLASH_ALT_PROT_ROW214, 0x0ffff4d6
.set CYREG_SFLASH_ALT_PROT_ROW215, 0x0ffff4d7
.set CYREG_SFLASH_ALT_PROT_ROW216, 0x0ffff4d8
.set CYREG_SFLASH_ALT_PROT_ROW217, 0x0ffff4d9
.set CYREG_SFLASH_ALT_PROT_ROW218, 0x0ffff4da
.set CYREG_SFLASH_ALT_PROT_ROW219, 0x0ffff4db
.set CYREG_SFLASH_ALT_PROT_ROW220, 0x0ffff4dc
.set CYREG_SFLASH_ALT_PROT_ROW221, 0x0ffff4dd
.set CYREG_SFLASH_ALT_PROT_ROW222, 0x0ffff4de
.set CYREG_SFLASH_ALT_PROT_ROW223, 0x0ffff4df
.set CYREG_SFLASH_ALT_PROT_ROW224, 0x0ffff4e0
.set CYREG_SFLASH_ALT_PROT_ROW225, 0x0ffff4e1
.set CYREG_SFLASH_ALT_PROT_ROW226, 0x0ffff4e2
.set CYREG_SFLASH_ALT_PROT_ROW227, 0x0ffff4e3
.set CYREG_SFLASH_ALT_PROT_ROW228, 0x0ffff4e4
.set CYREG_SFLASH_ALT_PROT_ROW229, 0x0ffff4e5
.set CYREG_SFLASH_ALT_PROT_ROW230, 0x0ffff4e6
.set CYREG_SFLASH_ALT_PROT_ROW231, 0x0ffff4e7
.set CYREG_SFLASH_ALT_PROT_ROW232, 0x0ffff4e8
.set CYREG_SFLASH_ALT_PROT_ROW233, 0x0ffff4e9
.set CYREG_SFLASH_ALT_PROT_ROW234, 0x0ffff4ea
.set CYREG_SFLASH_ALT_PROT_ROW235, 0x0ffff4eb
.set CYREG_SFLASH_ALT_PROT_ROW236, 0x0ffff4ec
.set CYREG_SFLASH_ALT_PROT_ROW237, 0x0ffff4ed
.set CYREG_SFLASH_ALT_PROT_ROW238, 0x0ffff4ee
.set CYREG_SFLASH_ALT_PROT_ROW239, 0x0ffff4ef
.set CYREG_SFLASH_ALT_PROT_ROW240, 0x0ffff4f0
.set CYREG_SFLASH_ALT_PROT_ROW241, 0x0ffff4f1
.set CYREG_SFLASH_ALT_PROT_ROW242, 0x0ffff4f2
.set CYREG_SFLASH_ALT_PROT_ROW243, 0x0ffff4f3
.set CYREG_SFLASH_ALT_PROT_ROW244, 0x0ffff4f4
.set CYREG_SFLASH_ALT_PROT_ROW245, 0x0ffff4f5
.set CYREG_SFLASH_ALT_PROT_ROW246, 0x0ffff4f6
.set CYREG_SFLASH_ALT_PROT_ROW247, 0x0ffff4f7
.set CYREG_SFLASH_ALT_PROT_ROW248, 0x0ffff4f8
.set CYREG_SFLASH_ALT_PROT_ROW249, 0x0ffff4f9
.set CYREG_SFLASH_ALT_PROT_ROW250, 0x0ffff4fa
.set CYREG_SFLASH_ALT_PROT_ROW251, 0x0ffff4fb
.set CYREG_SFLASH_ALT_PROT_ROW252, 0x0ffff4fc
.set CYREG_SFLASH_ALT_PROT_ROW253, 0x0ffff4fd
.set CYREG_SFLASH_ALT_PROT_ROW254, 0x0ffff4fe
.set CYREG_SFLASH_ALT_PROT_ROW255, 0x0ffff4ff
.set CYREG_SFLASH_ALT_PP, 0x0ffff5a0
.set CYREG_SFLASH_ALT_E, 0x0ffff5a4
.set CYREG_SFLASH_ALT_P, 0x0ffff5a8
.set CYREG_SFLASH_ALT_EA_E, 0x0ffff5ac
.set CYREG_SFLASH_ALT_EA_P, 0x0ffff5b0
.set CYREG_SFLASH_ALT_ES_E, 0x0ffff5b4
.set CYREG_SFLASH_ALT_ES_P_EO, 0x0ffff5b8
.set CYREG_SFLASH_ALT_E_VCTAT, 0x0ffff5bc
.set CYFLD_SFLASH_VCTAT_SLOPE__OFFSET, 0x00000000
.set CYFLD_SFLASH_VCTAT_SLOPE__SIZE, 0x00000004
.set CYFLD_SFLASH_VCTAT_VOLTAGE__OFFSET, 0x00000004
.set CYFLD_SFLASH_VCTAT_VOLTAGE__SIZE, 0x00000002
.set CYFLD_SFLASH_VCTAT_ENABLE__OFFSET, 0x00000006
.set CYFLD_SFLASH_VCTAT_ENABLE__SIZE, 0x00000001
.set CYREG_SFLASH_ALT_P_VCTAT, 0x0ffff5bd
.set CYDEV_ROM_BASE, 0x10000000
.set CYDEV_ROM_SIZE, 0x00002000
.set CYREG_ROM_DATA_MBASE, 0x10000000
.set CYREG_ROM_DATA_MSIZE, 0x00002000
.set CYDEV_SRAM_BASE, 0x20000000
.set CYDEV_SRAM_SIZE, 0x00002000
.set CYREG_SRAM_DATA_MBASE, 0x20000000
.set CYREG_SRAM_DATA_MSIZE, 0x00002000
.set CYDEV_PERI_BASE, 0x40010000
.set CYDEV_PERI_SIZE, 0x00010000
.set CYREG_PERI_DIV_CMD, 0x40010000
.set CYFLD_PERI_SEL_DIV__OFFSET, 0x00000000
.set CYFLD_PERI_SEL_DIV__SIZE, 0x00000006
.set CYFLD_PERI_SEL_TYPE__OFFSET, 0x00000006
.set CYFLD_PERI_SEL_TYPE__SIZE, 0x00000002
.set CYFLD_PERI_PA_SEL_DIV__OFFSET, 0x00000008
.set CYFLD_PERI_PA_SEL_DIV__SIZE, 0x00000006
.set CYFLD_PERI_PA_SEL_TYPE__OFFSET, 0x0000000e
.set CYFLD_PERI_PA_SEL_TYPE__SIZE, 0x00000002
.set CYFLD_PERI_DISABLE__OFFSET, 0x0000001e
.set CYFLD_PERI_DISABLE__SIZE, 0x00000001
.set CYFLD_PERI_ENABLE__OFFSET, 0x0000001f
.set CYFLD_PERI_ENABLE__SIZE, 0x00000001
.set CYREG_PERI_PCLK_CTL0, 0x40010100
.set CYREG_PERI_PCLK_CTL1, 0x40010104
.set CYREG_PERI_PCLK_CTL2, 0x40010108
.set CYREG_PERI_PCLK_CTL3, 0x4001010c
.set CYREG_PERI_PCLK_CTL4, 0x40010110
.set CYREG_PERI_PCLK_CTL5, 0x40010114
.set CYREG_PERI_PCLK_CTL6, 0x40010118
.set CYREG_PERI_PCLK_CTL7, 0x4001011c
.set CYREG_PERI_PCLK_CTL8, 0x40010120
.set CYREG_PERI_PCLK_CTL9, 0x40010124
.set CYREG_PERI_PCLK_CTL10, 0x40010128
.set CYREG_PERI_PCLK_CTL11, 0x4001012c
.set CYREG_PERI_DIV_8_CTL0, 0x40010200
.set CYFLD_PERI_EN__OFFSET, 0x00000000
.set CYFLD_PERI_EN__SIZE, 0x00000001
.set CYFLD_PERI_INT8_DIV__OFFSET, 0x00000008
.set CYFLD_PERI_INT8_DIV__SIZE, 0x00000008
.set CYREG_PERI_DIV_8_CTL1, 0x40010204
.set CYREG_PERI_DIV_8_CTL2, 0x40010208
.set CYREG_PERI_DIV_8_CTL3, 0x4001020c
.set CYREG_PERI_DIV_16_CTL0, 0x40010300
.set CYFLD_PERI_INT16_DIV__OFFSET, 0x00000008
.set CYFLD_PERI_INT16_DIV__SIZE, 0x00000010
.set CYREG_PERI_DIV_16_CTL1, 0x40010304
.set CYREG_PERI_DIV_16_CTL2, 0x40010308
.set CYREG_PERI_DIV_16_CTL3, 0x4001030c
.set CYREG_PERI_DIV_16_5_CTL0, 0x40010400
.set CYFLD_PERI_FRAC5_DIV__OFFSET, 0x00000003
.set CYFLD_PERI_FRAC5_DIV__SIZE, 0x00000005
.set CYREG_PERI_DIV_16_5_CTL1, 0x40010404
.set CYDEV_HSIOM_BASE, 0x40020000
.set CYDEV_HSIOM_SIZE, 0x00004000
.set CYREG_HSIOM_PORT_SEL0, 0x40020000
.set CYFLD_HSIOM_IO0_SEL__OFFSET, 0x00000000
.set CYFLD_HSIOM_IO0_SEL__SIZE, 0x00000004
.set CYVAL_HSIOM_IO0_SEL_GPIO, 0x00000000
.set CYVAL_HSIOM_IO0_SEL_GPIO_DSI, 0x00000001
.set CYVAL_HSIOM_IO0_SEL_DSI_DSI, 0x00000002
.set CYVAL_HSIOM_IO0_SEL_DSI_GPIO, 0x00000003
.set CYVAL_HSIOM_IO0_SEL_CSD_SENSE, 0x00000004
.set CYVAL_HSIOM_IO0_SEL_CSD_SHIELD, 0x00000005
.set CYVAL_HSIOM_IO0_SEL_AMUXA, 0x00000006
.set CYVAL_HSIOM_IO0_SEL_AMUXB, 0x00000007
.set CYVAL_HSIOM_IO0_SEL_ACT_0, 0x00000008
.set CYVAL_HSIOM_IO0_SEL_ACT_1, 0x00000009
.set CYVAL_HSIOM_IO0_SEL_ACT_2, 0x0000000a
.set CYVAL_HSIOM_IO0_SEL_ACT_3, 0x0000000b
.set CYVAL_HSIOM_IO0_SEL_LCD_COM, 0x0000000c
.set CYVAL_HSIOM_IO0_SEL_LCD_SEG, 0x0000000d
.set CYVAL_HSIOM_IO0_SEL_DS_0, 0x0000000c
.set CYVAL_HSIOM_IO0_SEL_DS_1, 0x0000000d
.set CYVAL_HSIOM_IO0_SEL_DS_2, 0x0000000e
.set CYVAL_HSIOM_IO0_SEL_DS_3, 0x0000000f
.set CYFLD_HSIOM_IO1_SEL__OFFSET, 0x00000004
.set CYFLD_HSIOM_IO1_SEL__SIZE, 0x00000004
.set CYREG_HSIOM_PORT_SEL1, 0x40020100
.set CYFLD_HSIOM_IO2_SEL__OFFSET, 0x00000008
.set CYFLD_HSIOM_IO2_SEL__SIZE, 0x00000004
.set CYFLD_HSIOM_IO3_SEL__OFFSET, 0x0000000c
.set CYFLD_HSIOM_IO3_SEL__SIZE, 0x00000004
.set CYFLD_HSIOM_IO4_SEL__OFFSET, 0x00000010
.set CYFLD_HSIOM_IO4_SEL__SIZE, 0x00000004
.set CYFLD_HSIOM_IO5_SEL__OFFSET, 0x00000014
.set CYFLD_HSIOM_IO5_SEL__SIZE, 0x00000004
.set CYFLD_HSIOM_IO6_SEL__OFFSET, 0x00000018
.set CYFLD_HSIOM_IO6_SEL__SIZE, 0x00000004
.set CYFLD_HSIOM_IO7_SEL__OFFSET, 0x0000001c
.set CYFLD_HSIOM_IO7_SEL__SIZE, 0x00000004
.set CYREG_HSIOM_PORT_SEL2, 0x40020200
.set CYREG_HSIOM_PORT_SEL3, 0x40020300
.set CYREG_HSIOM_PORT_SEL4, 0x40020400
.set CYREG_PWR_CONTROL, 0x40030000
.set CYFLD__POWER_MODE__OFFSET, 0x00000000
.set CYFLD__POWER_MODE__SIZE, 0x00000004
.set CYVAL__POWER_MODE_RESET, 0x00000000
.set CYVAL__POWER_MODE_ACTIVE, 0x00000001
.set CYVAL__POWER_MODE_SLEEP, 0x00000002
.set CYVAL__POWER_MODE_DEEP_SLEEP, 0x00000003
.set CYFLD__DEBUG_SESSION__OFFSET, 0x00000004
.set CYFLD__DEBUG_SESSION__SIZE, 0x00000001
.set CYVAL__DEBUG_SESSION_NO_SESSION, 0x00000000
.set CYVAL__DEBUG_SESSION_SESSION_ACTIVE, 0x00000001
.set CYFLD__LPM_READY__OFFSET, 0x00000005
.set CYFLD__LPM_READY__SIZE, 0x00000001
.set CYFLD__OVER_TEMP_EN__OFFSET, 0x00000010
.set CYFLD__OVER_TEMP_EN__SIZE, 0x00000001
.set CYFLD__OVER_TEMP_THRESH__OFFSET, 0x00000011
.set CYFLD__OVER_TEMP_THRESH__SIZE, 0x00000001
.set CYFLD__SPARE__OFFSET, 0x00000012
.set CYFLD__SPARE__SIZE, 0x00000002
.set CYFLD__EXT_VCCD__OFFSET, 0x00000017
.set CYFLD__EXT_VCCD__SIZE, 0x00000001
.set CYREG_PWR_KEY_DELAY, 0x40030004
.set CYFLD__WAKEUP_HOLDOFF__OFFSET, 0x00000000
.set CYFLD__WAKEUP_HOLDOFF__SIZE, 0x0000000a
.set CYREG_PWR_DDFT_SELECT, 0x4003000c
.set CYFLD__DDFT0_SEL__OFFSET, 0x00000000
.set CYFLD__DDFT0_SEL__SIZE, 0x00000004
.set CYVAL__DDFT0_SEL_WAKEUP, 0x00000000
.set CYVAL__DDFT0_SEL_AWAKE, 0x00000001
.set CYVAL__DDFT0_SEL_ACT_POWER_EN, 0x00000002
.set CYVAL__DDFT0_SEL_ACT_POWER_UP, 0x00000003
.set CYVAL__DDFT0_SEL_ACT_POWER_GOOD, 0x00000004
.set CYVAL__DDFT0_SEL_ACT_REF_EN, 0x00000005
.set CYVAL__DDFT0_SEL_ACT_COMP_EN, 0x00000006
.set CYVAL__DDFT0_SEL_DPSLP_REF_EN, 0x00000007
.set CYVAL__DDFT0_SEL_DPSLP_REG_EN, 0x00000008
.set CYVAL__DDFT0_SEL_DPSLP_COMP_EN, 0x00000009
.set CYVAL__DDFT0_SEL_OVER_TEMP_EN, 0x0000000a
.set CYVAL__DDFT0_SEL_SLEEPHOLDREQ_N, 0x0000000b
.set CYVAL__DDFT0_SEL_ADFT_BUF_EN, 0x0000000c
.set CYVAL__DDFT0_SEL_ATPG_OBSERVE, 0x0000000d
.set CYVAL__DDFT0_SEL_GND, 0x0000000e
.set CYVAL__DDFT0_SEL_PWR, 0x0000000f
.set CYFLD__DDFT1_SEL__OFFSET, 0x00000004
.set CYFLD__DDFT1_SEL__SIZE, 0x00000004
.set CYVAL__DDFT1_SEL_WAKEUP, 0x00000000
.set CYVAL__DDFT1_SEL_AWAKE, 0x00000001
.set CYVAL__DDFT1_SEL_ACT_POWER_EN, 0x00000002
.set CYVAL__DDFT1_SEL_ACT_POWER_UP, 0x00000003
.set CYVAL__DDFT1_SEL_ACT_POWER_GOOD, 0x00000004
.set CYVAL__DDFT1_SEL_ACT_REF_VALID, 0x00000005
.set CYVAL__DDFT1_SEL_ACT_REG_VALID, 0x00000006
.set CYVAL__DDFT1_SEL_ACT_COMP_OUT, 0x00000007
.set CYVAL__DDFT1_SEL_ACT_TEMP_HIGH, 0x00000008
.set CYVAL__DDFT1_SEL_DPSLP_COMP_OUT, 0x00000009
.set CYVAL__DDFT1_SEL_DPSLP_POWER_UP, 0x0000000a
.set CYVAL__DDFT1_SEL_AWAKE_DELAYED, 0x0000000b
.set CYVAL__DDFT1_SEL_LPM_READY, 0x0000000c
.set CYVAL__DDFT1_SEL_SLEEPHOLDACK_N, 0x0000000d
.set CYVAL__DDFT1_SEL_GND, 0x0000000e
.set CYVAL__DDFT1_SEL_PWR, 0x0000000f
.set CYREG_TST_MODE, 0x40030014
.set CYFLD__SWD_CONNECTED__OFFSET, 0x00000002
.set CYFLD__SWD_CONNECTED__SIZE, 0x00000001
.set CYFLD__BLOCK_ALT_XRES__OFFSET, 0x0000001c
.set CYFLD__BLOCK_ALT_XRES__SIZE, 0x00000001
.set CYFLD__TEST_KEY_DFT_EN__OFFSET, 0x0000001e
.set CYFLD__TEST_KEY_DFT_EN__SIZE, 0x00000001
.set CYFLD__TEST_MODE__OFFSET, 0x0000001f
.set CYFLD__TEST_MODE__SIZE, 0x00000001
.set CYREG_TST_DDFT_CTRL, 0x40030018
.set CYFLD__DFT_SEL0__OFFSET, 0x00000000
.set CYFLD__DFT_SEL0__SIZE, 0x00000004
.set CYVAL__DFT_SEL0_SRC0, 0x00000000
.set CYVAL__DFT_SEL0_SRC1, 0x00000001
.set CYVAL__DFT_SEL0_SRC2, 0x00000002
.set CYVAL__DFT_SEL0_SRC3, 0x00000003
.set CYVAL__DFT_SEL0_SRC4, 0x00000004
.set CYVAL__DFT_SEL0_SRC5, 0x00000005
.set CYVAL__DFT_SEL0_SRC6, 0x00000006
.set CYVAL__DFT_SEL0_SRC7, 0x00000007
.set CYVAL__DFT_SEL0_CLK0, 0x00000008
.set CYVAL__DFT_SEL0_CLK1, 0x00000009
.set CYVAL__DFT_SEL0_PWR0, 0x0000000a
.set CYVAL__DFT_SEL0_PWR1, 0x0000000b
.set CYVAL__DFT_SEL0_RES0, 0x0000000c
.set CYVAL__DFT_SEL0_RES1, 0x0000000d
.set CYVAL__DFT_SEL0_ADFT_COMP, 0x0000000e
.set CYVAL__DFT_SEL0_VSS, 0x0000000f
.set CYFLD__DFT_SEL1__OFFSET, 0x00000008
.set CYFLD__DFT_SEL1__SIZE, 0x00000004
.set CYVAL__DFT_SEL1_SRC0, 0x00000000
.set CYVAL__DFT_SEL1_SRC1, 0x00000001
.set CYVAL__DFT_SEL1_SRC2, 0x00000002
.set CYVAL__DFT_SEL1_SRC3, 0x00000003
.set CYVAL__DFT_SEL1_SRC4, 0x00000004
.set CYVAL__DFT_SEL1_SRC5, 0x00000005
.set CYVAL__DFT_SEL1_SRC6, 0x00000006
.set CYVAL__DFT_SEL1_SRC7, 0x00000007
.set CYVAL__DFT_SEL1_CLK0, 0x00000008
.set CYVAL__DFT_SEL1_CLK1, 0x00000009
.set CYVAL__DFT_SEL1_PWR0, 0x0000000a
.set CYVAL__DFT_SEL1_PWR1, 0x0000000b
.set CYVAL__DFT_SEL1_RES0, 0x0000000c
.set CYVAL__DFT_SEL1_RES1, 0x0000000d
.set CYVAL__DFT_SEL1_ADFT_COMP, 0x0000000e
.set CYVAL__DFT_SEL1_VSS, 0x0000000f
.set CYFLD__ENABLE__OFFSET, 0x0000001f
.set CYFLD__ENABLE__SIZE, 0x00000001
.set CYREG_TST_TRIM_CNTR1, 0x4003001c
.set CYFLD__COUNTER__OFFSET, 0x00000000
.set CYFLD__COUNTER__SIZE, 0x00000010
.set CYFLD__COUNTER_DONE__OFFSET, 0x0000001f
.set CYFLD__COUNTER_DONE__SIZE, 0x00000001
.set CYREG_TST_TRIM_CNTR2, 0x40030020
.set CYREG_TST_ADFT_CTRL, 0x40030024
.set CYFLD__BUF_AUTO_ZERO__OFFSET, 0x00000000
.set CYFLD__BUF_AUTO_ZERO__SIZE, 0x00000001
.set CYFLD__BUF_MODE__OFFSET, 0x00000008
.set CYFLD__BUF_MODE__SIZE, 0x00000002
.set CYFLD__BUF_COMP_OUT__OFFSET, 0x00000010
.set CYFLD__BUF_COMP_OUT__SIZE, 0x00000001
.set CYFLD__BUF_EN__OFFSET, 0x0000001f
.set CYFLD__BUF_EN__SIZE, 0x00000001
.set CYREG_CLK_SELECT, 0x40030028
.set CYFLD__HFCLK_SEL__OFFSET, 0x00000000
.set CYFLD__HFCLK_SEL__SIZE, 0x00000002
.set CYVAL__HFCLK_SEL_IMO, 0x00000000
.set CYVAL__HFCLK_SEL_EXTCLK, 0x00000001
.set CYVAL__HFCLK_SEL_ECO, 0x00000002
.set CYFLD__HFCLK_DIV__OFFSET, 0x00000002
.set CYFLD__HFCLK_DIV__SIZE, 0x00000002
.set CYVAL__HFCLK_DIV_NO_DIV, 0x00000000
.set CYVAL__HFCLK_DIV_DIV_BY_2, 0x00000001
.set CYVAL__HFCLK_DIV_DIV_BY_4, 0x00000002
.set CYVAL__HFCLK_DIV_DIV_BY_8, 0x00000003
.set CYFLD__PUMP_SEL__OFFSET, 0x00000004
.set CYFLD__PUMP_SEL__SIZE, 0x00000002
.set CYVAL__PUMP_SEL_GND, 0x00000000
.set CYVAL__PUMP_SEL_IMO, 0x00000001
.set CYVAL__PUMP_SEL_HFCLK, 0x00000002
.set CYFLD__SYSCLK_DIV__OFFSET, 0x00000006
.set CYFLD__SYSCLK_DIV__SIZE, 0x00000002
.set CYVAL__SYSCLK_DIV_NO_DIV, 0x00000000
.set CYVAL__SYSCLK_DIV_DIV_BY_2, 0x00000001
.set CYVAL__SYSCLK_DIV_DIV_BY_4, 0x00000002
.set CYVAL__SYSCLK_DIV_DIV_BY_8, 0x00000003
.set CYREG_CLK_ILO_CONFIG, 0x4003002c
.set CYREG_CLK_IMO_CONFIG, 0x40030030
.set CYREG_CLK_DFT_SELECT, 0x40030034
.set CYFLD__DFT_DIV0__OFFSET, 0x00000004
.set CYFLD__DFT_DIV0__SIZE, 0x00000002
.set CYVAL__DFT_DIV0_NO_DIV, 0x00000000
.set CYVAL__DFT_DIV0_DIV_BY_2, 0x00000001
.set CYVAL__DFT_DIV0_DIV_BY_4, 0x00000002
.set CYVAL__DFT_DIV0_DIV_BY_8, 0x00000003
.set CYFLD__DFT_EDGE0__OFFSET, 0x00000006
.set CYFLD__DFT_EDGE0__SIZE, 0x00000001
.set CYVAL__DFT_EDGE0_POSEDGE, 0x00000000
.set CYVAL__DFT_EDGE0_NEGEDGE, 0x00000001
.set CYFLD__DFT_DIV1__OFFSET, 0x0000000c
.set CYFLD__DFT_DIV1__SIZE, 0x00000002
.set CYVAL__DFT_DIV1_NO_DIV, 0x00000000
.set CYVAL__DFT_DIV1_DIV_BY_2, 0x00000001
.set CYVAL__DFT_DIV1_DIV_BY_4, 0x00000002
.set CYVAL__DFT_DIV1_DIV_BY_8, 0x00000003
.set CYFLD__DFT_EDGE1__OFFSET, 0x0000000e
.set CYFLD__DFT_EDGE1__SIZE, 0x00000001
.set CYVAL__DFT_EDGE1_POSEDGE, 0x00000000
.set CYVAL__DFT_EDGE1_NEGEDGE, 0x00000001
.set CYREG_WDT_DISABLE_KEY, 0x40030038
.set CYFLD__KEY__OFFSET, 0x00000000
.set CYFLD__KEY__SIZE, 0x00000020
.set CYREG_WDT_COUNTER, 0x4003003c
.set CYREG_WDT_MATCH, 0x40030040
.set CYFLD__MATCH__OFFSET, 0x00000000
.set CYFLD__MATCH__SIZE, 0x00000010
.set CYFLD__IGNORE_BITS__OFFSET, 0x00000010
.set CYFLD__IGNORE_BITS__SIZE, 0x00000004
.set CYREG_SRSS_INTR, 0x40030044
.set CYFLD__WDT_MATCH__OFFSET, 0x00000000
.set CYFLD__WDT_MATCH__SIZE, 0x00000001
.set CYFLD__TEMP_HIGH__OFFSET, 0x00000001
.set CYFLD__TEMP_HIGH__SIZE, 0x00000001
.set CYREG_SRSS_INTR_SET, 0x40030048
.set CYREG_SRSS_INTR_MASK, 0x4003004c
.set CYREG_RES_CAUSE, 0x40030054
.set CYFLD__RESET_WDT__OFFSET, 0x00000000
.set CYFLD__RESET_WDT__SIZE, 0x00000001
.set CYFLD__RESET_PROT_FAULT__OFFSET, 0x00000003
.set CYFLD__RESET_PROT_FAULT__SIZE, 0x00000001
.set CYFLD__RESET_SOFT__OFFSET, 0x00000004
.set CYFLD__RESET_SOFT__SIZE, 0x00000001
.set CYREG_PWR_BG_TRIM1, 0x40030f00
.set CYFLD__REF_VTRIM__OFFSET, 0x00000000
.set CYFLD__REF_VTRIM__SIZE, 0x00000006
.set CYREG_PWR_BG_TRIM2, 0x40030f04
.set CYFLD__REF_ITRIM__OFFSET, 0x00000000
.set CYFLD__REF_ITRIM__SIZE, 0x00000006
.set CYREG_CLK_IMO_SELECT, 0x40030f08
.set CYFLD__FREQ__OFFSET, 0x00000000
.set CYFLD__FREQ__SIZE, 0x00000003
.set CYVAL__FREQ_24_MHZ, 0x00000000
.set CYVAL__FREQ_28_MHZ, 0x00000001
.set CYVAL__FREQ_32_MHZ, 0x00000002
.set CYVAL__FREQ_36_MHZ, 0x00000003
.set CYVAL__FREQ_40_MHZ, 0x00000004
.set CYVAL__FREQ_44_MHZ, 0x00000005
.set CYVAL__FREQ_48_MHZ, 0x00000006
.set CYREG_CLK_IMO_TRIM1, 0x40030f0c
.set CYFLD__OFFSET__OFFSET, 0x00000000
.set CYFLD__OFFSET__SIZE, 0x00000008
.set CYREG_CLK_IMO_TRIM2, 0x40030f10
.set CYFLD__FSOFFSET__OFFSET, 0x00000000
.set CYFLD__FSOFFSET__SIZE, 0x00000003
.set CYREG_PWR_PWRSYS_TRIM1, 0x40030f14
.set CYFLD__DPSLP_REF_TRIM__OFFSET, 0x00000000
.set CYFLD__DPSLP_REF_TRIM__SIZE, 0x00000004
.set CYFLD__SPARE_TRIM__OFFSET, 0x00000004
.set CYFLD__SPARE_TRIM__SIZE, 0x00000004
.set CYREG_CLK_IMO_TRIM3, 0x40030f18
.set CYFLD__STEPSIZE__OFFSET, 0x00000000
.set CYFLD__STEPSIZE__SIZE, 0x00000005
.set CYFLD__TCTRIM__OFFSET, 0x00000005
.set CYFLD__TCTRIM__SIZE, 0x00000002
.set CYDEV_GPIO_BASE, 0x40040000
.set CYDEV_GPIO_SIZE, 0x00004000
.set CYDEV_GPIO_PRT0_BASE, 0x40040000
.set CYDEV_GPIO_PRT0_SIZE, 0x00000100
.set CYREG_GPIO_PRT0_DR, 0x40040000
.set CYFLD_GPIO_PRT_DATA0__OFFSET, 0x00000000
.set CYFLD_GPIO_PRT_DATA0__SIZE, 0x00000001
.set CYFLD_GPIO_PRT_DATA1__OFFSET, 0x00000001
.set CYFLD_GPIO_PRT_DATA1__SIZE, 0x00000001
.set CYREG_GPIO_PRT0_PS, 0x40040004
.set CYFLD_GPIO_PRT_FLT_DATA__OFFSET, 0x00000008
.set CYFLD_GPIO_PRT_FLT_DATA__SIZE, 0x00000001
.set CYREG_GPIO_PRT0_PC, 0x40040008
.set CYFLD_GPIO_PRT_DM0__OFFSET, 0x00000000
.set CYFLD_GPIO_PRT_DM0__SIZE, 0x00000003
.set CYVAL_GPIO_PRT_DM0_OFF, 0x00000000
.set CYVAL_GPIO_PRT_DM0_INPUT, 0x00000001
.set CYVAL_GPIO_PRT_DM0_0_PU, 0x00000002
.set CYVAL_GPIO_PRT_DM0_PD_1, 0x00000003
.set CYVAL_GPIO_PRT_DM0_0_Z, 0x00000004
.set CYVAL_GPIO_PRT_DM0_Z_1, 0x00000005
.set CYVAL_GPIO_PRT_DM0_0_1, 0x00000006
.set CYVAL_GPIO_PRT_DM0_PD_PU, 0x00000007
.set CYFLD_GPIO_PRT_DM1__OFFSET, 0x00000003
.set CYFLD_GPIO_PRT_DM1__SIZE, 0x00000003
.set CYFLD_GPIO_PRT_PORT_VTRIP_SEL__OFFSET, 0x00000018
.set CYFLD_GPIO_PRT_PORT_VTRIP_SEL__SIZE, 0x00000001
.set CYFLD_GPIO_PRT_PORT_SLOW__OFFSET, 0x00000019
.set CYFLD_GPIO_PRT_PORT_SLOW__SIZE, 0x00000001
.set CYFLD_GPIO_PRT_PORT_HYST_TRIM__OFFSET, 0x0000001b
.set CYFLD_GPIO_PRT_PORT_HYST_TRIM__SIZE, 0x00000001
.set CYFLD_GPIO_PRT_PORT_SLEW_CTL__OFFSET, 0x0000001c
.set CYFLD_GPIO_PRT_PORT_SLEW_CTL__SIZE, 0x00000002
.set CYVAL_GPIO_PRT_PORT_SLEW_CTL_PORT_SLEW_CTL_0, 0x00000000
.set CYVAL_GPIO_PRT_PORT_SLEW_CTL_PORT_SLEW_CTL_1, 0x00000001
.set CYVAL_GPIO_PRT_PORT_SLEW_CTL_PORT_SLEW_CTL_2, 0x00000002
.set CYVAL_GPIO_PRT_PORT_SLEW_CTL_PORT_SLEW_CTL_3, 0x00000003
.set CYFLD_GPIO_PRT_PORT_IB_MODE_SEL__OFFSET, 0x0000001e
.set CYFLD_GPIO_PRT_PORT_IB_MODE_SEL__SIZE, 0x00000002
.set CYREG_GPIO_PRT0_INTR_CFG, 0x4004000c
.set CYFLD_GPIO_PRT_EDGE0_SEL__OFFSET, 0x00000000
.set CYFLD_GPIO_PRT_EDGE0_SEL__SIZE, 0x00000002
.set CYVAL_GPIO_PRT_EDGE0_SEL_DISABLE, 0x00000000
.set CYVAL_GPIO_PRT_EDGE0_SEL_RISING, 0x00000001
.set CYVAL_GPIO_PRT_EDGE0_SEL_FALLING, 0x00000002
.set CYVAL_GPIO_PRT_EDGE0_SEL_BOTH, 0x00000003
.set CYFLD_GPIO_PRT_EDGE1_SEL__OFFSET, 0x00000002
.set CYFLD_GPIO_PRT_EDGE1_SEL__SIZE, 0x00000002
.set CYFLD_GPIO_PRT_FLT_EDGE_SEL__OFFSET, 0x00000010
.set CYFLD_GPIO_PRT_FLT_EDGE_SEL__SIZE, 0x00000002
.set CYVAL_GPIO_PRT_FLT_EDGE_SEL_DISABLE, 0x00000000
.set CYVAL_GPIO_PRT_FLT_EDGE_SEL_RISING, 0x00000001
.set CYVAL_GPIO_PRT_FLT_EDGE_SEL_FALLING, 0x00000002
.set CYVAL_GPIO_PRT_FLT_EDGE_SEL_BOTH, 0x00000003
.set CYFLD_GPIO_PRT_FLT_SEL__OFFSET, 0x00000012
.set CYFLD_GPIO_PRT_FLT_SEL__SIZE, 0x00000003
.set CYREG_GPIO_PRT0_INTR, 0x40040010
.set CYFLD_GPIO_PRT_PS_DATA0__OFFSET, 0x00000010
.set CYFLD_GPIO_PRT_PS_DATA0__SIZE, 0x00000001
.set CYFLD_GPIO_PRT_PS_DATA1__OFFSET, 0x00000011
.set CYFLD_GPIO_PRT_PS_DATA1__SIZE, 0x00000001
.set CYFLD_GPIO_PRT_PS_FLT_DATA__OFFSET, 0x00000018
.set CYFLD_GPIO_PRT_PS_FLT_DATA__SIZE, 0x00000001
.set CYREG_GPIO_PRT0_PC2, 0x40040018
.set CYFLD_GPIO_PRT_INP_DIS0__OFFSET, 0x00000000
.set CYFLD_GPIO_PRT_INP_DIS0__SIZE, 0x00000001
.set CYFLD_GPIO_PRT_INP_DIS1__OFFSET, 0x00000001
.set CYFLD_GPIO_PRT_INP_DIS1__SIZE, 0x00000001
.set CYREG_GPIO_PRT0_DR_SET, 0x40040040
.set CYFLD_GPIO_PRT_DATA__OFFSET, 0x00000000
.set CYFLD_GPIO_PRT_DATA__SIZE, 0x00000008
.set CYREG_GPIO_PRT0_DR_CLR, 0x40040044
.set CYREG_GPIO_PRT0_DR_INV, 0x40040048
.set CYDEV_GPIO_PRT1_BASE, 0x40040100
.set CYDEV_GPIO_PRT1_SIZE, 0x00000100
.set CYREG_GPIO_PRT1_DR, 0x40040100
.set CYFLD_GPIO_PRT_DATA2__OFFSET, 0x00000002
.set CYFLD_GPIO_PRT_DATA2__SIZE, 0x00000001
.set CYFLD_GPIO_PRT_DATA3__OFFSET, 0x00000003
.set CYFLD_GPIO_PRT_DATA3__SIZE, 0x00000001
.set CYFLD_GPIO_PRT_DATA4__OFFSET, 0x00000004
.set CYFLD_GPIO_PRT_DATA4__SIZE, 0x00000001
.set CYFLD_GPIO_PRT_DATA5__OFFSET, 0x00000005
.set CYFLD_GPIO_PRT_DATA5__SIZE, 0x00000001
.set CYFLD_GPIO_PRT_DATA6__OFFSET, 0x00000006
.set CYFLD_GPIO_PRT_DATA6__SIZE, 0x00000001
.set CYFLD_GPIO_PRT_DATA7__OFFSET, 0x00000007
.set CYFLD_GPIO_PRT_DATA7__SIZE, 0x00000001
.set CYREG_GPIO_PRT1_PS, 0x40040104
.set CYREG_GPIO_PRT1_PC, 0x40040108
.set CYFLD_GPIO_PRT_DM2__OFFSET, 0x00000006
.set CYFLD_GPIO_PRT_DM2__SIZE, 0x00000003
.set CYFLD_GPIO_PRT_DM3__OFFSET, 0x00000009
.set CYFLD_GPIO_PRT_DM3__SIZE, 0x00000003
.set CYFLD_GPIO_PRT_DM4__OFFSET, 0x0000000c
.set CYFLD_GPIO_PRT_DM4__SIZE, 0x00000003
.set CYFLD_GPIO_PRT_DM5__OFFSET, 0x0000000f
.set CYFLD_GPIO_PRT_DM5__SIZE, 0x00000003
.set CYFLD_GPIO_PRT_DM6__OFFSET, 0x00000012
.set CYFLD_GPIO_PRT_DM6__SIZE, 0x00000003
.set CYFLD_GPIO_PRT_DM7__OFFSET, 0x00000015
.set CYFLD_GPIO_PRT_DM7__SIZE, 0x00000003
.set CYREG_GPIO_PRT1_INTR_CFG, 0x4004010c
.set CYFLD_GPIO_PRT_EDGE2_SEL__OFFSET, 0x00000004
.set CYFLD_GPIO_PRT_EDGE2_SEL__SIZE, 0x00000002
.set CYFLD_GPIO_PRT_EDGE3_SEL__OFFSET, 0x00000006
.set CYFLD_GPIO_PRT_EDGE3_SEL__SIZE, 0x00000002
.set CYFLD_GPIO_PRT_EDGE4_SEL__OFFSET, 0x00000008
.set CYFLD_GPIO_PRT_EDGE4_SEL__SIZE, 0x00000002
.set CYFLD_GPIO_PRT_EDGE5_SEL__OFFSET, 0x0000000a
.set CYFLD_GPIO_PRT_EDGE5_SEL__SIZE, 0x00000002
.set CYFLD_GPIO_PRT_EDGE6_SEL__OFFSET, 0x0000000c
.set CYFLD_GPIO_PRT_EDGE6_SEL__SIZE, 0x00000002
.set CYFLD_GPIO_PRT_EDGE7_SEL__OFFSET, 0x0000000e
.set CYFLD_GPIO_PRT_EDGE7_SEL__SIZE, 0x00000002
.set CYREG_GPIO_PRT1_INTR, 0x40040110
.set CYFLD_GPIO_PRT_PS_DATA2__OFFSET, 0x00000012
.set CYFLD_GPIO_PRT_PS_DATA2__SIZE, 0x00000001
.set CYFLD_GPIO_PRT_PS_DATA3__OFFSET, 0x00000013
.set CYFLD_GPIO_PRT_PS_DATA3__SIZE, 0x00000001
.set CYFLD_GPIO_PRT_PS_DATA4__OFFSET, 0x00000014
.set CYFLD_GPIO_PRT_PS_DATA4__SIZE, 0x00000001
.set CYFLD_GPIO_PRT_PS_DATA5__OFFSET, 0x00000015
.set CYFLD_GPIO_PRT_PS_DATA5__SIZE, 0x00000001
.set CYFLD_GPIO_PRT_PS_DATA6__OFFSET, 0x00000016
.set CYFLD_GPIO_PRT_PS_DATA6__SIZE, 0x00000001
.set CYFLD_GPIO_PRT_PS_DATA7__OFFSET, 0x00000017
.set CYFLD_GPIO_PRT_PS_DATA7__SIZE, 0x00000001
.set CYREG_GPIO_PRT1_PC2, 0x40040118
.set CYFLD_GPIO_PRT_INP_DIS2__OFFSET, 0x00000002
.set CYFLD_GPIO_PRT_INP_DIS2__SIZE, 0x00000001
.set CYFLD_GPIO_PRT_INP_DIS3__OFFSET, 0x00000003
.set CYFLD_GPIO_PRT_INP_DIS3__SIZE, 0x00000001
.set CYFLD_GPIO_PRT_INP_DIS4__OFFSET, 0x00000004
.set CYFLD_GPIO_PRT_INP_DIS4__SIZE, 0x00000001
.set CYFLD_GPIO_PRT_INP_DIS5__OFFSET, 0x00000005
.set CYFLD_GPIO_PRT_INP_DIS5__SIZE, 0x00000001
.set CYFLD_GPIO_PRT_INP_DIS6__OFFSET, 0x00000006
.set CYFLD_GPIO_PRT_INP_DIS6__SIZE, 0x00000001
.set CYFLD_GPIO_PRT_INP_DIS7__OFFSET, 0x00000007
.set CYFLD_GPIO_PRT_INP_DIS7__SIZE, 0x00000001
.set CYREG_GPIO_PRT1_DR_SET, 0x40040140
.set CYREG_GPIO_PRT1_DR_CLR, 0x40040144
.set CYREG_GPIO_PRT1_DR_INV, 0x40040148
.set CYDEV_GPIO_PRT2_BASE, 0x40040200
.set CYDEV_GPIO_PRT2_SIZE, 0x00000100
.set CYREG_GPIO_PRT2_DR, 0x40040200
.set CYREG_GPIO_PRT2_PS, 0x40040204
.set CYREG_GPIO_PRT2_PC, 0x40040208
.set CYREG_GPIO_PRT2_INTR_CFG, 0x4004020c
.set CYREG_GPIO_PRT2_INTR, 0x40040210
.set CYREG_GPIO_PRT2_PC2, 0x40040218
.set CYREG_GPIO_PRT2_DR_SET, 0x40040240
.set CYREG_GPIO_PRT2_DR_CLR, 0x40040244
.set CYREG_GPIO_PRT2_DR_INV, 0x40040248
.set CYDEV_GPIO_PRT3_BASE, 0x40040300
.set CYDEV_GPIO_PRT3_SIZE, 0x00000100
.set CYREG_GPIO_PRT3_DR, 0x40040300
.set CYREG_GPIO_PRT3_PS, 0x40040304
.set CYREG_GPIO_PRT3_PC, 0x40040308
.set CYREG_GPIO_PRT3_INTR_CFG, 0x4004030c
.set CYREG_GPIO_PRT3_INTR, 0x40040310
.set CYREG_GPIO_PRT3_PC2, 0x40040318
.set CYREG_GPIO_PRT3_DR_SET, 0x40040340
.set CYREG_GPIO_PRT3_DR_CLR, 0x40040344
.set CYREG_GPIO_PRT3_DR_INV, 0x40040348
.set CYDEV_GPIO_PRT4_BASE, 0x40040400
.set CYDEV_GPIO_PRT4_SIZE, 0x00000100
.set CYREG_GPIO_PRT4_DR, 0x40040400
.set CYREG_GPIO_PRT4_PS, 0x40040404
.set CYREG_GPIO_PRT4_INTR_CFG, 0x4004040c
.set CYREG_GPIO_PRT4_INTR, 0x40040410
.set CYREG_GPIO_PRT4_DR_SET, 0x40040440
.set CYREG_GPIO_PRT4_DR_CLR, 0x40040444
.set CYREG_GPIO_PRT4_DR_INV, 0x40040448
.set CYREG_GPIO_INTR_CAUSE, 0x40041000
.set CYFLD_GPIO_PORT_INT__OFFSET, 0x00000000
.set CYFLD_GPIO_PORT_INT__SIZE, 0x00000005
.set CYDEV_SCB0_BASE, 0x40050000
.set CYDEV_SCB0_SIZE, 0x00010000
.set CYREG_SCB0_CTRL, 0x40050000
.set CYFLD_SCB_OVS__OFFSET, 0x00000000
.set CYFLD_SCB_OVS__SIZE, 0x00000004
.set CYFLD_SCB_EC_AM_MODE__OFFSET, 0x00000008
.set CYFLD_SCB_EC_AM_MODE__SIZE, 0x00000001
.set CYFLD_SCB_EC_OP_MODE__OFFSET, 0x00000009
.set CYFLD_SCB_EC_OP_MODE__SIZE, 0x00000001
.set CYFLD_SCB_EZ_MODE__OFFSET, 0x0000000a
.set CYFLD_SCB_EZ_MODE__SIZE, 0x00000001
.set CYFLD_SCB_BYTE_MODE__OFFSET, 0x0000000b
.set CYFLD_SCB_BYTE_MODE__SIZE, 0x00000001
.set CYFLD_SCB_CMD_RESP_MODE__OFFSET, 0x0000000c
.set CYFLD_SCB_CMD_RESP_MODE__SIZE, 0x00000001
.set CYFLD_SCB_ADDR_ACCEPT__OFFSET, 0x00000010
.set CYFLD_SCB_ADDR_ACCEPT__SIZE, 0x00000001
.set CYFLD_SCB_BLOCK__OFFSET, 0x00000011
.set CYFLD_SCB_BLOCK__SIZE, 0x00000001
.set CYFLD_SCB_MODE__OFFSET, 0x00000018
.set CYFLD_SCB_MODE__SIZE, 0x00000002
.set CYVAL_SCB_MODE_I2C, 0x00000000
.set CYVAL_SCB_MODE_SPI, 0x00000001
.set CYVAL_SCB_MODE_UART, 0x00000002
.set CYFLD_SCB_ENABLED__OFFSET, 0x0000001f
.set CYFLD_SCB_ENABLED__SIZE, 0x00000001
.set CYREG_SCB0_STATUS, 0x40050004
.set CYFLD_SCB_EC_BUSY__OFFSET, 0x00000000
.set CYFLD_SCB_EC_BUSY__SIZE, 0x00000001
.set CYREG_SCB0_CMD_RESP_CTRL, 0x40050008
.set CYFLD_SCB_BASE_RD_ADDR__OFFSET, 0x00000000
.set CYFLD_SCB_BASE_RD_ADDR__SIZE, 0x00000008
.set CYFLD_SCB_BASE_WR_ADDR__OFFSET, 0x00000010
.set CYFLD_SCB_BASE_WR_ADDR__SIZE, 0x00000008
.set CYREG_SCB0_CMD_RESP_STATUS, 0x4005000c
.set CYFLD_SCB_CURR_RD_ADDR__OFFSET, 0x00000000
.set CYFLD_SCB_CURR_RD_ADDR__SIZE, 0x00000008
.set CYFLD_SCB_CURR_WR_ADDR__OFFSET, 0x00000010
.set CYFLD_SCB_CURR_WR_ADDR__SIZE, 0x00000008
.set CYFLD_SCB_CMD_RESP_EC_BUS_BUSY__OFFSET, 0x0000001e
.set CYFLD_SCB_CMD_RESP_EC_BUS_BUSY__SIZE, 0x00000001
.set CYFLD_SCB_CMD_RESP_EC_BUSY__OFFSET, 0x0000001f
.set CYFLD_SCB_CMD_RESP_EC_BUSY__SIZE, 0x00000001
.set CYREG_SCB0_SPI_CTRL, 0x40050020
.set CYFLD_SCB_CONTINUOUS__OFFSET, 0x00000000
.set CYFLD_SCB_CONTINUOUS__SIZE, 0x00000001
.set CYFLD_SCB_SELECT_PRECEDE__OFFSET, 0x00000001
.set CYFLD_SCB_SELECT_PRECEDE__SIZE, 0x00000001
.set CYFLD_SCB_CPHA__OFFSET, 0x00000002
.set CYFLD_SCB_CPHA__SIZE, 0x00000001
.set CYFLD_SCB_CPOL__OFFSET, 0x00000003
.set CYFLD_SCB_CPOL__SIZE, 0x00000001
.set CYFLD_SCB_LATE_MISO_SAMPLE__OFFSET, 0x00000004
.set CYFLD_SCB_LATE_MISO_SAMPLE__SIZE, 0x00000001
.set CYFLD_SCB_SCLK_CONTINUOUS__OFFSET, 0x00000005
.set CYFLD_SCB_SCLK_CONTINUOUS__SIZE, 0x00000001
.set CYFLD_SCB_SSEL_POLARITY0__OFFSET, 0x00000008
.set CYFLD_SCB_SSEL_POLARITY0__SIZE, 0x00000001
.set CYFLD_SCB_SSEL_POLARITY1__OFFSET, 0x00000009
.set CYFLD_SCB_SSEL_POLARITY1__SIZE, 0x00000001
.set CYFLD_SCB_SSEL_POLARITY2__OFFSET, 0x0000000a
.set CYFLD_SCB_SSEL_POLARITY2__SIZE, 0x00000001
.set CYFLD_SCB_SSEL_POLARITY3__OFFSET, 0x0000000b
.set CYFLD_SCB_SSEL_POLARITY3__SIZE, 0x00000001
.set CYFLD_SCB_LOOPBACK__OFFSET, 0x00000010
.set CYFLD_SCB_LOOPBACK__SIZE, 0x00000001
.set CYFLD_SCB_SLAVE_SELECT__OFFSET, 0x0000001a
.set CYFLD_SCB_SLAVE_SELECT__SIZE, 0x00000002
.set CYFLD_SCB_MASTER_MODE__OFFSET, 0x0000001f
.set CYFLD_SCB_MASTER_MODE__SIZE, 0x00000001
.set CYREG_SCB0_SPI_STATUS, 0x40050024
.set CYFLD_SCB_BUS_BUSY__OFFSET, 0x00000000
.set CYFLD_SCB_BUS_BUSY__SIZE, 0x00000001
.set CYFLD_SCB_SPI_EC_BUSY__OFFSET, 0x00000001
.set CYFLD_SCB_SPI_EC_BUSY__SIZE, 0x00000001
.set CYFLD_SCB_CURR_EZ_ADDR__OFFSET, 0x00000008
.set CYFLD_SCB_CURR_EZ_ADDR__SIZE, 0x00000008
.set CYFLD_SCB_BASE_EZ_ADDR__OFFSET, 0x00000010
.set CYFLD_SCB_BASE_EZ_ADDR__SIZE, 0x00000008
.set CYREG_SCB0_UART_CTRL, 0x40050040
.set CYREG_SCB0_UART_TX_CTRL, 0x40050044
.set CYFLD_SCB_STOP_BITS__OFFSET, 0x00000000
.set CYFLD_SCB_STOP_BITS__SIZE, 0x00000003
.set CYFLD_SCB_PARITY__OFFSET, 0x00000004
.set CYFLD_SCB_PARITY__SIZE, 0x00000001
.set CYFLD_SCB_PARITY_ENABLED__OFFSET, 0x00000005
.set CYFLD_SCB_PARITY_ENABLED__SIZE, 0x00000001
.set CYFLD_SCB_RETRY_ON_NACK__OFFSET, 0x00000008
.set CYFLD_SCB_RETRY_ON_NACK__SIZE, 0x00000001
.set CYREG_SCB0_UART_RX_CTRL, 0x40050048
.set CYFLD_SCB_POLARITY__OFFSET, 0x00000006
.set CYFLD_SCB_POLARITY__SIZE, 0x00000001
.set CYFLD_SCB_DROP_ON_PARITY_ERROR__OFFSET, 0x00000008
.set CYFLD_SCB_DROP_ON_PARITY_ERROR__SIZE, 0x00000001
.set CYFLD_SCB_DROP_ON_FRAME_ERROR__OFFSET, 0x00000009
.set CYFLD_SCB_DROP_ON_FRAME_ERROR__SIZE, 0x00000001
.set CYFLD_SCB_MP_MODE__OFFSET, 0x0000000a
.set CYFLD_SCB_MP_MODE__SIZE, 0x00000001
.set CYFLD_SCB_LIN_MODE__OFFSET, 0x0000000c
.set CYFLD_SCB_LIN_MODE__SIZE, 0x00000001
.set CYFLD_SCB_SKIP_START__OFFSET, 0x0000000d
.set CYFLD_SCB_SKIP_START__SIZE, 0x00000001
.set CYFLD_SCB_BREAK_WIDTH__OFFSET, 0x00000010
.set CYFLD_SCB_BREAK_WIDTH__SIZE, 0x00000004
.set CYREG_SCB0_UART_RX_STATUS, 0x4005004c
.set CYFLD_SCB_BR_COUNTER__OFFSET, 0x00000000
.set CYFLD_SCB_BR_COUNTER__SIZE, 0x0000000c
.set CYREG_SCB0_UART_FLOW_CTRL, 0x40050050
.set CYFLD_SCB_TRIGGER_LEVEL__OFFSET, 0x00000000
.set CYFLD_SCB_TRIGGER_LEVEL__SIZE, 0x00000007
.set CYFLD_SCB_RTS_POLARITY__OFFSET, 0x00000010
.set CYFLD_SCB_RTS_POLARITY__SIZE, 0x00000001
.set CYFLD_SCB_CTS_POLARITY__OFFSET, 0x00000018
.set CYFLD_SCB_CTS_POLARITY__SIZE, 0x00000001
.set CYFLD_SCB_CTS_ENABLED__OFFSET, 0x00000019
.set CYFLD_SCB_CTS_ENABLED__SIZE, 0x00000001
.set CYREG_SCB0_I2C_CTRL, 0x40050060
.set CYFLD_SCB_HIGH_PHASE_OVS__OFFSET, 0x00000000
.set CYFLD_SCB_HIGH_PHASE_OVS__SIZE, 0x00000004
.set CYFLD_SCB_LOW_PHASE_OVS__OFFSET, 0x00000004
.set CYFLD_SCB_LOW_PHASE_OVS__SIZE, 0x00000004
.set CYFLD_SCB_M_READY_DATA_ACK__OFFSET, 0x00000008
.set CYFLD_SCB_M_READY_DATA_ACK__SIZE, 0x00000001
.set CYFLD_SCB_M_NOT_READY_DATA_NACK__OFFSET, 0x00000009
.set CYFLD_SCB_M_NOT_READY_DATA_NACK__SIZE, 0x00000001
.set CYFLD_SCB_S_GENERAL_IGNORE__OFFSET, 0x0000000b
.set CYFLD_SCB_S_GENERAL_IGNORE__SIZE, 0x00000001
.set CYFLD_SCB_S_READY_ADDR_ACK__OFFSET, 0x0000000c
.set CYFLD_SCB_S_READY_ADDR_ACK__SIZE, 0x00000001
.set CYFLD_SCB_S_READY_DATA_ACK__OFFSET, 0x0000000d
.set CYFLD_SCB_S_READY_DATA_ACK__SIZE, 0x00000001
.set CYFLD_SCB_S_NOT_READY_ADDR_NACK__OFFSET, 0x0000000e
.set CYFLD_SCB_S_NOT_READY_ADDR_NACK__SIZE, 0x00000001
.set CYFLD_SCB_S_NOT_READY_DATA_NACK__OFFSET, 0x0000000f
.set CYFLD_SCB_S_NOT_READY_DATA_NACK__SIZE, 0x00000001
.set CYFLD_SCB_SLAVE_MODE__OFFSET, 0x0000001e
.set CYFLD_SCB_SLAVE_MODE__SIZE, 0x00000001
.set CYREG_SCB0_I2C_STATUS, 0x40050064
.set CYFLD_SCB_I2C_EC_BUSY__OFFSET, 0x00000001
.set CYFLD_SCB_I2C_EC_BUSY__SIZE, 0x00000001
.set CYFLD_SCB_S_READ__OFFSET, 0x00000004
.set CYFLD_SCB_S_READ__SIZE, 0x00000001
.set CYFLD_SCB_M_READ__OFFSET, 0x00000005
.set CYFLD_SCB_M_READ__SIZE, 0x00000001
.set CYREG_SCB0_I2C_M_CMD, 0x40050068
.set CYFLD_SCB_M_START__OFFSET, 0x00000000
.set CYFLD_SCB_M_START__SIZE, 0x00000001
.set CYFLD_SCB_M_START_ON_IDLE__OFFSET, 0x00000001
.set CYFLD_SCB_M_START_ON_IDLE__SIZE, 0x00000001
.set CYFLD_SCB_M_ACK__OFFSET, 0x00000002
.set CYFLD_SCB_M_ACK__SIZE, 0x00000001
.set CYFLD_SCB_M_NACK__OFFSET, 0x00000003
.set CYFLD_SCB_M_NACK__SIZE, 0x00000001
.set CYFLD_SCB_M_STOP__OFFSET, 0x00000004
.set CYFLD_SCB_M_STOP__SIZE, 0x00000001
.set CYREG_SCB0_I2C_S_CMD, 0x4005006c
.set CYFLD_SCB_S_ACK__OFFSET, 0x00000000
.set CYFLD_SCB_S_ACK__SIZE, 0x00000001
.set CYFLD_SCB_S_NACK__OFFSET, 0x00000001
.set CYFLD_SCB_S_NACK__SIZE, 0x00000001
.set CYREG_SCB0_I2C_CFG, 0x40050070
.set CYFLD_SCB_SDA_IN_FILT_TRIM__OFFSET, 0x00000000
.set CYFLD_SCB_SDA_IN_FILT_TRIM__SIZE, 0x00000002
.set CYFLD_SCB_SDA_IN_FILT_SEL__OFFSET, 0x00000004
.set CYFLD_SCB_SDA_IN_FILT_SEL__SIZE, 0x00000001
.set CYFLD_SCB_SCL_IN_FILT_TRIM__OFFSET, 0x00000008
.set CYFLD_SCB_SCL_IN_FILT_TRIM__SIZE, 0x00000002
.set CYFLD_SCB_SCL_IN_FILT_SEL__OFFSET, 0x0000000c
.set CYFLD_SCB_SCL_IN_FILT_SEL__SIZE, 0x00000001
.set CYFLD_SCB_SDA_OUT_FILT0_TRIM__OFFSET, 0x00000010
.set CYFLD_SCB_SDA_OUT_FILT0_TRIM__SIZE, 0x00000002
.set CYFLD_SCB_SDA_OUT_FILT1_TRIM__OFFSET, 0x00000012
.set CYFLD_SCB_SDA_OUT_FILT1_TRIM__SIZE, 0x00000002
.set CYFLD_SCB_SDA_OUT_FILT2_TRIM__OFFSET, 0x00000014
.set CYFLD_SCB_SDA_OUT_FILT2_TRIM__SIZE, 0x00000002
.set CYFLD_SCB_SDA_OUT_FILT_SEL__OFFSET, 0x0000001c
.set CYFLD_SCB_SDA_OUT_FILT_SEL__SIZE, 0x00000002
.set CYREG_SCB0_TX_CTRL, 0x40050200
.set CYFLD_SCB_DATA_WIDTH__OFFSET, 0x00000000
.set CYFLD_SCB_DATA_WIDTH__SIZE, 0x00000004
.set CYFLD_SCB_MSB_FIRST__OFFSET, 0x00000008
.set CYFLD_SCB_MSB_FIRST__SIZE, 0x00000001
.set CYREG_SCB0_TX_FIFO_CTRL, 0x40050204
.set CYFLD_SCB_CLEAR__OFFSET, 0x00000010
.set CYFLD_SCB_CLEAR__SIZE, 0x00000001
.set CYFLD_SCB_FREEZE__OFFSET, 0x00000011
.set CYFLD_SCB_FREEZE__SIZE, 0x00000001
.set CYREG_SCB0_TX_FIFO_STATUS, 0x40050208
.set CYFLD_SCB_USED__OFFSET, 0x00000000
.set CYFLD_SCB_USED__SIZE, 0x00000008
.set CYFLD_SCB_SR_VALID__OFFSET, 0x0000000f
.set CYFLD_SCB_SR_VALID__SIZE, 0x00000001
.set CYFLD_SCB_RD_PTR__OFFSET, 0x00000010
.set CYFLD_SCB_RD_PTR__SIZE, 0x00000007
.set CYFLD_SCB_WR_PTR__OFFSET, 0x00000018
.set CYFLD_SCB_WR_PTR__SIZE, 0x00000007
.set CYREG_SCB0_TX_FIFO_WR, 0x40050240
.set CYFLD_SCB_DATA__OFFSET, 0x00000000
.set CYFLD_SCB_DATA__SIZE, 0x00000010
.set CYREG_SCB0_RX_CTRL, 0x40050300
.set CYFLD_SCB_MEDIAN__OFFSET, 0x00000009
.set CYFLD_SCB_MEDIAN__SIZE, 0x00000001
.set CYREG_SCB0_RX_FIFO_CTRL, 0x40050304
.set CYREG_SCB0_RX_FIFO_STATUS, 0x40050308
.set CYREG_SCB0_RX_MATCH, 0x40050310
.set CYFLD_SCB_ADDR__OFFSET, 0x00000000
.set CYFLD_SCB_ADDR__SIZE, 0x00000008
.set CYFLD_SCB_MASK__OFFSET, 0x00000010
.set CYFLD_SCB_MASK__SIZE, 0x00000008
.set CYREG_SCB0_RX_FIFO_RD, 0x40050340
.set CYREG_SCB0_RX_FIFO_RD_SILENT, 0x40050344
.set CYREG_SCB0_EZ_DATA0, 0x40050400
.set CYFLD_SCB_EZ_DATA__OFFSET, 0x00000000
.set CYFLD_SCB_EZ_DATA__SIZE, 0x00000008
.set CYREG_SCB0_EZ_DATA1, 0x40050404
.set CYREG_SCB0_EZ_DATA2, 0x40050408
.set CYREG_SCB0_EZ_DATA3, 0x4005040c
.set CYREG_SCB0_EZ_DATA4, 0x40050410
.set CYREG_SCB0_EZ_DATA5, 0x40050414
.set CYREG_SCB0_EZ_DATA6, 0x40050418
.set CYREG_SCB0_EZ_DATA7, 0x4005041c
.set CYREG_SCB0_EZ_DATA8, 0x40050420
.set CYREG_SCB0_EZ_DATA9, 0x40050424
.set CYREG_SCB0_EZ_DATA10, 0x40050428
.set CYREG_SCB0_EZ_DATA11, 0x4005042c
.set CYREG_SCB0_EZ_DATA12, 0x40050430
.set CYREG_SCB0_EZ_DATA13, 0x40050434
.set CYREG_SCB0_EZ_DATA14, 0x40050438
.set CYREG_SCB0_EZ_DATA15, 0x4005043c
.set CYREG_SCB0_EZ_DATA16, 0x40050440
.set CYREG_SCB0_EZ_DATA17, 0x40050444
.set CYREG_SCB0_EZ_DATA18, 0x40050448
.set CYREG_SCB0_EZ_DATA19, 0x4005044c
.set CYREG_SCB0_EZ_DATA20, 0x40050450
.set CYREG_SCB0_EZ_DATA21, 0x40050454
.set CYREG_SCB0_EZ_DATA22, 0x40050458
.set CYREG_SCB0_EZ_DATA23, 0x4005045c
.set CYREG_SCB0_EZ_DATA24, 0x40050460
.set CYREG_SCB0_EZ_DATA25, 0x40050464
.set CYREG_SCB0_EZ_DATA26, 0x40050468
.set CYREG_SCB0_EZ_DATA27, 0x4005046c
.set CYREG_SCB0_EZ_DATA28, 0x40050470
.set CYREG_SCB0_EZ_DATA29, 0x40050474
.set CYREG_SCB0_EZ_DATA30, 0x40050478
.set CYREG_SCB0_EZ_DATA31, 0x4005047c
.set CYREG_SCB0_EZ_DATA32, 0x40050480
.set CYREG_SCB0_EZ_DATA33, 0x40050484
.set CYREG_SCB0_EZ_DATA34, 0x40050488
.set CYREG_SCB0_EZ_DATA35, 0x4005048c
.set CYREG_SCB0_EZ_DATA36, 0x40050490
.set CYREG_SCB0_EZ_DATA37, 0x40050494
.set CYREG_SCB0_EZ_DATA38, 0x40050498
.set CYREG_SCB0_EZ_DATA39, 0x4005049c
.set CYREG_SCB0_EZ_DATA40, 0x400504a0
.set CYREG_SCB0_EZ_DATA41, 0x400504a4
.set CYREG_SCB0_EZ_DATA42, 0x400504a8
.set CYREG_SCB0_EZ_DATA43, 0x400504ac
.set CYREG_SCB0_EZ_DATA44, 0x400504b0
.set CYREG_SCB0_EZ_DATA45, 0x400504b4
.set CYREG_SCB0_EZ_DATA46, 0x400504b8
.set CYREG_SCB0_EZ_DATA47, 0x400504bc
.set CYREG_SCB0_EZ_DATA48, 0x400504c0
.set CYREG_SCB0_EZ_DATA49, 0x400504c4
.set CYREG_SCB0_EZ_DATA50, 0x400504c8
.set CYREG_SCB0_EZ_DATA51, 0x400504cc
.set CYREG_SCB0_EZ_DATA52, 0x400504d0
.set CYREG_SCB0_EZ_DATA53, 0x400504d4
.set CYREG_SCB0_EZ_DATA54, 0x400504d8
.set CYREG_SCB0_EZ_DATA55, 0x400504dc
.set CYREG_SCB0_EZ_DATA56, 0x400504e0
.set CYREG_SCB0_EZ_DATA57, 0x400504e4
.set CYREG_SCB0_EZ_DATA58, 0x400504e8
.set CYREG_SCB0_EZ_DATA59, 0x400504ec
.set CYREG_SCB0_EZ_DATA60, 0x400504f0
.set CYREG_SCB0_EZ_DATA61, 0x400504f4
.set CYREG_SCB0_EZ_DATA62, 0x400504f8
.set CYREG_SCB0_EZ_DATA63, 0x400504fc
.set CYREG_SCB0_EZ_DATA64, 0x40050500
.set CYREG_SCB0_EZ_DATA65, 0x40050504
.set CYREG_SCB0_EZ_DATA66, 0x40050508
.set CYREG_SCB0_EZ_DATA67, 0x4005050c
.set CYREG_SCB0_EZ_DATA68, 0x40050510
.set CYREG_SCB0_EZ_DATA69, 0x40050514
.set CYREG_SCB0_EZ_DATA70, 0x40050518
.set CYREG_SCB0_EZ_DATA71, 0x4005051c
.set CYREG_SCB0_EZ_DATA72, 0x40050520
.set CYREG_SCB0_EZ_DATA73, 0x40050524
.set CYREG_SCB0_EZ_DATA74, 0x40050528
.set CYREG_SCB0_EZ_DATA75, 0x4005052c
.set CYREG_SCB0_EZ_DATA76, 0x40050530
.set CYREG_SCB0_EZ_DATA77, 0x40050534
.set CYREG_SCB0_EZ_DATA78, 0x40050538
.set CYREG_SCB0_EZ_DATA79, 0x4005053c
.set CYREG_SCB0_EZ_DATA80, 0x40050540
.set CYREG_SCB0_EZ_DATA81, 0x40050544
.set CYREG_SCB0_EZ_DATA82, 0x40050548
.set CYREG_SCB0_EZ_DATA83, 0x4005054c
.set CYREG_SCB0_EZ_DATA84, 0x40050550
.set CYREG_SCB0_EZ_DATA85, 0x40050554
.set CYREG_SCB0_EZ_DATA86, 0x40050558
.set CYREG_SCB0_EZ_DATA87, 0x4005055c
.set CYREG_SCB0_EZ_DATA88, 0x40050560
.set CYREG_SCB0_EZ_DATA89, 0x40050564
.set CYREG_SCB0_EZ_DATA90, 0x40050568
.set CYREG_SCB0_EZ_DATA91, 0x4005056c
.set CYREG_SCB0_EZ_DATA92, 0x40050570
.set CYREG_SCB0_EZ_DATA93, 0x40050574
.set CYREG_SCB0_EZ_DATA94, 0x40050578
.set CYREG_SCB0_EZ_DATA95, 0x4005057c
.set CYREG_SCB0_EZ_DATA96, 0x40050580
.set CYREG_SCB0_EZ_DATA97, 0x40050584
.set CYREG_SCB0_EZ_DATA98, 0x40050588
.set CYREG_SCB0_EZ_DATA99, 0x4005058c
.set CYREG_SCB0_EZ_DATA100, 0x40050590
.set CYREG_SCB0_EZ_DATA101, 0x40050594
.set CYREG_SCB0_EZ_DATA102, 0x40050598
.set CYREG_SCB0_EZ_DATA103, 0x4005059c
.set CYREG_SCB0_EZ_DATA104, 0x400505a0
.set CYREG_SCB0_EZ_DATA105, 0x400505a4
.set CYREG_SCB0_EZ_DATA106, 0x400505a8
.set CYREG_SCB0_EZ_DATA107, 0x400505ac
.set CYREG_SCB0_EZ_DATA108, 0x400505b0
.set CYREG_SCB0_EZ_DATA109, 0x400505b4
.set CYREG_SCB0_EZ_DATA110, 0x400505b8
.set CYREG_SCB0_EZ_DATA111, 0x400505bc
.set CYREG_SCB0_EZ_DATA112, 0x400505c0
.set CYREG_SCB0_EZ_DATA113, 0x400505c4
.set CYREG_SCB0_EZ_DATA114, 0x400505c8
.set CYREG_SCB0_EZ_DATA115, 0x400505cc
.set CYREG_SCB0_EZ_DATA116, 0x400505d0
.set CYREG_SCB0_EZ_DATA117, 0x400505d4
.set CYREG_SCB0_EZ_DATA118, 0x400505d8
.set CYREG_SCB0_EZ_DATA119, 0x400505dc
.set CYREG_SCB0_EZ_DATA120, 0x400505e0
.set CYREG_SCB0_EZ_DATA121, 0x400505e4
.set CYREG_SCB0_EZ_DATA122, 0x400505e8
.set CYREG_SCB0_EZ_DATA123, 0x400505ec
.set CYREG_SCB0_EZ_DATA124, 0x400505f0
.set CYREG_SCB0_EZ_DATA125, 0x400505f4
.set CYREG_SCB0_EZ_DATA126, 0x400505f8
.set CYREG_SCB0_EZ_DATA127, 0x400505fc
.set CYREG_SCB0_EZ_DATA128, 0x40050600
.set CYREG_SCB0_EZ_DATA129, 0x40050604
.set CYREG_SCB0_EZ_DATA130, 0x40050608
.set CYREG_SCB0_EZ_DATA131, 0x4005060c
.set CYREG_SCB0_EZ_DATA132, 0x40050610
.set CYREG_SCB0_EZ_DATA133, 0x40050614
.set CYREG_SCB0_EZ_DATA134, 0x40050618
.set CYREG_SCB0_EZ_DATA135, 0x4005061c
.set CYREG_SCB0_EZ_DATA136, 0x40050620
.set CYREG_SCB0_EZ_DATA137, 0x40050624
.set CYREG_SCB0_EZ_DATA138, 0x40050628
.set CYREG_SCB0_EZ_DATA139, 0x4005062c
.set CYREG_SCB0_EZ_DATA140, 0x40050630
.set CYREG_SCB0_EZ_DATA141, 0x40050634
.set CYREG_SCB0_EZ_DATA142, 0x40050638
.set CYREG_SCB0_EZ_DATA143, 0x4005063c
.set CYREG_SCB0_EZ_DATA144, 0x40050640
.set CYREG_SCB0_EZ_DATA145, 0x40050644
.set CYREG_SCB0_EZ_DATA146, 0x40050648
.set CYREG_SCB0_EZ_DATA147, 0x4005064c
.set CYREG_SCB0_EZ_DATA148, 0x40050650
.set CYREG_SCB0_EZ_DATA149, 0x40050654
.set CYREG_SCB0_EZ_DATA150, 0x40050658
.set CYREG_SCB0_EZ_DATA151, 0x4005065c
.set CYREG_SCB0_EZ_DATA152, 0x40050660
.set CYREG_SCB0_EZ_DATA153, 0x40050664
.set CYREG_SCB0_EZ_DATA154, 0x40050668
.set CYREG_SCB0_EZ_DATA155, 0x4005066c
.set CYREG_SCB0_EZ_DATA156, 0x40050670
.set CYREG_SCB0_EZ_DATA157, 0x40050674
.set CYREG_SCB0_EZ_DATA158, 0x40050678
.set CYREG_SCB0_EZ_DATA159, 0x4005067c
.set CYREG_SCB0_EZ_DATA160, 0x40050680
.set CYREG_SCB0_EZ_DATA161, 0x40050684
.set CYREG_SCB0_EZ_DATA162, 0x40050688
.set CYREG_SCB0_EZ_DATA163, 0x4005068c
.set CYREG_SCB0_EZ_DATA164, 0x40050690
.set CYREG_SCB0_EZ_DATA165, 0x40050694
.set CYREG_SCB0_EZ_DATA166, 0x40050698
.set CYREG_SCB0_EZ_DATA167, 0x4005069c
.set CYREG_SCB0_EZ_DATA168, 0x400506a0
.set CYREG_SCB0_EZ_DATA169, 0x400506a4
.set CYREG_SCB0_EZ_DATA170, 0x400506a8
.set CYREG_SCB0_EZ_DATA171, 0x400506ac
.set CYREG_SCB0_EZ_DATA172, 0x400506b0
.set CYREG_SCB0_EZ_DATA173, 0x400506b4
.set CYREG_SCB0_EZ_DATA174, 0x400506b8
.set CYREG_SCB0_EZ_DATA175, 0x400506bc
.set CYREG_SCB0_EZ_DATA176, 0x400506c0
.set CYREG_SCB0_EZ_DATA177, 0x400506c4
.set CYREG_SCB0_EZ_DATA178, 0x400506c8
.set CYREG_SCB0_EZ_DATA179, 0x400506cc
.set CYREG_SCB0_EZ_DATA180, 0x400506d0
.set CYREG_SCB0_EZ_DATA181, 0x400506d4
.set CYREG_SCB0_EZ_DATA182, 0x400506d8
.set CYREG_SCB0_EZ_DATA183, 0x400506dc
.set CYREG_SCB0_EZ_DATA184, 0x400506e0
.set CYREG_SCB0_EZ_DATA185, 0x400506e4
.set CYREG_SCB0_EZ_DATA186, 0x400506e8
.set CYREG_SCB0_EZ_DATA187, 0x400506ec
.set CYREG_SCB0_EZ_DATA188, 0x400506f0
.set CYREG_SCB0_EZ_DATA189, 0x400506f4
.set CYREG_SCB0_EZ_DATA190, 0x400506f8
.set CYREG_SCB0_EZ_DATA191, 0x400506fc
.set CYREG_SCB0_EZ_DATA192, 0x40050700
.set CYREG_SCB0_EZ_DATA193, 0x40050704
.set CYREG_SCB0_EZ_DATA194, 0x40050708
.set CYREG_SCB0_EZ_DATA195, 0x4005070c
.set CYREG_SCB0_EZ_DATA196, 0x40050710
.set CYREG_SCB0_EZ_DATA197, 0x40050714
.set CYREG_SCB0_EZ_DATA198, 0x40050718
.set CYREG_SCB0_EZ_DATA199, 0x4005071c
.set CYREG_SCB0_EZ_DATA200, 0x40050720
.set CYREG_SCB0_EZ_DATA201, 0x40050724
.set CYREG_SCB0_EZ_DATA202, 0x40050728
.set CYREG_SCB0_EZ_DATA203, 0x4005072c
.set CYREG_SCB0_EZ_DATA204, 0x40050730
.set CYREG_SCB0_EZ_DATA205, 0x40050734
.set CYREG_SCB0_EZ_DATA206, 0x40050738
.set CYREG_SCB0_EZ_DATA207, 0x4005073c
.set CYREG_SCB0_EZ_DATA208, 0x40050740
.set CYREG_SCB0_EZ_DATA209, 0x40050744
.set CYREG_SCB0_EZ_DATA210, 0x40050748
.set CYREG_SCB0_EZ_DATA211, 0x4005074c
.set CYREG_SCB0_EZ_DATA212, 0x40050750
.set CYREG_SCB0_EZ_DATA213, 0x40050754
.set CYREG_SCB0_EZ_DATA214, 0x40050758
.set CYREG_SCB0_EZ_DATA215, 0x4005075c
.set CYREG_SCB0_EZ_DATA216, 0x40050760
.set CYREG_SCB0_EZ_DATA217, 0x40050764
.set CYREG_SCB0_EZ_DATA218, 0x40050768
.set CYREG_SCB0_EZ_DATA219, 0x4005076c
.set CYREG_SCB0_EZ_DATA220, 0x40050770
.set CYREG_SCB0_EZ_DATA221, 0x40050774
.set CYREG_SCB0_EZ_DATA222, 0x40050778
.set CYREG_SCB0_EZ_DATA223, 0x4005077c
.set CYREG_SCB0_EZ_DATA224, 0x40050780
.set CYREG_SCB0_EZ_DATA225, 0x40050784
.set CYREG_SCB0_EZ_DATA226, 0x40050788
.set CYREG_SCB0_EZ_DATA227, 0x4005078c
.set CYREG_SCB0_EZ_DATA228, 0x40050790
.set CYREG_SCB0_EZ_DATA229, 0x40050794
.set CYREG_SCB0_EZ_DATA230, 0x40050798
.set CYREG_SCB0_EZ_DATA231, 0x4005079c
.set CYREG_SCB0_EZ_DATA232, 0x400507a0
.set CYREG_SCB0_EZ_DATA233, 0x400507a4
.set CYREG_SCB0_EZ_DATA234, 0x400507a8
.set CYREG_SCB0_EZ_DATA235, 0x400507ac
.set CYREG_SCB0_EZ_DATA236, 0x400507b0
.set CYREG_SCB0_EZ_DATA237, 0x400507b4
.set CYREG_SCB0_EZ_DATA238, 0x400507b8
.set CYREG_SCB0_EZ_DATA239, 0x400507bc
.set CYREG_SCB0_EZ_DATA240, 0x400507c0
.set CYREG_SCB0_EZ_DATA241, 0x400507c4
.set CYREG_SCB0_EZ_DATA242, 0x400507c8
.set CYREG_SCB0_EZ_DATA243, 0x400507cc
.set CYREG_SCB0_EZ_DATA244, 0x400507d0
.set CYREG_SCB0_EZ_DATA245, 0x400507d4
.set CYREG_SCB0_EZ_DATA246, 0x400507d8
.set CYREG_SCB0_EZ_DATA247, 0x400507dc
.set CYREG_SCB0_EZ_DATA248, 0x400507e0
.set CYREG_SCB0_EZ_DATA249, 0x400507e4
.set CYREG_SCB0_EZ_DATA250, 0x400507e8
.set CYREG_SCB0_EZ_DATA251, 0x400507ec
.set CYREG_SCB0_EZ_DATA252, 0x400507f0
.set CYREG_SCB0_EZ_DATA253, 0x400507f4
.set CYREG_SCB0_EZ_DATA254, 0x400507f8
.set CYREG_SCB0_EZ_DATA255, 0x400507fc
.set CYREG_SCB0_INTR_CAUSE, 0x40050e00
.set CYFLD_SCB_M__OFFSET, 0x00000000
.set CYFLD_SCB_M__SIZE, 0x00000001
.set CYFLD_SCB_S__OFFSET, 0x00000001
.set CYFLD_SCB_S__SIZE, 0x00000001
.set CYFLD_SCB_TX__OFFSET, 0x00000002
.set CYFLD_SCB_TX__SIZE, 0x00000001
.set CYFLD_SCB_RX__OFFSET, 0x00000003
.set CYFLD_SCB_RX__SIZE, 0x00000001
.set CYFLD_SCB_I2C_EC__OFFSET, 0x00000004
.set CYFLD_SCB_I2C_EC__SIZE, 0x00000001
.set CYFLD_SCB_SPI_EC__OFFSET, 0x00000005
.set CYFLD_SCB_SPI_EC__SIZE, 0x00000001
.set CYREG_SCB0_INTR_I2C_EC, 0x40050e80
.set CYFLD_SCB_WAKE_UP__OFFSET, 0x00000000
.set CYFLD_SCB_WAKE_UP__SIZE, 0x00000001
.set CYFLD_SCB_EZ_STOP__OFFSET, 0x00000001
.set CYFLD_SCB_EZ_STOP__SIZE, 0x00000001
.set CYFLD_SCB_EZ_WRITE_STOP__OFFSET, 0x00000002
.set CYFLD_SCB_EZ_WRITE_STOP__SIZE, 0x00000001
.set CYFLD_SCB_EZ_READ_STOP__OFFSET, 0x00000003
.set CYFLD_SCB_EZ_READ_STOP__SIZE, 0x00000001
.set CYREG_SCB0_INTR_I2C_EC_MASK, 0x40050e88
.set CYREG_SCB0_INTR_I2C_EC_MASKED, 0x40050e8c
.set CYREG_SCB0_INTR_SPI_EC, 0x40050ec0
.set CYREG_SCB0_INTR_SPI_EC_MASK, 0x40050ec8
.set CYREG_SCB0_INTR_SPI_EC_MASKED, 0x40050ecc
.set CYREG_SCB0_INTR_M, 0x40050f00
.set CYFLD_SCB_I2C_ARB_LOST__OFFSET, 0x00000000
.set CYFLD_SCB_I2C_ARB_LOST__SIZE, 0x00000001
.set CYFLD_SCB_I2C_NACK__OFFSET, 0x00000001
.set CYFLD_SCB_I2C_NACK__SIZE, 0x00000001
.set CYFLD_SCB_I2C_ACK__OFFSET, 0x00000002
.set CYFLD_SCB_I2C_ACK__SIZE, 0x00000001
.set CYFLD_SCB_I2C_STOP__OFFSET, 0x00000004
.set CYFLD_SCB_I2C_STOP__SIZE, 0x00000001
.set CYFLD_SCB_I2C_BUS_ERROR__OFFSET, 0x00000008
.set CYFLD_SCB_I2C_BUS_ERROR__SIZE, 0x00000001
.set CYFLD_SCB_SPI_DONE__OFFSET, 0x00000009
.set CYFLD_SCB_SPI_DONE__SIZE, 0x00000001
.set CYREG_SCB0_INTR_M_SET, 0x40050f04
.set CYREG_SCB0_INTR_M_MASK, 0x40050f08
.set CYREG_SCB0_INTR_M_MASKED, 0x40050f0c
.set CYREG_SCB0_INTR_S, 0x40050f40
.set CYFLD_SCB_I2C_WRITE_STOP__OFFSET, 0x00000003
.set CYFLD_SCB_I2C_WRITE_STOP__SIZE, 0x00000001
.set CYFLD_SCB_I2C_START__OFFSET, 0x00000005
.set CYFLD_SCB_I2C_START__SIZE, 0x00000001
.set CYFLD_SCB_I2C_ADDR_MATCH__OFFSET, 0x00000006
.set CYFLD_SCB_I2C_ADDR_MATCH__SIZE, 0x00000001
.set CYFLD_SCB_I2C_GENERAL__OFFSET, 0x00000007
.set CYFLD_SCB_I2C_GENERAL__SIZE, 0x00000001
.set CYFLD_SCB_SPI_EZ_WRITE_STOP__OFFSET, 0x00000009
.set CYFLD_SCB_SPI_EZ_WRITE_STOP__SIZE, 0x00000001
.set CYFLD_SCB_SPI_EZ_STOP__OFFSET, 0x0000000a
.set CYFLD_SCB_SPI_EZ_STOP__SIZE, 0x00000001
.set CYFLD_SCB_SPI_BUS_ERROR__OFFSET, 0x0000000b
.set CYFLD_SCB_SPI_BUS_ERROR__SIZE, 0x00000001
.set CYREG_SCB0_INTR_S_SET, 0x40050f44
.set CYREG_SCB0_INTR_S_MASK, 0x40050f48
.set CYREG_SCB0_INTR_S_MASKED, 0x40050f4c
.set CYREG_SCB0_INTR_TX, 0x40050f80
.set CYFLD_SCB_TRIGGER__OFFSET, 0x00000000
.set CYFLD_SCB_TRIGGER__SIZE, 0x00000001
.set CYFLD_SCB_NOT_FULL__OFFSET, 0x00000001
.set CYFLD_SCB_NOT_FULL__SIZE, 0x00000001
.set CYFLD_SCB_EMPTY__OFFSET, 0x00000004
.set CYFLD_SCB_EMPTY__SIZE, 0x00000001
.set CYFLD_SCB_OVERFLOW__OFFSET, 0x00000005
.set CYFLD_SCB_OVERFLOW__SIZE, 0x00000001
.set CYFLD_SCB_UNDERFLOW__OFFSET, 0x00000006
.set CYFLD_SCB_UNDERFLOW__SIZE, 0x00000001
.set CYFLD_SCB_BLOCKED__OFFSET, 0x00000007
.set CYFLD_SCB_BLOCKED__SIZE, 0x00000001
.set CYFLD_SCB_UART_NACK__OFFSET, 0x00000008
.set CYFLD_SCB_UART_NACK__SIZE, 0x00000001
.set CYFLD_SCB_UART_DONE__OFFSET, 0x00000009
.set CYFLD_SCB_UART_DONE__SIZE, 0x00000001
.set CYFLD_SCB_UART_ARB_LOST__OFFSET, 0x0000000a
.set CYFLD_SCB_UART_ARB_LOST__SIZE, 0x00000001
.set CYREG_SCB0_INTR_TX_SET, 0x40050f84
.set CYREG_SCB0_INTR_TX_MASK, 0x40050f88
.set CYREG_SCB0_INTR_TX_MASKED, 0x40050f8c
.set CYREG_SCB0_INTR_RX, 0x40050fc0
.set CYFLD_SCB_NOT_EMPTY__OFFSET, 0x00000002
.set CYFLD_SCB_NOT_EMPTY__SIZE, 0x00000001
.set CYFLD_SCB_FULL__OFFSET, 0x00000003
.set CYFLD_SCB_FULL__SIZE, 0x00000001
.set CYFLD_SCB_FRAME_ERROR__OFFSET, 0x00000008
.set CYFLD_SCB_FRAME_ERROR__SIZE, 0x00000001
.set CYFLD_SCB_PARITY_ERROR__OFFSET, 0x00000009
.set CYFLD_SCB_PARITY_ERROR__SIZE, 0x00000001
.set CYFLD_SCB_BAUD_DETECT__OFFSET, 0x0000000a
.set CYFLD_SCB_BAUD_DETECT__SIZE, 0x00000001
.set CYFLD_SCB_BREAK_DETECT__OFFSET, 0x0000000b
.set CYFLD_SCB_BREAK_DETECT__SIZE, 0x00000001
.set CYREG_SCB0_INTR_RX_SET, 0x40050fc4
.set CYREG_SCB0_INTR_RX_MASK, 0x40050fc8
.set CYREG_SCB0_INTR_RX_MASKED, 0x40050fcc
.set CYDEV_SCB1_BASE, 0x40060000
.set CYDEV_SCB1_SIZE, 0x00010000
.set CYREG_SCB1_CTRL, 0x40060000
.set CYREG_SCB1_STATUS, 0x40060004
.set CYREG_SCB1_CMD_RESP_CTRL, 0x40060008
.set CYREG_SCB1_CMD_RESP_STATUS, 0x4006000c
.set CYREG_SCB1_SPI_CTRL, 0x40060020
.set CYREG_SCB1_SPI_STATUS, 0x40060024
.set CYREG_SCB1_UART_CTRL, 0x40060040
.set CYREG_SCB1_UART_TX_CTRL, 0x40060044
.set CYREG_SCB1_UART_RX_CTRL, 0x40060048
.set CYREG_SCB1_UART_RX_STATUS, 0x4006004c
.set CYREG_SCB1_UART_FLOW_CTRL, 0x40060050
.set CYREG_SCB1_I2C_CTRL, 0x40060060
.set CYREG_SCB1_I2C_STATUS, 0x40060064
.set CYREG_SCB1_I2C_M_CMD, 0x40060068
.set CYREG_SCB1_I2C_S_CMD, 0x4006006c
.set CYREG_SCB1_I2C_CFG, 0x40060070
.set CYREG_SCB1_TX_CTRL, 0x40060200
.set CYREG_SCB1_TX_FIFO_CTRL, 0x40060204
.set CYREG_SCB1_TX_FIFO_STATUS, 0x40060208
.set CYREG_SCB1_TX_FIFO_WR, 0x40060240
.set CYREG_SCB1_RX_CTRL, 0x40060300
.set CYREG_SCB1_RX_FIFO_CTRL, 0x40060304
.set CYREG_SCB1_RX_FIFO_STATUS, 0x40060308
.set CYREG_SCB1_RX_MATCH, 0x40060310
.set CYREG_SCB1_RX_FIFO_RD, 0x40060340
.set CYREG_SCB1_RX_FIFO_RD_SILENT, 0x40060344
.set CYREG_SCB1_EZ_DATA0, 0x40060400
.set CYREG_SCB1_EZ_DATA1, 0x40060404
.set CYREG_SCB1_EZ_DATA2, 0x40060408
.set CYREG_SCB1_EZ_DATA3, 0x4006040c
.set CYREG_SCB1_EZ_DATA4, 0x40060410
.set CYREG_SCB1_EZ_DATA5, 0x40060414
.set CYREG_SCB1_EZ_DATA6, 0x40060418
.set CYREG_SCB1_EZ_DATA7, 0x4006041c
.set CYREG_SCB1_EZ_DATA8, 0x40060420
.set CYREG_SCB1_EZ_DATA9, 0x40060424
.set CYREG_SCB1_EZ_DATA10, 0x40060428
.set CYREG_SCB1_EZ_DATA11, 0x4006042c
.set CYREG_SCB1_EZ_DATA12, 0x40060430
.set CYREG_SCB1_EZ_DATA13, 0x40060434
.set CYREG_SCB1_EZ_DATA14, 0x40060438
.set CYREG_SCB1_EZ_DATA15, 0x4006043c
.set CYREG_SCB1_EZ_DATA16, 0x40060440
.set CYREG_SCB1_EZ_DATA17, 0x40060444
.set CYREG_SCB1_EZ_DATA18, 0x40060448
.set CYREG_SCB1_EZ_DATA19, 0x4006044c
.set CYREG_SCB1_EZ_DATA20, 0x40060450
.set CYREG_SCB1_EZ_DATA21, 0x40060454
.set CYREG_SCB1_EZ_DATA22, 0x40060458
.set CYREG_SCB1_EZ_DATA23, 0x4006045c
.set CYREG_SCB1_EZ_DATA24, 0x40060460
.set CYREG_SCB1_EZ_DATA25, 0x40060464
.set CYREG_SCB1_EZ_DATA26, 0x40060468
.set CYREG_SCB1_EZ_DATA27, 0x4006046c
.set CYREG_SCB1_EZ_DATA28, 0x40060470
.set CYREG_SCB1_EZ_DATA29, 0x40060474
.set CYREG_SCB1_EZ_DATA30, 0x40060478
.set CYREG_SCB1_EZ_DATA31, 0x4006047c
.set CYREG_SCB1_EZ_DATA32, 0x40060480
.set CYREG_SCB1_EZ_DATA33, 0x40060484
.set CYREG_SCB1_EZ_DATA34, 0x40060488
.set CYREG_SCB1_EZ_DATA35, 0x4006048c
.set CYREG_SCB1_EZ_DATA36, 0x40060490
.set CYREG_SCB1_EZ_DATA37, 0x40060494
.set CYREG_SCB1_EZ_DATA38, 0x40060498
.set CYREG_SCB1_EZ_DATA39, 0x4006049c
.set CYREG_SCB1_EZ_DATA40, 0x400604a0
.set CYREG_SCB1_EZ_DATA41, 0x400604a4
.set CYREG_SCB1_EZ_DATA42, 0x400604a8
.set CYREG_SCB1_EZ_DATA43, 0x400604ac
.set CYREG_SCB1_EZ_DATA44, 0x400604b0
.set CYREG_SCB1_EZ_DATA45, 0x400604b4
.set CYREG_SCB1_EZ_DATA46, 0x400604b8
.set CYREG_SCB1_EZ_DATA47, 0x400604bc
.set CYREG_SCB1_EZ_DATA48, 0x400604c0
.set CYREG_SCB1_EZ_DATA49, 0x400604c4
.set CYREG_SCB1_EZ_DATA50, 0x400604c8
.set CYREG_SCB1_EZ_DATA51, 0x400604cc
.set CYREG_SCB1_EZ_DATA52, 0x400604d0
.set CYREG_SCB1_EZ_DATA53, 0x400604d4
.set CYREG_SCB1_EZ_DATA54, 0x400604d8
.set CYREG_SCB1_EZ_DATA55, 0x400604dc
.set CYREG_SCB1_EZ_DATA56, 0x400604e0
.set CYREG_SCB1_EZ_DATA57, 0x400604e4
.set CYREG_SCB1_EZ_DATA58, 0x400604e8
.set CYREG_SCB1_EZ_DATA59, 0x400604ec
.set CYREG_SCB1_EZ_DATA60, 0x400604f0
.set CYREG_SCB1_EZ_DATA61, 0x400604f4
.set CYREG_SCB1_EZ_DATA62, 0x400604f8
.set CYREG_SCB1_EZ_DATA63, 0x400604fc
.set CYREG_SCB1_EZ_DATA64, 0x40060500
.set CYREG_SCB1_EZ_DATA65, 0x40060504
.set CYREG_SCB1_EZ_DATA66, 0x40060508
.set CYREG_SCB1_EZ_DATA67, 0x4006050c
.set CYREG_SCB1_EZ_DATA68, 0x40060510
.set CYREG_SCB1_EZ_DATA69, 0x40060514
.set CYREG_SCB1_EZ_DATA70, 0x40060518
.set CYREG_SCB1_EZ_DATA71, 0x4006051c
.set CYREG_SCB1_EZ_DATA72, 0x40060520
.set CYREG_SCB1_EZ_DATA73, 0x40060524
.set CYREG_SCB1_EZ_DATA74, 0x40060528
.set CYREG_SCB1_EZ_DATA75, 0x4006052c
.set CYREG_SCB1_EZ_DATA76, 0x40060530
.set CYREG_SCB1_EZ_DATA77, 0x40060534
.set CYREG_SCB1_EZ_DATA78, 0x40060538
.set CYREG_SCB1_EZ_DATA79, 0x4006053c
.set CYREG_SCB1_EZ_DATA80, 0x40060540
.set CYREG_SCB1_EZ_DATA81, 0x40060544
.set CYREG_SCB1_EZ_DATA82, 0x40060548
.set CYREG_SCB1_EZ_DATA83, 0x4006054c
.set CYREG_SCB1_EZ_DATA84, 0x40060550
.set CYREG_SCB1_EZ_DATA85, 0x40060554
.set CYREG_SCB1_EZ_DATA86, 0x40060558
.set CYREG_SCB1_EZ_DATA87, 0x4006055c
.set CYREG_SCB1_EZ_DATA88, 0x40060560
.set CYREG_SCB1_EZ_DATA89, 0x40060564
.set CYREG_SCB1_EZ_DATA90, 0x40060568
.set CYREG_SCB1_EZ_DATA91, 0x4006056c
.set CYREG_SCB1_EZ_DATA92, 0x40060570
.set CYREG_SCB1_EZ_DATA93, 0x40060574
.set CYREG_SCB1_EZ_DATA94, 0x40060578
.set CYREG_SCB1_EZ_DATA95, 0x4006057c
.set CYREG_SCB1_EZ_DATA96, 0x40060580
.set CYREG_SCB1_EZ_DATA97, 0x40060584
.set CYREG_SCB1_EZ_DATA98, 0x40060588
.set CYREG_SCB1_EZ_DATA99, 0x4006058c
.set CYREG_SCB1_EZ_DATA100, 0x40060590
.set CYREG_SCB1_EZ_DATA101, 0x40060594
.set CYREG_SCB1_EZ_DATA102, 0x40060598
.set CYREG_SCB1_EZ_DATA103, 0x4006059c
.set CYREG_SCB1_EZ_DATA104, 0x400605a0
.set CYREG_SCB1_EZ_DATA105, 0x400605a4
.set CYREG_SCB1_EZ_DATA106, 0x400605a8
.set CYREG_SCB1_EZ_DATA107, 0x400605ac
.set CYREG_SCB1_EZ_DATA108, 0x400605b0
.set CYREG_SCB1_EZ_DATA109, 0x400605b4
.set CYREG_SCB1_EZ_DATA110, 0x400605b8
.set CYREG_SCB1_EZ_DATA111, 0x400605bc
.set CYREG_SCB1_EZ_DATA112, 0x400605c0
.set CYREG_SCB1_EZ_DATA113, 0x400605c4
.set CYREG_SCB1_EZ_DATA114, 0x400605c8
.set CYREG_SCB1_EZ_DATA115, 0x400605cc
.set CYREG_SCB1_EZ_DATA116, 0x400605d0
.set CYREG_SCB1_EZ_DATA117, 0x400605d4
.set CYREG_SCB1_EZ_DATA118, 0x400605d8
.set CYREG_SCB1_EZ_DATA119, 0x400605dc
.set CYREG_SCB1_EZ_DATA120, 0x400605e0
.set CYREG_SCB1_EZ_DATA121, 0x400605e4
.set CYREG_SCB1_EZ_DATA122, 0x400605e8
.set CYREG_SCB1_EZ_DATA123, 0x400605ec
.set CYREG_SCB1_EZ_DATA124, 0x400605f0
.set CYREG_SCB1_EZ_DATA125, 0x400605f4
.set CYREG_SCB1_EZ_DATA126, 0x400605f8
.set CYREG_SCB1_EZ_DATA127, 0x400605fc
.set CYREG_SCB1_EZ_DATA128, 0x40060600
.set CYREG_SCB1_EZ_DATA129, 0x40060604
.set CYREG_SCB1_EZ_DATA130, 0x40060608
.set CYREG_SCB1_EZ_DATA131, 0x4006060c
.set CYREG_SCB1_EZ_DATA132, 0x40060610
.set CYREG_SCB1_EZ_DATA133, 0x40060614
.set CYREG_SCB1_EZ_DATA134, 0x40060618
.set CYREG_SCB1_EZ_DATA135, 0x4006061c
.set CYREG_SCB1_EZ_DATA136, 0x40060620
.set CYREG_SCB1_EZ_DATA137, 0x40060624
.set CYREG_SCB1_EZ_DATA138, 0x40060628
.set CYREG_SCB1_EZ_DATA139, 0x4006062c
.set CYREG_SCB1_EZ_DATA140, 0x40060630
.set CYREG_SCB1_EZ_DATA141, 0x40060634
.set CYREG_SCB1_EZ_DATA142, 0x40060638
.set CYREG_SCB1_EZ_DATA143, 0x4006063c
.set CYREG_SCB1_EZ_DATA144, 0x40060640
.set CYREG_SCB1_EZ_DATA145, 0x40060644
.set CYREG_SCB1_EZ_DATA146, 0x40060648
.set CYREG_SCB1_EZ_DATA147, 0x4006064c
.set CYREG_SCB1_EZ_DATA148, 0x40060650
.set CYREG_SCB1_EZ_DATA149, 0x40060654
.set CYREG_SCB1_EZ_DATA150, 0x40060658
.set CYREG_SCB1_EZ_DATA151, 0x4006065c
.set CYREG_SCB1_EZ_DATA152, 0x40060660
.set CYREG_SCB1_EZ_DATA153, 0x40060664
.set CYREG_SCB1_EZ_DATA154, 0x40060668
.set CYREG_SCB1_EZ_DATA155, 0x4006066c
.set CYREG_SCB1_EZ_DATA156, 0x40060670
.set CYREG_SCB1_EZ_DATA157, 0x40060674
.set CYREG_SCB1_EZ_DATA158, 0x40060678
.set CYREG_SCB1_EZ_DATA159, 0x4006067c
.set CYREG_SCB1_EZ_DATA160, 0x40060680
.set CYREG_SCB1_EZ_DATA161, 0x40060684
.set CYREG_SCB1_EZ_DATA162, 0x40060688
.set CYREG_SCB1_EZ_DATA163, 0x4006068c
.set CYREG_SCB1_EZ_DATA164, 0x40060690
.set CYREG_SCB1_EZ_DATA165, 0x40060694
.set CYREG_SCB1_EZ_DATA166, 0x40060698
.set CYREG_SCB1_EZ_DATA167, 0x4006069c
.set CYREG_SCB1_EZ_DATA168, 0x400606a0
.set CYREG_SCB1_EZ_DATA169, 0x400606a4
.set CYREG_SCB1_EZ_DATA170, 0x400606a8
.set CYREG_SCB1_EZ_DATA171, 0x400606ac
.set CYREG_SCB1_EZ_DATA172, 0x400606b0
.set CYREG_SCB1_EZ_DATA173, 0x400606b4
.set CYREG_SCB1_EZ_DATA174, 0x400606b8
.set CYREG_SCB1_EZ_DATA175, 0x400606bc
.set CYREG_SCB1_EZ_DATA176, 0x400606c0
.set CYREG_SCB1_EZ_DATA177, 0x400606c4
.set CYREG_SCB1_EZ_DATA178, 0x400606c8
.set CYREG_SCB1_EZ_DATA179, 0x400606cc
.set CYREG_SCB1_EZ_DATA180, 0x400606d0
.set CYREG_SCB1_EZ_DATA181, 0x400606d4
.set CYREG_SCB1_EZ_DATA182, 0x400606d8
.set CYREG_SCB1_EZ_DATA183, 0x400606dc
.set CYREG_SCB1_EZ_DATA184, 0x400606e0
.set CYREG_SCB1_EZ_DATA185, 0x400606e4
.set CYREG_SCB1_EZ_DATA186, 0x400606e8
.set CYREG_SCB1_EZ_DATA187, 0x400606ec
.set CYREG_SCB1_EZ_DATA188, 0x400606f0
.set CYREG_SCB1_EZ_DATA189, 0x400606f4
.set CYREG_SCB1_EZ_DATA190, 0x400606f8
.set CYREG_SCB1_EZ_DATA191, 0x400606fc
.set CYREG_SCB1_EZ_DATA192, 0x40060700
.set CYREG_SCB1_EZ_DATA193, 0x40060704
.set CYREG_SCB1_EZ_DATA194, 0x40060708
.set CYREG_SCB1_EZ_DATA195, 0x4006070c
.set CYREG_SCB1_EZ_DATA196, 0x40060710
.set CYREG_SCB1_EZ_DATA197, 0x40060714
.set CYREG_SCB1_EZ_DATA198, 0x40060718
.set CYREG_SCB1_EZ_DATA199, 0x4006071c
.set CYREG_SCB1_EZ_DATA200, 0x40060720
.set CYREG_SCB1_EZ_DATA201, 0x40060724
.set CYREG_SCB1_EZ_DATA202, 0x40060728
.set CYREG_SCB1_EZ_DATA203, 0x4006072c
.set CYREG_SCB1_EZ_DATA204, 0x40060730
.set CYREG_SCB1_EZ_DATA205, 0x40060734
.set CYREG_SCB1_EZ_DATA206, 0x40060738
.set CYREG_SCB1_EZ_DATA207, 0x4006073c
.set CYREG_SCB1_EZ_DATA208, 0x40060740
.set CYREG_SCB1_EZ_DATA209, 0x40060744
.set CYREG_SCB1_EZ_DATA210, 0x40060748
.set CYREG_SCB1_EZ_DATA211, 0x4006074c
.set CYREG_SCB1_EZ_DATA212, 0x40060750
.set CYREG_SCB1_EZ_DATA213, 0x40060754
.set CYREG_SCB1_EZ_DATA214, 0x40060758
.set CYREG_SCB1_EZ_DATA215, 0x4006075c
.set CYREG_SCB1_EZ_DATA216, 0x40060760
.set CYREG_SCB1_EZ_DATA217, 0x40060764
.set CYREG_SCB1_EZ_DATA218, 0x40060768
.set CYREG_SCB1_EZ_DATA219, 0x4006076c
.set CYREG_SCB1_EZ_DATA220, 0x40060770
.set CYREG_SCB1_EZ_DATA221, 0x40060774
.set CYREG_SCB1_EZ_DATA222, 0x40060778
.set CYREG_SCB1_EZ_DATA223, 0x4006077c
.set CYREG_SCB1_EZ_DATA224, 0x40060780
.set CYREG_SCB1_EZ_DATA225, 0x40060784
.set CYREG_SCB1_EZ_DATA226, 0x40060788
.set CYREG_SCB1_EZ_DATA227, 0x4006078c
.set CYREG_SCB1_EZ_DATA228, 0x40060790
.set CYREG_SCB1_EZ_DATA229, 0x40060794
.set CYREG_SCB1_EZ_DATA230, 0x40060798
.set CYREG_SCB1_EZ_DATA231, 0x4006079c
.set CYREG_SCB1_EZ_DATA232, 0x400607a0
.set CYREG_SCB1_EZ_DATA233, 0x400607a4
.set CYREG_SCB1_EZ_DATA234, 0x400607a8
.set CYREG_SCB1_EZ_DATA235, 0x400607ac
.set CYREG_SCB1_EZ_DATA236, 0x400607b0
.set CYREG_SCB1_EZ_DATA237, 0x400607b4
.set CYREG_SCB1_EZ_DATA238, 0x400607b8
.set CYREG_SCB1_EZ_DATA239, 0x400607bc
.set CYREG_SCB1_EZ_DATA240, 0x400607c0
.set CYREG_SCB1_EZ_DATA241, 0x400607c4
.set CYREG_SCB1_EZ_DATA242, 0x400607c8
.set CYREG_SCB1_EZ_DATA243, 0x400607cc
.set CYREG_SCB1_EZ_DATA244, 0x400607d0
.set CYREG_SCB1_EZ_DATA245, 0x400607d4
.set CYREG_SCB1_EZ_DATA246, 0x400607d8
.set CYREG_SCB1_EZ_DATA247, 0x400607dc
.set CYREG_SCB1_EZ_DATA248, 0x400607e0
.set CYREG_SCB1_EZ_DATA249, 0x400607e4
.set CYREG_SCB1_EZ_DATA250, 0x400607e8
.set CYREG_SCB1_EZ_DATA251, 0x400607ec
.set CYREG_SCB1_EZ_DATA252, 0x400607f0
.set CYREG_SCB1_EZ_DATA253, 0x400607f4
.set CYREG_SCB1_EZ_DATA254, 0x400607f8
.set CYREG_SCB1_EZ_DATA255, 0x400607fc
.set CYREG_SCB1_INTR_CAUSE, 0x40060e00
.set CYREG_SCB1_INTR_I2C_EC, 0x40060e80
.set CYREG_SCB1_INTR_I2C_EC_MASK, 0x40060e88
.set CYREG_SCB1_INTR_I2C_EC_MASKED, 0x40060e8c
.set CYREG_SCB1_INTR_SPI_EC, 0x40060ec0
.set CYREG_SCB1_INTR_SPI_EC_MASK, 0x40060ec8
.set CYREG_SCB1_INTR_SPI_EC_MASKED, 0x40060ecc
.set CYREG_SCB1_INTR_M, 0x40060f00
.set CYREG_SCB1_INTR_M_SET, 0x40060f04
.set CYREG_SCB1_INTR_M_MASK, 0x40060f08
.set CYREG_SCB1_INTR_M_MASKED, 0x40060f0c
.set CYREG_SCB1_INTR_S, 0x40060f40
.set CYREG_SCB1_INTR_S_SET, 0x40060f44
.set CYREG_SCB1_INTR_S_MASK, 0x40060f48
.set CYREG_SCB1_INTR_S_MASKED, 0x40060f4c
.set CYREG_SCB1_INTR_TX, 0x40060f80
.set CYREG_SCB1_INTR_TX_SET, 0x40060f84
.set CYREG_SCB1_INTR_TX_MASK, 0x40060f88
.set CYREG_SCB1_INTR_TX_MASKED, 0x40060f8c
.set CYREG_SCB1_INTR_RX, 0x40060fc0
.set CYREG_SCB1_INTR_RX_SET, 0x40060fc4
.set CYREG_SCB1_INTR_RX_MASK, 0x40060fc8
.set CYREG_SCB1_INTR_RX_MASKED, 0x40060fcc
.set CYDEV_SCB2_BASE, 0x40070000
.set CYDEV_SCB2_SIZE, 0x00010000
.set CYREG_SCB2_CTRL, 0x40070000
.set CYREG_SCB2_STATUS, 0x40070004
.set CYREG_SCB2_CMD_RESP_CTRL, 0x40070008
.set CYREG_SCB2_CMD_RESP_STATUS, 0x4007000c
.set CYREG_SCB2_SPI_CTRL, 0x40070020
.set CYREG_SCB2_SPI_STATUS, 0x40070024
.set CYREG_SCB2_UART_CTRL, 0x40070040
.set CYREG_SCB2_UART_TX_CTRL, 0x40070044
.set CYREG_SCB2_UART_RX_CTRL, 0x40070048
.set CYREG_SCB2_UART_RX_STATUS, 0x4007004c
.set CYREG_SCB2_UART_FLOW_CTRL, 0x40070050
.set CYREG_SCB2_I2C_CTRL, 0x40070060
.set CYREG_SCB2_I2C_STATUS, 0x40070064
.set CYREG_SCB2_I2C_M_CMD, 0x40070068
.set CYREG_SCB2_I2C_S_CMD, 0x4007006c
.set CYREG_SCB2_I2C_CFG, 0x40070070
.set CYREG_SCB2_TX_CTRL, 0x40070200
.set CYREG_SCB2_TX_FIFO_CTRL, 0x40070204
.set CYREG_SCB2_TX_FIFO_STATUS, 0x40070208
.set CYREG_SCB2_TX_FIFO_WR, 0x40070240
.set CYREG_SCB2_RX_CTRL, 0x40070300
.set CYREG_SCB2_RX_FIFO_CTRL, 0x40070304
.set CYREG_SCB2_RX_FIFO_STATUS, 0x40070308
.set CYREG_SCB2_RX_MATCH, 0x40070310
.set CYREG_SCB2_RX_FIFO_RD, 0x40070340
.set CYREG_SCB2_RX_FIFO_RD_SILENT, 0x40070344
.set CYREG_SCB2_EZ_DATA0, 0x40070400
.set CYREG_SCB2_EZ_DATA1, 0x40070404
.set CYREG_SCB2_EZ_DATA2, 0x40070408
.set CYREG_SCB2_EZ_DATA3, 0x4007040c
.set CYREG_SCB2_EZ_DATA4, 0x40070410
.set CYREG_SCB2_EZ_DATA5, 0x40070414
.set CYREG_SCB2_EZ_DATA6, 0x40070418
.set CYREG_SCB2_EZ_DATA7, 0x4007041c
.set CYREG_SCB2_EZ_DATA8, 0x40070420
.set CYREG_SCB2_EZ_DATA9, 0x40070424
.set CYREG_SCB2_EZ_DATA10, 0x40070428
.set CYREG_SCB2_EZ_DATA11, 0x4007042c
.set CYREG_SCB2_EZ_DATA12, 0x40070430
.set CYREG_SCB2_EZ_DATA13, 0x40070434
.set CYREG_SCB2_EZ_DATA14, 0x40070438
.set CYREG_SCB2_EZ_DATA15, 0x4007043c
.set CYREG_SCB2_EZ_DATA16, 0x40070440
.set CYREG_SCB2_EZ_DATA17, 0x40070444
.set CYREG_SCB2_EZ_DATA18, 0x40070448
.set CYREG_SCB2_EZ_DATA19, 0x4007044c
.set CYREG_SCB2_EZ_DATA20, 0x40070450
.set CYREG_SCB2_EZ_DATA21, 0x40070454
.set CYREG_SCB2_EZ_DATA22, 0x40070458
.set CYREG_SCB2_EZ_DATA23, 0x4007045c
.set CYREG_SCB2_EZ_DATA24, 0x40070460
.set CYREG_SCB2_EZ_DATA25, 0x40070464
.set CYREG_SCB2_EZ_DATA26, 0x40070468
.set CYREG_SCB2_EZ_DATA27, 0x4007046c
.set CYREG_SCB2_EZ_DATA28, 0x40070470
.set CYREG_SCB2_EZ_DATA29, 0x40070474
.set CYREG_SCB2_EZ_DATA30, 0x40070478
.set CYREG_SCB2_EZ_DATA31, 0x4007047c
.set CYREG_SCB2_EZ_DATA32, 0x40070480
.set CYREG_SCB2_EZ_DATA33, 0x40070484
.set CYREG_SCB2_EZ_DATA34, 0x40070488
.set CYREG_SCB2_EZ_DATA35, 0x4007048c
.set CYREG_SCB2_EZ_DATA36, 0x40070490
.set CYREG_SCB2_EZ_DATA37, 0x40070494
.set CYREG_SCB2_EZ_DATA38, 0x40070498
.set CYREG_SCB2_EZ_DATA39, 0x4007049c
.set CYREG_SCB2_EZ_DATA40, 0x400704a0
.set CYREG_SCB2_EZ_DATA41, 0x400704a4
.set CYREG_SCB2_EZ_DATA42, 0x400704a8
.set CYREG_SCB2_EZ_DATA43, 0x400704ac
.set CYREG_SCB2_EZ_DATA44, 0x400704b0
.set CYREG_SCB2_EZ_DATA45, 0x400704b4
.set CYREG_SCB2_EZ_DATA46, 0x400704b8
.set CYREG_SCB2_EZ_DATA47, 0x400704bc
.set CYREG_SCB2_EZ_DATA48, 0x400704c0
.set CYREG_SCB2_EZ_DATA49, 0x400704c4
.set CYREG_SCB2_EZ_DATA50, 0x400704c8
.set CYREG_SCB2_EZ_DATA51, 0x400704cc
.set CYREG_SCB2_EZ_DATA52, 0x400704d0
.set CYREG_SCB2_EZ_DATA53, 0x400704d4
.set CYREG_SCB2_EZ_DATA54, 0x400704d8
.set CYREG_SCB2_EZ_DATA55, 0x400704dc
.set CYREG_SCB2_EZ_DATA56, 0x400704e0
.set CYREG_SCB2_EZ_DATA57, 0x400704e4
.set CYREG_SCB2_EZ_DATA58, 0x400704e8
.set CYREG_SCB2_EZ_DATA59, 0x400704ec
.set CYREG_SCB2_EZ_DATA60, 0x400704f0
.set CYREG_SCB2_EZ_DATA61, 0x400704f4
.set CYREG_SCB2_EZ_DATA62, 0x400704f8
.set CYREG_SCB2_EZ_DATA63, 0x400704fc
.set CYREG_SCB2_EZ_DATA64, 0x40070500
.set CYREG_SCB2_EZ_DATA65, 0x40070504
.set CYREG_SCB2_EZ_DATA66, 0x40070508
.set CYREG_SCB2_EZ_DATA67, 0x4007050c
.set CYREG_SCB2_EZ_DATA68, 0x40070510
.set CYREG_SCB2_EZ_DATA69, 0x40070514
.set CYREG_SCB2_EZ_DATA70, 0x40070518
.set CYREG_SCB2_EZ_DATA71, 0x4007051c
.set CYREG_SCB2_EZ_DATA72, 0x40070520
.set CYREG_SCB2_EZ_DATA73, 0x40070524
.set CYREG_SCB2_EZ_DATA74, 0x40070528
.set CYREG_SCB2_EZ_DATA75, 0x4007052c
.set CYREG_SCB2_EZ_DATA76, 0x40070530
.set CYREG_SCB2_EZ_DATA77, 0x40070534
.set CYREG_SCB2_EZ_DATA78, 0x40070538
.set CYREG_SCB2_EZ_DATA79, 0x4007053c
.set CYREG_SCB2_EZ_DATA80, 0x40070540
.set CYREG_SCB2_EZ_DATA81, 0x40070544
.set CYREG_SCB2_EZ_DATA82, 0x40070548
.set CYREG_SCB2_EZ_DATA83, 0x4007054c
.set CYREG_SCB2_EZ_DATA84, 0x40070550
.set CYREG_SCB2_EZ_DATA85, 0x40070554
.set CYREG_SCB2_EZ_DATA86, 0x40070558
.set CYREG_SCB2_EZ_DATA87, 0x4007055c
.set CYREG_SCB2_EZ_DATA88, 0x40070560
.set CYREG_SCB2_EZ_DATA89, 0x40070564
.set CYREG_SCB2_EZ_DATA90, 0x40070568
.set CYREG_SCB2_EZ_DATA91, 0x4007056c
.set CYREG_SCB2_EZ_DATA92, 0x40070570
.set CYREG_SCB2_EZ_DATA93, 0x40070574
.set CYREG_SCB2_EZ_DATA94, 0x40070578
.set CYREG_SCB2_EZ_DATA95, 0x4007057c
.set CYREG_SCB2_EZ_DATA96, 0x40070580
.set CYREG_SCB2_EZ_DATA97, 0x40070584
.set CYREG_SCB2_EZ_DATA98, 0x40070588
.set CYREG_SCB2_EZ_DATA99, 0x4007058c
.set CYREG_SCB2_EZ_DATA100, 0x40070590
.set CYREG_SCB2_EZ_DATA101, 0x40070594
.set CYREG_SCB2_EZ_DATA102, 0x40070598
.set CYREG_SCB2_EZ_DATA103, 0x4007059c
.set CYREG_SCB2_EZ_DATA104, 0x400705a0
.set CYREG_SCB2_EZ_DATA105, 0x400705a4
.set CYREG_SCB2_EZ_DATA106, 0x400705a8
.set CYREG_SCB2_EZ_DATA107, 0x400705ac
.set CYREG_SCB2_EZ_DATA108, 0x400705b0
.set CYREG_SCB2_EZ_DATA109, 0x400705b4
.set CYREG_SCB2_EZ_DATA110, 0x400705b8
.set CYREG_SCB2_EZ_DATA111, 0x400705bc
.set CYREG_SCB2_EZ_DATA112, 0x400705c0
.set CYREG_SCB2_EZ_DATA113, 0x400705c4
.set CYREG_SCB2_EZ_DATA114, 0x400705c8
.set CYREG_SCB2_EZ_DATA115, 0x400705cc
.set CYREG_SCB2_EZ_DATA116, 0x400705d0
.set CYREG_SCB2_EZ_DATA117, 0x400705d4
.set CYREG_SCB2_EZ_DATA118, 0x400705d8
.set CYREG_SCB2_EZ_DATA119, 0x400705dc
.set CYREG_SCB2_EZ_DATA120, 0x400705e0
.set CYREG_SCB2_EZ_DATA121, 0x400705e4
.set CYREG_SCB2_EZ_DATA122, 0x400705e8
.set CYREG_SCB2_EZ_DATA123, 0x400705ec
.set CYREG_SCB2_EZ_DATA124, 0x400705f0
.set CYREG_SCB2_EZ_DATA125, 0x400705f4
.set CYREG_SCB2_EZ_DATA126, 0x400705f8
.set CYREG_SCB2_EZ_DATA127, 0x400705fc
.set CYREG_SCB2_EZ_DATA128, 0x40070600
.set CYREG_SCB2_EZ_DATA129, 0x40070604
.set CYREG_SCB2_EZ_DATA130, 0x40070608
.set CYREG_SCB2_EZ_DATA131, 0x4007060c
.set CYREG_SCB2_EZ_DATA132, 0x40070610
.set CYREG_SCB2_EZ_DATA133, 0x40070614
.set CYREG_SCB2_EZ_DATA134, 0x40070618
.set CYREG_SCB2_EZ_DATA135, 0x4007061c
.set CYREG_SCB2_EZ_DATA136, 0x40070620
.set CYREG_SCB2_EZ_DATA137, 0x40070624
.set CYREG_SCB2_EZ_DATA138, 0x40070628
.set CYREG_SCB2_EZ_DATA139, 0x4007062c
.set CYREG_SCB2_EZ_DATA140, 0x40070630
.set CYREG_SCB2_EZ_DATA141, 0x40070634
.set CYREG_SCB2_EZ_DATA142, 0x40070638
.set CYREG_SCB2_EZ_DATA143, 0x4007063c
.set CYREG_SCB2_EZ_DATA144, 0x40070640
.set CYREG_SCB2_EZ_DATA145, 0x40070644
.set CYREG_SCB2_EZ_DATA146, 0x40070648
.set CYREG_SCB2_EZ_DATA147, 0x4007064c
.set CYREG_SCB2_EZ_DATA148, 0x40070650
.set CYREG_SCB2_EZ_DATA149, 0x40070654
.set CYREG_SCB2_EZ_DATA150, 0x40070658
.set CYREG_SCB2_EZ_DATA151, 0x4007065c
.set CYREG_SCB2_EZ_DATA152, 0x40070660
.set CYREG_SCB2_EZ_DATA153, 0x40070664
.set CYREG_SCB2_EZ_DATA154, 0x40070668
.set CYREG_SCB2_EZ_DATA155, 0x4007066c
.set CYREG_SCB2_EZ_DATA156, 0x40070670
.set CYREG_SCB2_EZ_DATA157, 0x40070674
.set CYREG_SCB2_EZ_DATA158, 0x40070678
.set CYREG_SCB2_EZ_DATA159, 0x4007067c
.set CYREG_SCB2_EZ_DATA160, 0x40070680
.set CYREG_SCB2_EZ_DATA161, 0x40070684
.set CYREG_SCB2_EZ_DATA162, 0x40070688
.set CYREG_SCB2_EZ_DATA163, 0x4007068c
.set CYREG_SCB2_EZ_DATA164, 0x40070690
.set CYREG_SCB2_EZ_DATA165, 0x40070694
.set CYREG_SCB2_EZ_DATA166, 0x40070698
.set CYREG_SCB2_EZ_DATA167, 0x4007069c
.set CYREG_SCB2_EZ_DATA168, 0x400706a0
.set CYREG_SCB2_EZ_DATA169, 0x400706a4
.set CYREG_SCB2_EZ_DATA170, 0x400706a8
.set CYREG_SCB2_EZ_DATA171, 0x400706ac
.set CYREG_SCB2_EZ_DATA172, 0x400706b0
.set CYREG_SCB2_EZ_DATA173, 0x400706b4
.set CYREG_SCB2_EZ_DATA174, 0x400706b8
.set CYREG_SCB2_EZ_DATA175, 0x400706bc
.set CYREG_SCB2_EZ_DATA176, 0x400706c0
.set CYREG_SCB2_EZ_DATA177, 0x400706c4
.set CYREG_SCB2_EZ_DATA178, 0x400706c8
.set CYREG_SCB2_EZ_DATA179, 0x400706cc
.set CYREG_SCB2_EZ_DATA180, 0x400706d0
.set CYREG_SCB2_EZ_DATA181, 0x400706d4
.set CYREG_SCB2_EZ_DATA182, 0x400706d8
.set CYREG_SCB2_EZ_DATA183, 0x400706dc
.set CYREG_SCB2_EZ_DATA184, 0x400706e0
.set CYREG_SCB2_EZ_DATA185, 0x400706e4
.set CYREG_SCB2_EZ_DATA186, 0x400706e8
.set CYREG_SCB2_EZ_DATA187, 0x400706ec
.set CYREG_SCB2_EZ_DATA188, 0x400706f0
.set CYREG_SCB2_EZ_DATA189, 0x400706f4
.set CYREG_SCB2_EZ_DATA190, 0x400706f8
.set CYREG_SCB2_EZ_DATA191, 0x400706fc
.set CYREG_SCB2_EZ_DATA192, 0x40070700
.set CYREG_SCB2_EZ_DATA193, 0x40070704
.set CYREG_SCB2_EZ_DATA194, 0x40070708
.set CYREG_SCB2_EZ_DATA195, 0x4007070c
.set CYREG_SCB2_EZ_DATA196, 0x40070710
.set CYREG_SCB2_EZ_DATA197, 0x40070714
.set CYREG_SCB2_EZ_DATA198, 0x40070718
.set CYREG_SCB2_EZ_DATA199, 0x4007071c
.set CYREG_SCB2_EZ_DATA200, 0x40070720
.set CYREG_SCB2_EZ_DATA201, 0x40070724
.set CYREG_SCB2_EZ_DATA202, 0x40070728
.set CYREG_SCB2_EZ_DATA203, 0x4007072c
.set CYREG_SCB2_EZ_DATA204, 0x40070730
.set CYREG_SCB2_EZ_DATA205, 0x40070734
.set CYREG_SCB2_EZ_DATA206, 0x40070738
.set CYREG_SCB2_EZ_DATA207, 0x4007073c
.set CYREG_SCB2_EZ_DATA208, 0x40070740
.set CYREG_SCB2_EZ_DATA209, 0x40070744
.set CYREG_SCB2_EZ_DATA210, 0x40070748
.set CYREG_SCB2_EZ_DATA211, 0x4007074c
.set CYREG_SCB2_EZ_DATA212, 0x40070750
.set CYREG_SCB2_EZ_DATA213, 0x40070754
.set CYREG_SCB2_EZ_DATA214, 0x40070758
.set CYREG_SCB2_EZ_DATA215, 0x4007075c
.set CYREG_SCB2_EZ_DATA216, 0x40070760
.set CYREG_SCB2_EZ_DATA217, 0x40070764
.set CYREG_SCB2_EZ_DATA218, 0x40070768
.set CYREG_SCB2_EZ_DATA219, 0x4007076c
.set CYREG_SCB2_EZ_DATA220, 0x40070770
.set CYREG_SCB2_EZ_DATA221, 0x40070774
.set CYREG_SCB2_EZ_DATA222, 0x40070778
.set CYREG_SCB2_EZ_DATA223, 0x4007077c
.set CYREG_SCB2_EZ_DATA224, 0x40070780
.set CYREG_SCB2_EZ_DATA225, 0x40070784
.set CYREG_SCB2_EZ_DATA226, 0x40070788
.set CYREG_SCB2_EZ_DATA227, 0x4007078c
.set CYREG_SCB2_EZ_DATA228, 0x40070790
.set CYREG_SCB2_EZ_DATA229, 0x40070794
.set CYREG_SCB2_EZ_DATA230, 0x40070798
.set CYREG_SCB2_EZ_DATA231, 0x4007079c
.set CYREG_SCB2_EZ_DATA232, 0x400707a0
.set CYREG_SCB2_EZ_DATA233, 0x400707a4
.set CYREG_SCB2_EZ_DATA234, 0x400707a8
.set CYREG_SCB2_EZ_DATA235, 0x400707ac
.set CYREG_SCB2_EZ_DATA236, 0x400707b0
.set CYREG_SCB2_EZ_DATA237, 0x400707b4
.set CYREG_SCB2_EZ_DATA238, 0x400707b8
.set CYREG_SCB2_EZ_DATA239, 0x400707bc
.set CYREG_SCB2_EZ_DATA240, 0x400707c0
.set CYREG_SCB2_EZ_DATA241, 0x400707c4
.set CYREG_SCB2_EZ_DATA242, 0x400707c8
.set CYREG_SCB2_EZ_DATA243, 0x400707cc
.set CYREG_SCB2_EZ_DATA244, 0x400707d0
.set CYREG_SCB2_EZ_DATA245, 0x400707d4
.set CYREG_SCB2_EZ_DATA246, 0x400707d8
.set CYREG_SCB2_EZ_DATA247, 0x400707dc
.set CYREG_SCB2_EZ_DATA248, 0x400707e0
.set CYREG_SCB2_EZ_DATA249, 0x400707e4
.set CYREG_SCB2_EZ_DATA250, 0x400707e8
.set CYREG_SCB2_EZ_DATA251, 0x400707ec
.set CYREG_SCB2_EZ_DATA252, 0x400707f0
.set CYREG_SCB2_EZ_DATA253, 0x400707f4
.set CYREG_SCB2_EZ_DATA254, 0x400707f8
.set CYREG_SCB2_EZ_DATA255, 0x400707fc
.set CYREG_SCB2_INTR_CAUSE, 0x40070e00
.set CYREG_SCB2_INTR_I2C_EC, 0x40070e80
.set CYREG_SCB2_INTR_I2C_EC_MASK, 0x40070e88
.set CYREG_SCB2_INTR_I2C_EC_MASKED, 0x40070e8c
.set CYREG_SCB2_INTR_SPI_EC, 0x40070ec0
.set CYREG_SCB2_INTR_SPI_EC_MASK, 0x40070ec8
.set CYREG_SCB2_INTR_SPI_EC_MASKED, 0x40070ecc
.set CYREG_SCB2_INTR_M, 0x40070f00
.set CYREG_SCB2_INTR_M_SET, 0x40070f04
.set CYREG_SCB2_INTR_M_MASK, 0x40070f08
.set CYREG_SCB2_INTR_M_MASKED, 0x40070f0c
.set CYREG_SCB2_INTR_S, 0x40070f40
.set CYREG_SCB2_INTR_S_SET, 0x40070f44
.set CYREG_SCB2_INTR_S_MASK, 0x40070f48
.set CYREG_SCB2_INTR_S_MASKED, 0x40070f4c
.set CYREG_SCB2_INTR_TX, 0x40070f80
.set CYREG_SCB2_INTR_TX_SET, 0x40070f84
.set CYREG_SCB2_INTR_TX_MASK, 0x40070f88
.set CYREG_SCB2_INTR_TX_MASKED, 0x40070f8c
.set CYREG_SCB2_INTR_RX, 0x40070fc0
.set CYREG_SCB2_INTR_RX_SET, 0x40070fc4
.set CYREG_SCB2_INTR_RX_MASK, 0x40070fc8
.set CYREG_SCB2_INTR_RX_MASKED, 0x40070fcc
.set CYDEV_SCB3_BASE, 0x40080000
.set CYDEV_SCB3_SIZE, 0x00010000
.set CYREG_SCB3_CTRL, 0x40080000
.set CYREG_SCB3_STATUS, 0x40080004
.set CYREG_SCB3_CMD_RESP_CTRL, 0x40080008
.set CYREG_SCB3_CMD_RESP_STATUS, 0x4008000c
.set CYREG_SCB3_SPI_CTRL, 0x40080020
.set CYREG_SCB3_SPI_STATUS, 0x40080024
.set CYREG_SCB3_UART_CTRL, 0x40080040
.set CYREG_SCB3_UART_TX_CTRL, 0x40080044
.set CYREG_SCB3_UART_RX_CTRL, 0x40080048
.set CYREG_SCB3_UART_RX_STATUS, 0x4008004c
.set CYREG_SCB3_UART_FLOW_CTRL, 0x40080050
.set CYREG_SCB3_I2C_CTRL, 0x40080060
.set CYREG_SCB3_I2C_STATUS, 0x40080064
.set CYREG_SCB3_I2C_M_CMD, 0x40080068
.set CYREG_SCB3_I2C_S_CMD, 0x4008006c
.set CYREG_SCB3_I2C_CFG, 0x40080070
.set CYREG_SCB3_TX_CTRL, 0x40080200
.set CYREG_SCB3_TX_FIFO_CTRL, 0x40080204
.set CYREG_SCB3_TX_FIFO_STATUS, 0x40080208
.set CYREG_SCB3_TX_FIFO_WR, 0x40080240
.set CYREG_SCB3_RX_CTRL, 0x40080300
.set CYREG_SCB3_RX_FIFO_CTRL, 0x40080304
.set CYREG_SCB3_RX_FIFO_STATUS, 0x40080308
.set CYREG_SCB3_RX_MATCH, 0x40080310
.set CYREG_SCB3_RX_FIFO_RD, 0x40080340
.set CYREG_SCB3_RX_FIFO_RD_SILENT, 0x40080344
.set CYREG_SCB3_EZ_DATA0, 0x40080400
.set CYREG_SCB3_EZ_DATA1, 0x40080404
.set CYREG_SCB3_EZ_DATA2, 0x40080408
.set CYREG_SCB3_EZ_DATA3, 0x4008040c
.set CYREG_SCB3_EZ_DATA4, 0x40080410
.set CYREG_SCB3_EZ_DATA5, 0x40080414
.set CYREG_SCB3_EZ_DATA6, 0x40080418
.set CYREG_SCB3_EZ_DATA7, 0x4008041c
.set CYREG_SCB3_EZ_DATA8, 0x40080420
.set CYREG_SCB3_EZ_DATA9, 0x40080424
.set CYREG_SCB3_EZ_DATA10, 0x40080428
.set CYREG_SCB3_EZ_DATA11, 0x4008042c
.set CYREG_SCB3_EZ_DATA12, 0x40080430
.set CYREG_SCB3_EZ_DATA13, 0x40080434
.set CYREG_SCB3_EZ_DATA14, 0x40080438
.set CYREG_SCB3_EZ_DATA15, 0x4008043c
.set CYREG_SCB3_EZ_DATA16, 0x40080440
.set CYREG_SCB3_EZ_DATA17, 0x40080444
.set CYREG_SCB3_EZ_DATA18, 0x40080448
.set CYREG_SCB3_EZ_DATA19, 0x4008044c
.set CYREG_SCB3_EZ_DATA20, 0x40080450
.set CYREG_SCB3_EZ_DATA21, 0x40080454
.set CYREG_SCB3_EZ_DATA22, 0x40080458
.set CYREG_SCB3_EZ_DATA23, 0x4008045c
.set CYREG_SCB3_EZ_DATA24, 0x40080460
.set CYREG_SCB3_EZ_DATA25, 0x40080464
.set CYREG_SCB3_EZ_DATA26, 0x40080468
.set CYREG_SCB3_EZ_DATA27, 0x4008046c
.set CYREG_SCB3_EZ_DATA28, 0x40080470
.set CYREG_SCB3_EZ_DATA29, 0x40080474
.set CYREG_SCB3_EZ_DATA30, 0x40080478
.set CYREG_SCB3_EZ_DATA31, 0x4008047c
.set CYREG_SCB3_EZ_DATA32, 0x40080480
.set CYREG_SCB3_EZ_DATA33, 0x40080484
.set CYREG_SCB3_EZ_DATA34, 0x40080488
.set CYREG_SCB3_EZ_DATA35, 0x4008048c
.set CYREG_SCB3_EZ_DATA36, 0x40080490
.set CYREG_SCB3_EZ_DATA37, 0x40080494
.set CYREG_SCB3_EZ_DATA38, 0x40080498
.set CYREG_SCB3_EZ_DATA39, 0x4008049c
.set CYREG_SCB3_EZ_DATA40, 0x400804a0
.set CYREG_SCB3_EZ_DATA41, 0x400804a4
.set CYREG_SCB3_EZ_DATA42, 0x400804a8
.set CYREG_SCB3_EZ_DATA43, 0x400804ac
.set CYREG_SCB3_EZ_DATA44, 0x400804b0
.set CYREG_SCB3_EZ_DATA45, 0x400804b4
.set CYREG_SCB3_EZ_DATA46, 0x400804b8
.set CYREG_SCB3_EZ_DATA47, 0x400804bc
.set CYREG_SCB3_EZ_DATA48, 0x400804c0
.set CYREG_SCB3_EZ_DATA49, 0x400804c4
.set CYREG_SCB3_EZ_DATA50, 0x400804c8
.set CYREG_SCB3_EZ_DATA51, 0x400804cc
.set CYREG_SCB3_EZ_DATA52, 0x400804d0
.set CYREG_SCB3_EZ_DATA53, 0x400804d4
.set CYREG_SCB3_EZ_DATA54, 0x400804d8
.set CYREG_SCB3_EZ_DATA55, 0x400804dc
.set CYREG_SCB3_EZ_DATA56, 0x400804e0
.set CYREG_SCB3_EZ_DATA57, 0x400804e4
.set CYREG_SCB3_EZ_DATA58, 0x400804e8
.set CYREG_SCB3_EZ_DATA59, 0x400804ec
.set CYREG_SCB3_EZ_DATA60, 0x400804f0
.set CYREG_SCB3_EZ_DATA61, 0x400804f4
.set CYREG_SCB3_EZ_DATA62, 0x400804f8
.set CYREG_SCB3_EZ_DATA63, 0x400804fc
.set CYREG_SCB3_EZ_DATA64, 0x40080500
.set CYREG_SCB3_EZ_DATA65, 0x40080504
.set CYREG_SCB3_EZ_DATA66, 0x40080508
.set CYREG_SCB3_EZ_DATA67, 0x4008050c
.set CYREG_SCB3_EZ_DATA68, 0x40080510
.set CYREG_SCB3_EZ_DATA69, 0x40080514
.set CYREG_SCB3_EZ_DATA70, 0x40080518
.set CYREG_SCB3_EZ_DATA71, 0x4008051c
.set CYREG_SCB3_EZ_DATA72, 0x40080520
.set CYREG_SCB3_EZ_DATA73, 0x40080524
.set CYREG_SCB3_EZ_DATA74, 0x40080528
.set CYREG_SCB3_EZ_DATA75, 0x4008052c
.set CYREG_SCB3_EZ_DATA76, 0x40080530
.set CYREG_SCB3_EZ_DATA77, 0x40080534
.set CYREG_SCB3_EZ_DATA78, 0x40080538
.set CYREG_SCB3_EZ_DATA79, 0x4008053c
.set CYREG_SCB3_EZ_DATA80, 0x40080540
.set CYREG_SCB3_EZ_DATA81, 0x40080544
.set CYREG_SCB3_EZ_DATA82, 0x40080548
.set CYREG_SCB3_EZ_DATA83, 0x4008054c
.set CYREG_SCB3_EZ_DATA84, 0x40080550
.set CYREG_SCB3_EZ_DATA85, 0x40080554
.set CYREG_SCB3_EZ_DATA86, 0x40080558
.set CYREG_SCB3_EZ_DATA87, 0x4008055c
.set CYREG_SCB3_EZ_DATA88, 0x40080560
.set CYREG_SCB3_EZ_DATA89, 0x40080564
.set CYREG_SCB3_EZ_DATA90, 0x40080568
.set CYREG_SCB3_EZ_DATA91, 0x4008056c
.set CYREG_SCB3_EZ_DATA92, 0x40080570
.set CYREG_SCB3_EZ_DATA93, 0x40080574
.set CYREG_SCB3_EZ_DATA94, 0x40080578
.set CYREG_SCB3_EZ_DATA95, 0x4008057c
.set CYREG_SCB3_EZ_DATA96, 0x40080580
.set CYREG_SCB3_EZ_DATA97, 0x40080584
.set CYREG_SCB3_EZ_DATA98, 0x40080588
.set CYREG_SCB3_EZ_DATA99, 0x4008058c
.set CYREG_SCB3_EZ_DATA100, 0x40080590
.set CYREG_SCB3_EZ_DATA101, 0x40080594
.set CYREG_SCB3_EZ_DATA102, 0x40080598
.set CYREG_SCB3_EZ_DATA103, 0x4008059c
.set CYREG_SCB3_EZ_DATA104, 0x400805a0
.set CYREG_SCB3_EZ_DATA105, 0x400805a4
.set CYREG_SCB3_EZ_DATA106, 0x400805a8
.set CYREG_SCB3_EZ_DATA107, 0x400805ac
.set CYREG_SCB3_EZ_DATA108, 0x400805b0
.set CYREG_SCB3_EZ_DATA109, 0x400805b4
.set CYREG_SCB3_EZ_DATA110, 0x400805b8
.set CYREG_SCB3_EZ_DATA111, 0x400805bc
.set CYREG_SCB3_EZ_DATA112, 0x400805c0
.set CYREG_SCB3_EZ_DATA113, 0x400805c4
.set CYREG_SCB3_EZ_DATA114, 0x400805c8
.set CYREG_SCB3_EZ_DATA115, 0x400805cc
.set CYREG_SCB3_EZ_DATA116, 0x400805d0
.set CYREG_SCB3_EZ_DATA117, 0x400805d4
.set CYREG_SCB3_EZ_DATA118, 0x400805d8
.set CYREG_SCB3_EZ_DATA119, 0x400805dc
.set CYREG_SCB3_EZ_DATA120, 0x400805e0
.set CYREG_SCB3_EZ_DATA121, 0x400805e4
.set CYREG_SCB3_EZ_DATA122, 0x400805e8
.set CYREG_SCB3_EZ_DATA123, 0x400805ec
.set CYREG_SCB3_EZ_DATA124, 0x400805f0
.set CYREG_SCB3_EZ_DATA125, 0x400805f4
.set CYREG_SCB3_EZ_DATA126, 0x400805f8
.set CYREG_SCB3_EZ_DATA127, 0x400805fc
.set CYREG_SCB3_EZ_DATA128, 0x40080600
.set CYREG_SCB3_EZ_DATA129, 0x40080604
.set CYREG_SCB3_EZ_DATA130, 0x40080608
.set CYREG_SCB3_EZ_DATA131, 0x4008060c
.set CYREG_SCB3_EZ_DATA132, 0x40080610
.set CYREG_SCB3_EZ_DATA133, 0x40080614
.set CYREG_SCB3_EZ_DATA134, 0x40080618
.set CYREG_SCB3_EZ_DATA135, 0x4008061c
.set CYREG_SCB3_EZ_DATA136, 0x40080620
.set CYREG_SCB3_EZ_DATA137, 0x40080624
.set CYREG_SCB3_EZ_DATA138, 0x40080628
.set CYREG_SCB3_EZ_DATA139, 0x4008062c
.set CYREG_SCB3_EZ_DATA140, 0x40080630
.set CYREG_SCB3_EZ_DATA141, 0x40080634
.set CYREG_SCB3_EZ_DATA142, 0x40080638
.set CYREG_SCB3_EZ_DATA143, 0x4008063c
.set CYREG_SCB3_EZ_DATA144, 0x40080640
.set CYREG_SCB3_EZ_DATA145, 0x40080644
.set CYREG_SCB3_EZ_DATA146, 0x40080648
.set CYREG_SCB3_EZ_DATA147, 0x4008064c
.set CYREG_SCB3_EZ_DATA148, 0x40080650
.set CYREG_SCB3_EZ_DATA149, 0x40080654
.set CYREG_SCB3_EZ_DATA150, 0x40080658
.set CYREG_SCB3_EZ_DATA151, 0x4008065c
.set CYREG_SCB3_EZ_DATA152, 0x40080660
.set CYREG_SCB3_EZ_DATA153, 0x40080664
.set CYREG_SCB3_EZ_DATA154, 0x40080668
.set CYREG_SCB3_EZ_DATA155, 0x4008066c
.set CYREG_SCB3_EZ_DATA156, 0x40080670
.set CYREG_SCB3_EZ_DATA157, 0x40080674
.set CYREG_SCB3_EZ_DATA158, 0x40080678
.set CYREG_SCB3_EZ_DATA159, 0x4008067c
.set CYREG_SCB3_EZ_DATA160, 0x40080680
.set CYREG_SCB3_EZ_DATA161, 0x40080684
.set CYREG_SCB3_EZ_DATA162, 0x40080688
.set CYREG_SCB3_EZ_DATA163, 0x4008068c
.set CYREG_SCB3_EZ_DATA164, 0x40080690
.set CYREG_SCB3_EZ_DATA165, 0x40080694
.set CYREG_SCB3_EZ_DATA166, 0x40080698
.set CYREG_SCB3_EZ_DATA167, 0x4008069c
.set CYREG_SCB3_EZ_DATA168, 0x400806a0
.set CYREG_SCB3_EZ_DATA169, 0x400806a4
.set CYREG_SCB3_EZ_DATA170, 0x400806a8
.set CYREG_SCB3_EZ_DATA171, 0x400806ac
.set CYREG_SCB3_EZ_DATA172, 0x400806b0
.set CYREG_SCB3_EZ_DATA173, 0x400806b4
.set CYREG_SCB3_EZ_DATA174, 0x400806b8
.set CYREG_SCB3_EZ_DATA175, 0x400806bc
.set CYREG_SCB3_EZ_DATA176, 0x400806c0
.set CYREG_SCB3_EZ_DATA177, 0x400806c4
.set CYREG_SCB3_EZ_DATA178, 0x400806c8
.set CYREG_SCB3_EZ_DATA179, 0x400806cc
.set CYREG_SCB3_EZ_DATA180, 0x400806d0
.set CYREG_SCB3_EZ_DATA181, 0x400806d4
.set CYREG_SCB3_EZ_DATA182, 0x400806d8
.set CYREG_SCB3_EZ_DATA183, 0x400806dc
.set CYREG_SCB3_EZ_DATA184, 0x400806e0
.set CYREG_SCB3_EZ_DATA185, 0x400806e4
.set CYREG_SCB3_EZ_DATA186, 0x400806e8
.set CYREG_SCB3_EZ_DATA187, 0x400806ec
.set CYREG_SCB3_EZ_DATA188, 0x400806f0
.set CYREG_SCB3_EZ_DATA189, 0x400806f4
.set CYREG_SCB3_EZ_DATA190, 0x400806f8
.set CYREG_SCB3_EZ_DATA191, 0x400806fc
.set CYREG_SCB3_EZ_DATA192, 0x40080700
.set CYREG_SCB3_EZ_DATA193, 0x40080704
.set CYREG_SCB3_EZ_DATA194, 0x40080708
.set CYREG_SCB3_EZ_DATA195, 0x4008070c
.set CYREG_SCB3_EZ_DATA196, 0x40080710
.set CYREG_SCB3_EZ_DATA197, 0x40080714
.set CYREG_SCB3_EZ_DATA198, 0x40080718
.set CYREG_SCB3_EZ_DATA199, 0x4008071c
.set CYREG_SCB3_EZ_DATA200, 0x40080720
.set CYREG_SCB3_EZ_DATA201, 0x40080724
.set CYREG_SCB3_EZ_DATA202, 0x40080728
.set CYREG_SCB3_EZ_DATA203, 0x4008072c
.set CYREG_SCB3_EZ_DATA204, 0x40080730
.set CYREG_SCB3_EZ_DATA205, 0x40080734
.set CYREG_SCB3_EZ_DATA206, 0x40080738
.set CYREG_SCB3_EZ_DATA207, 0x4008073c
.set CYREG_SCB3_EZ_DATA208, 0x40080740
.set CYREG_SCB3_EZ_DATA209, 0x40080744
.set CYREG_SCB3_EZ_DATA210, 0x40080748
.set CYREG_SCB3_EZ_DATA211, 0x4008074c
.set CYREG_SCB3_EZ_DATA212, 0x40080750
.set CYREG_SCB3_EZ_DATA213, 0x40080754
.set CYREG_SCB3_EZ_DATA214, 0x40080758
.set CYREG_SCB3_EZ_DATA215, 0x4008075c
.set CYREG_SCB3_EZ_DATA216, 0x40080760
.set CYREG_SCB3_EZ_DATA217, 0x40080764
.set CYREG_SCB3_EZ_DATA218, 0x40080768
.set CYREG_SCB3_EZ_DATA219, 0x4008076c
.set CYREG_SCB3_EZ_DATA220, 0x40080770
.set CYREG_SCB3_EZ_DATA221, 0x40080774
.set CYREG_SCB3_EZ_DATA222, 0x40080778
.set CYREG_SCB3_EZ_DATA223, 0x4008077c
.set CYREG_SCB3_EZ_DATA224, 0x40080780
.set CYREG_SCB3_EZ_DATA225, 0x40080784
.set CYREG_SCB3_EZ_DATA226, 0x40080788
.set CYREG_SCB3_EZ_DATA227, 0x4008078c
.set CYREG_SCB3_EZ_DATA228, 0x40080790
.set CYREG_SCB3_EZ_DATA229, 0x40080794
.set CYREG_SCB3_EZ_DATA230, 0x40080798
.set CYREG_SCB3_EZ_DATA231, 0x4008079c
.set CYREG_SCB3_EZ_DATA232, 0x400807a0
.set CYREG_SCB3_EZ_DATA233, 0x400807a4
.set CYREG_SCB3_EZ_DATA234, 0x400807a8
.set CYREG_SCB3_EZ_DATA235, 0x400807ac
.set CYREG_SCB3_EZ_DATA236, 0x400807b0
.set CYREG_SCB3_EZ_DATA237, 0x400807b4
.set CYREG_SCB3_EZ_DATA238, 0x400807b8
.set CYREG_SCB3_EZ_DATA239, 0x400807bc
.set CYREG_SCB3_EZ_DATA240, 0x400807c0
.set CYREG_SCB3_EZ_DATA241, 0x400807c4
.set CYREG_SCB3_EZ_DATA242, 0x400807c8
.set CYREG_SCB3_EZ_DATA243, 0x400807cc
.set CYREG_SCB3_EZ_DATA244, 0x400807d0
.set CYREG_SCB3_EZ_DATA245, 0x400807d4
.set CYREG_SCB3_EZ_DATA246, 0x400807d8
.set CYREG_SCB3_EZ_DATA247, 0x400807dc
.set CYREG_SCB3_EZ_DATA248, 0x400807e0
.set CYREG_SCB3_EZ_DATA249, 0x400807e4
.set CYREG_SCB3_EZ_DATA250, 0x400807e8
.set CYREG_SCB3_EZ_DATA251, 0x400807ec
.set CYREG_SCB3_EZ_DATA252, 0x400807f0
.set CYREG_SCB3_EZ_DATA253, 0x400807f4
.set CYREG_SCB3_EZ_DATA254, 0x400807f8
.set CYREG_SCB3_EZ_DATA255, 0x400807fc
.set CYREG_SCB3_INTR_CAUSE, 0x40080e00
.set CYREG_SCB3_INTR_I2C_EC, 0x40080e80
.set CYREG_SCB3_INTR_I2C_EC_MASK, 0x40080e88
.set CYREG_SCB3_INTR_I2C_EC_MASKED, 0x40080e8c
.set CYREG_SCB3_INTR_SPI_EC, 0x40080ec0
.set CYREG_SCB3_INTR_SPI_EC_MASK, 0x40080ec8
.set CYREG_SCB3_INTR_SPI_EC_MASKED, 0x40080ecc
.set CYREG_SCB3_INTR_M, 0x40080f00
.set CYREG_SCB3_INTR_M_SET, 0x40080f04
.set CYREG_SCB3_INTR_M_MASK, 0x40080f08
.set CYREG_SCB3_INTR_M_MASKED, 0x40080f0c
.set CYREG_SCB3_INTR_S, 0x40080f40
.set CYREG_SCB3_INTR_S_SET, 0x40080f44
.set CYREG_SCB3_INTR_S_MASK, 0x40080f48
.set CYREG_SCB3_INTR_S_MASKED, 0x40080f4c
.set CYREG_SCB3_INTR_TX, 0x40080f80
.set CYREG_SCB3_INTR_TX_SET, 0x40080f84
.set CYREG_SCB3_INTR_TX_MASK, 0x40080f88
.set CYREG_SCB3_INTR_TX_MASKED, 0x40080f8c
.set CYREG_SCB3_INTR_RX, 0x40080fc0
.set CYREG_SCB3_INTR_RX_SET, 0x40080fc4
.set CYREG_SCB3_INTR_RX_MASK, 0x40080fc8
.set CYREG_SCB3_INTR_RX_MASKED, 0x40080fcc
.set CYDEV_TCPWM_BASE, 0x40090000
.set CYDEV_TCPWM_SIZE, 0x00010000
.set CYREG_TCPWM_CTRL, 0x40090000
.set CYFLD_TCPWM_COUNTER_ENABLED__OFFSET, 0x00000000
.set CYFLD_TCPWM_COUNTER_ENABLED__SIZE, 0x00000004
.set CYREG_TCPWM_CMD, 0x40090008
.set CYFLD_TCPWM_COUNTER_CAPTURE__OFFSET, 0x00000000
.set CYFLD_TCPWM_COUNTER_CAPTURE__SIZE, 0x00000004
.set CYFLD_TCPWM_COUNTER_RELOAD__OFFSET, 0x00000008
.set CYFLD_TCPWM_COUNTER_RELOAD__SIZE, 0x00000004
.set CYFLD_TCPWM_COUNTER_STOP__OFFSET, 0x00000010
.set CYFLD_TCPWM_COUNTER_STOP__SIZE, 0x00000004
.set CYFLD_TCPWM_COUNTER_START__OFFSET, 0x00000018
.set CYFLD_TCPWM_COUNTER_START__SIZE, 0x00000004
.set CYREG_TCPWM_INTR_CAUSE, 0x4009000c
.set CYFLD_TCPWM_COUNTER_INT__OFFSET, 0x00000000
.set CYFLD_TCPWM_COUNTER_INT__SIZE, 0x00000004
.set CYDEV_TCPWM_CNT0_BASE, 0x40090100
.set CYDEV_TCPWM_CNT0_SIZE, 0x00000040
.set CYREG_TCPWM_CNT0_CTRL, 0x40090100
.set CYFLD_TCPWM_CNT_AUTO_RELOAD_CC__OFFSET, 0x00000000
.set CYFLD_TCPWM_CNT_AUTO_RELOAD_CC__SIZE, 0x00000001
.set CYFLD_TCPWM_CNT_AUTO_RELOAD_PERIOD__OFFSET, 0x00000001
.set CYFLD_TCPWM_CNT_AUTO_RELOAD_PERIOD__SIZE, 0x00000001
.set CYFLD_TCPWM_CNT_PWM_SYNC_KILL__OFFSET, 0x00000002
.set CYFLD_TCPWM_CNT_PWM_SYNC_KILL__SIZE, 0x00000001
.set CYFLD_TCPWM_CNT_PWM_STOP_ON_KILL__OFFSET, 0x00000003
.set CYFLD_TCPWM_CNT_PWM_STOP_ON_KILL__SIZE, 0x00000001
.set CYFLD_TCPWM_CNT_GENERIC__OFFSET, 0x00000008
.set CYFLD_TCPWM_CNT_GENERIC__SIZE, 0x00000008
.set CYVAL_TCPWM_CNT_GENERIC_DIVBY1, 0x00000000
.set CYVAL_TCPWM_CNT_GENERIC_DIVBY2, 0x00000001
.set CYVAL_TCPWM_CNT_GENERIC_DIVBY4, 0x00000002
.set CYVAL_TCPWM_CNT_GENERIC_DIVBY8, 0x00000003
.set CYVAL_TCPWM_CNT_GENERIC_DIVBY16, 0x00000004
.set CYVAL_TCPWM_CNT_GENERIC_DIVBY32, 0x00000005
.set CYVAL_TCPWM_CNT_GENERIC_DIVBY64, 0x00000006
.set CYVAL_TCPWM_CNT_GENERIC_DIVBY128, 0x00000007
.set CYFLD_TCPWM_CNT_UP_DOWN_MODE__OFFSET, 0x00000010
.set CYFLD_TCPWM_CNT_UP_DOWN_MODE__SIZE, 0x00000002
.set CYVAL_TCPWM_CNT_UP_DOWN_MODE_COUNT_UP, 0x00000000
.set CYVAL_TCPWM_CNT_UP_DOWN_MODE_COUNT_DOWN, 0x00000001
.set CYVAL_TCPWM_CNT_UP_DOWN_MODE_COUNT_UPDN1, 0x00000002
.set CYVAL_TCPWM_CNT_UP_DOWN_MODE_COUNT_UPDN2, 0x00000003
.set CYFLD_TCPWM_CNT_ONE_SHOT__OFFSET, 0x00000012
.set CYFLD_TCPWM_CNT_ONE_SHOT__SIZE, 0x00000001
.set CYFLD_TCPWM_CNT_QUADRATURE_MODE__OFFSET, 0x00000014
.set CYFLD_TCPWM_CNT_QUADRATURE_MODE__SIZE, 0x00000002
.set CYVAL_TCPWM_CNT_QUADRATURE_MODE_X1, 0x00000000
.set CYVAL_TCPWM_CNT_QUADRATURE_MODE_X2, 0x00000001
.set CYVAL_TCPWM_CNT_QUADRATURE_MODE_X4, 0x00000002
.set CYVAL_TCPWM_CNT_QUADRATURE_MODE_INV_OUT, 0x00000001
.set CYVAL_TCPWM_CNT_QUADRATURE_MODE_INV_COMPL_OUT, 0x00000002
.set CYFLD_TCPWM_CNT_MODE__OFFSET, 0x00000018
.set CYFLD_TCPWM_CNT_MODE__SIZE, 0x00000003
.set CYVAL_TCPWM_CNT_MODE_TIMER, 0x00000000
.set CYVAL_TCPWM_CNT_MODE_CAPTURE, 0x00000002
.set CYVAL_TCPWM_CNT_MODE_QUAD, 0x00000003
.set CYVAL_TCPWM_CNT_MODE_PWM, 0x00000004
.set CYVAL_TCPWM_CNT_MODE_PWM_DT, 0x00000005
.set CYVAL_TCPWM_CNT_MODE_PWM_PR, 0x00000006
.set CYREG_TCPWM_CNT0_STATUS, 0x40090104
.set CYFLD_TCPWM_CNT_DOWN__OFFSET, 0x00000000
.set CYFLD_TCPWM_CNT_DOWN__SIZE, 0x00000001
.set CYFLD_TCPWM_CNT_RUNNING__OFFSET, 0x0000001f
.set CYFLD_TCPWM_CNT_RUNNING__SIZE, 0x00000001
.set CYREG_TCPWM_CNT0_COUNTER, 0x40090108
.set CYFLD_TCPWM_CNT_COUNTER__OFFSET, 0x00000000
.set CYFLD_TCPWM_CNT_COUNTER__SIZE, 0x00000010
.set CYREG_TCPWM_CNT0_CC, 0x4009010c
.set CYFLD_TCPWM_CNT_CC__OFFSET, 0x00000000
.set CYFLD_TCPWM_CNT_CC__SIZE, 0x00000010
.set CYREG_TCPWM_CNT0_CC_BUFF, 0x40090110
.set CYREG_TCPWM_CNT0_PERIOD, 0x40090114
.set CYFLD_TCPWM_CNT_PERIOD__OFFSET, 0x00000000
.set CYFLD_TCPWM_CNT_PERIOD__SIZE, 0x00000010
.set CYREG_TCPWM_CNT0_PERIOD_BUFF, 0x40090118
.set CYREG_TCPWM_CNT0_TR_CTRL0, 0x40090120
.set CYFLD_TCPWM_CNT_CAPTURE_SEL__OFFSET, 0x00000000
.set CYFLD_TCPWM_CNT_CAPTURE_SEL__SIZE, 0x00000004
.set CYFLD_TCPWM_CNT_COUNT_SEL__OFFSET, 0x00000004
.set CYFLD_TCPWM_CNT_COUNT_SEL__SIZE, 0x00000004
.set CYFLD_TCPWM_CNT_RELOAD_SEL__OFFSET, 0x00000008
.set CYFLD_TCPWM_CNT_RELOAD_SEL__SIZE, 0x00000004
.set CYFLD_TCPWM_CNT_STOP_SEL__OFFSET, 0x0000000c
.set CYFLD_TCPWM_CNT_STOP_SEL__SIZE, 0x00000004
.set CYFLD_TCPWM_CNT_START_SEL__OFFSET, 0x00000010
.set CYFLD_TCPWM_CNT_START_SEL__SIZE, 0x00000004
.set CYREG_TCPWM_CNT0_TR_CTRL1, 0x40090124
.set CYFLD_TCPWM_CNT_CAPTURE_EDGE__OFFSET, 0x00000000
.set CYFLD_TCPWM_CNT_CAPTURE_EDGE__SIZE, 0x00000002
.set CYVAL_TCPWM_CNT_CAPTURE_EDGE_RISING_EDGE, 0x00000000
.set CYVAL_TCPWM_CNT_CAPTURE_EDGE_FALLING_EDGE, 0x00000001
.set CYVAL_TCPWM_CNT_CAPTURE_EDGE_BOTH_EDGES, 0x00000002
.set CYVAL_TCPWM_CNT_CAPTURE_EDGE_NO_EDGE_DET, 0x00000003
.set CYFLD_TCPWM_CNT_COUNT_EDGE__OFFSET, 0x00000002
.set CYFLD_TCPWM_CNT_COUNT_EDGE__SIZE, 0x00000002
.set CYVAL_TCPWM_CNT_COUNT_EDGE_RISING_EDGE, 0x00000000
.set CYVAL_TCPWM_CNT_COUNT_EDGE_FALLING_EDGE, 0x00000001
.set CYVAL_TCPWM_CNT_COUNT_EDGE_BOTH_EDGES, 0x00000002
.set CYVAL_TCPWM_CNT_COUNT_EDGE_NO_EDGE_DET, 0x00000003
.set CYFLD_TCPWM_CNT_RELOAD_EDGE__OFFSET, 0x00000004
.set CYFLD_TCPWM_CNT_RELOAD_EDGE__SIZE, 0x00000002
.set CYVAL_TCPWM_CNT_RELOAD_EDGE_RISING_EDGE, 0x00000000
.set CYVAL_TCPWM_CNT_RELOAD_EDGE_FALLING_EDGE, 0x00000001
.set CYVAL_TCPWM_CNT_RELOAD_EDGE_BOTH_EDGES, 0x00000002
.set CYVAL_TCPWM_CNT_RELOAD_EDGE_NO_EDGE_DET, 0x00000003
.set CYFLD_TCPWM_CNT_STOP_EDGE__OFFSET, 0x00000006
.set CYFLD_TCPWM_CNT_STOP_EDGE__SIZE, 0x00000002
.set CYVAL_TCPWM_CNT_STOP_EDGE_RISING_EDGE, 0x00000000
.set CYVAL_TCPWM_CNT_STOP_EDGE_FALLING_EDGE, 0x00000001
.set CYVAL_TCPWM_CNT_STOP_EDGE_BOTH_EDGES, 0x00000002
.set CYVAL_TCPWM_CNT_STOP_EDGE_NO_EDGE_DET, 0x00000003
.set CYFLD_TCPWM_CNT_START_EDGE__OFFSET, 0x00000008
.set CYFLD_TCPWM_CNT_START_EDGE__SIZE, 0x00000002
.set CYVAL_TCPWM_CNT_START_EDGE_RISING_EDGE, 0x00000000
.set CYVAL_TCPWM_CNT_START_EDGE_FALLING_EDGE, 0x00000001
.set CYVAL_TCPWM_CNT_START_EDGE_BOTH_EDGES, 0x00000002
.set CYVAL_TCPWM_CNT_START_EDGE_NO_EDGE_DET, 0x00000003
.set CYREG_TCPWM_CNT0_TR_CTRL2, 0x40090128
.set CYFLD_TCPWM_CNT_CC_MATCH_MODE__OFFSET, 0x00000000
.set CYFLD_TCPWM_CNT_CC_MATCH_MODE__SIZE, 0x00000002
.set CYVAL_TCPWM_CNT_CC_MATCH_MODE_SET, 0x00000000
.set CYVAL_TCPWM_CNT_CC_MATCH_MODE_CLEAR, 0x00000001
.set CYVAL_TCPWM_CNT_CC_MATCH_MODE_INVERT, 0x00000002
.set CYVAL_TCPWM_CNT_CC_MATCH_MODE_NO_CHANGE, 0x00000003
.set CYFLD_TCPWM_CNT_OVERFLOW_MODE__OFFSET, 0x00000002
.set CYFLD_TCPWM_CNT_OVERFLOW_MODE__SIZE, 0x00000002
.set CYVAL_TCPWM_CNT_OVERFLOW_MODE_SET, 0x00000000
.set CYVAL_TCPWM_CNT_OVERFLOW_MODE_CLEAR, 0x00000001
.set CYVAL_TCPWM_CNT_OVERFLOW_MODE_INVERT, 0x00000002
.set CYVAL_TCPWM_CNT_OVERFLOW_MODE_NO_CHANGE, 0x00000003
.set CYFLD_TCPWM_CNT_UNDERFLOW_MODE__OFFSET, 0x00000004
.set CYFLD_TCPWM_CNT_UNDERFLOW_MODE__SIZE, 0x00000002
.set CYVAL_TCPWM_CNT_UNDERFLOW_MODE_SET, 0x00000000
.set CYVAL_TCPWM_CNT_UNDERFLOW_MODE_CLEAR, 0x00000001
.set CYVAL_TCPWM_CNT_UNDERFLOW_MODE_INVERT, 0x00000002
.set CYVAL_TCPWM_CNT_UNDERFLOW_MODE_NO_CHANGE, 0x00000003
.set CYREG_TCPWM_CNT0_INTR, 0x40090130
.set CYFLD_TCPWM_CNT_TC__OFFSET, 0x00000000
.set CYFLD_TCPWM_CNT_TC__SIZE, 0x00000001
.set CYFLD_TCPWM_CNT_CC_MATCH__OFFSET, 0x00000001
.set CYFLD_TCPWM_CNT_CC_MATCH__SIZE, 0x00000001
.set CYREG_TCPWM_CNT0_INTR_SET, 0x40090134
.set CYREG_TCPWM_CNT0_INTR_MASK, 0x40090138
.set CYREG_TCPWM_CNT0_INTR_MASKED, 0x4009013c
.set CYDEV_TCPWM_CNT1_BASE, 0x40090140
.set CYDEV_TCPWM_CNT1_SIZE, 0x00000040
.set CYREG_TCPWM_CNT1_CTRL, 0x40090140
.set CYREG_TCPWM_CNT1_STATUS, 0x40090144
.set CYREG_TCPWM_CNT1_COUNTER, 0x40090148
.set CYREG_TCPWM_CNT1_CC, 0x4009014c
.set CYREG_TCPWM_CNT1_CC_BUFF, 0x40090150
.set CYREG_TCPWM_CNT1_PERIOD, 0x40090154
.set CYREG_TCPWM_CNT1_PERIOD_BUFF, 0x40090158
.set CYREG_TCPWM_CNT1_TR_CTRL0, 0x40090160
.set CYREG_TCPWM_CNT1_TR_CTRL1, 0x40090164
.set CYREG_TCPWM_CNT1_TR_CTRL2, 0x40090168
.set CYREG_TCPWM_CNT1_INTR, 0x40090170
.set CYREG_TCPWM_CNT1_INTR_SET, 0x40090174
.set CYREG_TCPWM_CNT1_INTR_MASK, 0x40090178
.set CYREG_TCPWM_CNT1_INTR_MASKED, 0x4009017c
.set CYDEV_TCPWM_CNT2_BASE, 0x40090180
.set CYDEV_TCPWM_CNT2_SIZE, 0x00000040
.set CYREG_TCPWM_CNT2_CTRL, 0x40090180
.set CYREG_TCPWM_CNT2_STATUS, 0x40090184
.set CYREG_TCPWM_CNT2_COUNTER, 0x40090188
.set CYREG_TCPWM_CNT2_CC, 0x4009018c
.set CYREG_TCPWM_CNT2_CC_BUFF, 0x40090190
.set CYREG_TCPWM_CNT2_PERIOD, 0x40090194
.set CYREG_TCPWM_CNT2_PERIOD_BUFF, 0x40090198
.set CYREG_TCPWM_CNT2_TR_CTRL0, 0x400901a0
.set CYREG_TCPWM_CNT2_TR_CTRL1, 0x400901a4
.set CYREG_TCPWM_CNT2_TR_CTRL2, 0x400901a8
.set CYREG_TCPWM_CNT2_INTR, 0x400901b0
.set CYREG_TCPWM_CNT2_INTR_SET, 0x400901b4
.set CYREG_TCPWM_CNT2_INTR_MASK, 0x400901b8
.set CYREG_TCPWM_CNT2_INTR_MASKED, 0x400901bc
.set CYDEV_TCPWM_CNT3_BASE, 0x400901c0
.set CYDEV_TCPWM_CNT3_SIZE, 0x00000040
.set CYREG_TCPWM_CNT3_CTRL, 0x400901c0
.set CYREG_TCPWM_CNT3_STATUS, 0x400901c4
.set CYREG_TCPWM_CNT3_COUNTER, 0x400901c8
.set CYREG_TCPWM_CNT3_CC, 0x400901cc
.set CYREG_TCPWM_CNT3_CC_BUFF, 0x400901d0
.set CYREG_TCPWM_CNT3_PERIOD, 0x400901d4
.set CYREG_TCPWM_CNT3_PERIOD_BUFF, 0x400901d8
.set CYREG_TCPWM_CNT3_TR_CTRL0, 0x400901e0
.set CYREG_TCPWM_CNT3_TR_CTRL1, 0x400901e4
.set CYREG_TCPWM_CNT3_TR_CTRL2, 0x400901e8
.set CYREG_TCPWM_CNT3_INTR, 0x400901f0
.set CYREG_TCPWM_CNT3_INTR_SET, 0x400901f4
.set CYREG_TCPWM_CNT3_INTR_MASK, 0x400901f8
.set CYREG_TCPWM_CNT3_INTR_MASKED, 0x400901fc
.set CYDEV_USBPD_BASE, 0x400a0000
.set CYDEV_USBPD_SIZE, 0x00010000
.set CYREG_USBPD_CTRL, 0x400a0000
.set CYFLD_USBPD_TX_BYPASS_EN__OFFSET, 0x00000000
.set CYFLD_USBPD_TX_BYPASS_EN__SIZE, 0x00000001
.set CYFLD_USBPD_RX_BYPASS_EN__OFFSET, 0x00000001
.set CYFLD_USBPD_RX_BYPASS_EN__SIZE, 0x00000002
.set CYVAL_USBPD_RX_BYPASS_EN_NO_BYPASS, 0x00000000
.set CYVAL_USBPD_RX_BYPASS_EN_RX_SOP_ALLIGN, 0x00000001
.set CYVAL_USBPD_RX_BYPASS_EN_NO_RX_SOP_ALLGN, 0x00000002
.set CYVAL_USBPD_RX_BYPASS_EN_RSVD_BYPASS, 0x00000003
.set CYFLD_USBPD_HPD_DIRECTION__OFFSET, 0x00000003
.set CYFLD_USBPD_HPD_DIRECTION__SIZE, 0x00000001
.set CYFLD_USBPD_HPD_ENABLED__OFFSET, 0x0000001d
.set CYFLD_USBPD_HPD_ENABLED__SIZE, 0x00000001
.set CYFLD_USBPD_HPDT_ENABLED__OFFSET, 0x0000001e
.set CYFLD_USBPD_HPDT_ENABLED__SIZE, 0x00000001
.set CYFLD_USBPD_IP_ENABLED__OFFSET, 0x0000001f
.set CYFLD_USBPD_IP_ENABLED__SIZE, 0x00000001
.set CYREG_USBPD_HEADER_INFO, 0x400a0004
.set CYFLD_USBPD_EN_RX_EXTENDED_DATA__OFFSET, 0x00000000
.set CYFLD_USBPD_EN_RX_EXTENDED_DATA__SIZE, 0x00000001
.set CYFLD_USBPD_EN_TX_EXTENDED_DATA__OFFSET, 0x00000001
.set CYFLD_USBPD_EN_TX_EXTENDED_DATA__SIZE, 0x00000001
.set CYFLD_USBPD_EXTENDED_DATA_BIT_LOCATION__OFFSET, 0x00000008
.set CYFLD_USBPD_EXTENDED_DATA_BIT_LOCATION__SIZE, 0x00000004
.set CYFLD_USBPD_EXTENDED_DATA_BYTE_FIRST_BIT_LOCATION__OFFSET, 0x0000000c
.set CYFLD_USBPD_EXTENDED_DATA_BYTE_FIRST_BIT_LOCATION__SIZE, 0x00000005
.set CYFLD_USBPD_EXTENDED_DATA_BYTE_LAST_BIT_LOCATION__OFFSET, 0x00000011
.set CYFLD_USBPD_EXTENDED_DATA_BYTE_LAST_BIT_LOCATION__SIZE, 0x00000005
.set CYFLD_USBPD_CHUNK_BIT_LOCATION__OFFSET, 0x00000016
.set CYFLD_USBPD_CHUNK_BIT_LOCATION__SIZE, 0x00000004
.set CYREG_USBPD_TX_HEADER, 0x400a000c
.set CYFLD_USBPD_TX_HEADER__OFFSET, 0x00000000
.set CYFLD_USBPD_TX_HEADER__SIZE, 0x00000020
.set CYREG_USBPD_TX_MEM_DATA0, 0x400a0010
.set CYFLD_USBPD_DATA__OFFSET, 0x00000000
.set CYFLD_USBPD_DATA__SIZE, 0x00000020
.set CYREG_USBPD_TX_MEM_DATA1, 0x400a0014
.set CYREG_USBPD_TX_MEM_DATA2, 0x400a0018
.set CYREG_USBPD_TX_MEM_DATA3, 0x400a001c
.set CYREG_USBPD_TX_MEM_DATA4, 0x400a0020
.set CYREG_USBPD_TX_MEM_DATA5, 0x400a0024
.set CYREG_USBPD_TX_MEM_DATA6, 0x400a0028
.set CYREG_USBPD_TX_MEM_DATA7, 0x400a002c
.set CYREG_USBPD_TX_MEM_DATA8, 0x400a0030
.set CYREG_USBPD_TX_MEM_DATA9, 0x400a0034
.set CYREG_USBPD_TX_MEM_DATA10, 0x400a0038
.set CYREG_USBPD_TX_MEM_DATA11, 0x400a003c
.set CYREG_USBPD_TX_MEM_DATA12, 0x400a0040
.set CYREG_USBPD_TX_MEM_DATA13, 0x400a0044
.set CYREG_USBPD_TX_MEM_DATA14, 0x400a0048
.set CYREG_USBPD_TX_MEM_DATA15, 0x400a004c
.set CYREG_USBPD_RX_HEADER, 0x400a005c
.set CYFLD_USBPD_RX_HEADER__OFFSET, 0x00000000
.set CYFLD_USBPD_RX_HEADER__SIZE, 0x00000020
.set CYREG_USBPD_RX_MEM_DATA0, 0x400a0060
.set CYREG_USBPD_RX_MEM_DATA1, 0x400a0064
.set CYREG_USBPD_RX_MEM_DATA2, 0x400a0068
.set CYREG_USBPD_RX_MEM_DATA3, 0x400a006c
.set CYREG_USBPD_RX_MEM_DATA4, 0x400a0070
.set CYREG_USBPD_RX_MEM_DATA5, 0x400a0074
.set CYREG_USBPD_RX_MEM_DATA6, 0x400a0078
.set CYREG_USBPD_RX_MEM_DATA7, 0x400a007c
.set CYREG_USBPD_RX_MEM_DATA8, 0x400a0080
.set CYREG_USBPD_RX_MEM_DATA9, 0x400a0084
.set CYREG_USBPD_RX_MEM_DATA10, 0x400a0088
.set CYREG_USBPD_RX_MEM_DATA11, 0x400a008c
.set CYREG_USBPD_RX_MEM_DATA12, 0x400a0090
.set CYREG_USBPD_RX_MEM_DATA13, 0x400a0094
.set CYREG_USBPD_RX_MEM_DATA14, 0x400a0098
.set CYREG_USBPD_RX_MEM_DATA15, 0x400a009c
.set CYREG_USBPD_SRAM_PTR, 0x400a00a0
.set CYFLD_USBPD_TX_FUNC_RD_PTR__OFFSET, 0x00000000
.set CYFLD_USBPD_TX_FUNC_RD_PTR__SIZE, 0x00000005
.set CYFLD_USBPD_RX_FUNC_WR_PTR__OFFSET, 0x00000008
.set CYFLD_USBPD_RX_FUNC_WR_PTR__SIZE, 0x00000005
.set CYREG_USBPD_STATUS, 0x400a00a4
.set CYFLD_USBPD_RX_BUSY__OFFSET, 0x00000000
.set CYFLD_USBPD_RX_BUSY__SIZE, 0x00000001
.set CYFLD_USBPD_TX_BUSY__OFFSET, 0x00000001
.set CYFLD_USBPD_TX_BUSY__SIZE, 0x00000001
.set CYFLD_USBPD_CC_DATA_VALID__OFFSET, 0x00000002
.set CYFLD_USBPD_CC_DATA_VALID__SIZE, 0x00000001
.set CYFLD_USBPD_SOP_TYPE_DETECTED__OFFSET, 0x00000003
.set CYFLD_USBPD_SOP_TYPE_DETECTED__SIZE, 0x00000003
.set CYVAL_USBPD_SOP_TYPE_DETECTED_NO_SOP_RCVD, 0x00000000
.set CYVAL_USBPD_SOP_TYPE_DETECTED_DEFAULT_SOP_RCVD, 0x00000001
.set CYVAL_USBPD_SOP_TYPE_DETECTED_PRIME_SOP_RCVD, 0x00000002
.set CYVAL_USBPD_SOP_TYPE_DETECTED_DBL_PRIME_SOP_RCVD, 0x00000003
.set CYVAL_USBPD_SOP_TYPE_DETECTED_DBG_PRIME_SOP_RCVD, 0x00000004
.set CYVAL_USBPD_SOP_TYPE_DETECTED_DBG_DBL_PRIME_SOP_RCVD, 0x00000005
.set CYVAL_USBPD_SOP_TYPE_DETECTED_RSVD1_SOP_RCVD, 0x00000006
.set CYVAL_USBPD_SOP_TYPE_DETECTED_RSVD2_SOP_RCVD, 0x00000007
.set CYFLD_USBPD_GOODCRC_MSG_SOP_TYPE_DETECTED__OFFSET, 0x00000006
.set CYFLD_USBPD_GOODCRC_MSG_SOP_TYPE_DETECTED__SIZE, 0x00000003
.set CYVAL_USBPD_GOODCRC_MSG_SOP_TYPE_DETECTED_NO_SOP_GOODCRC_RCVD, 0x00000000
.set CYVAL_USBPD_GOODCRC_MSG_SOP_TYPE_DETECTED_DEFAULT_SOP_GOODCRC_RCVD, 0x00000001
.set CYVAL_USBPD_GOODCRC_MSG_SOP_TYPE_DETECTED_PRIME_SOP_GOODCRC_RCVD, 0x00000002
.set CYVAL_USBPD_GOODCRC_MSG_SOP_TYPE_DETECTED_DBL_PRIME_SOP_GOODCRC_RCVD, 0x00000003
.set CYVAL_USBPD_GOODCRC_MSG_SOP_TYPE_DETECTED_DBG_PRIME_SOP_GOODCRC_RCVD, 0x00000004
.set CYVAL_USBPD_GOODCRC_MSG_SOP_TYPE_DETECTED_DBG_DBL_PRIME_SOP_GOODCRC_RCVD, 0x00000005
.set CYVAL_USBPD_GOODCRC_MSG_SOP_TYPE_DETECTED_RSVD1_SOP_GOODCRC_RCVD, 0x00000006
.set CYVAL_USBPD_GOODCRC_MSG_SOP_TYPE_DETECTED_RSVD2_SOP_GOODCRC_RCVD, 0x00000007
.set CYFLD_USBPD_RST_TYPE_DET__OFFSET, 0x00000009
.set CYFLD_USBPD_RST_TYPE_DET__SIZE, 0x00000003
.set CYVAL_USBPD_RST_TYPE_DET_RESERVED_RESET, 0x00000000
.set CYVAL_USBPD_RST_TYPE_DET_HARD_RESET_RCVD, 0x00000001
.set CYVAL_USBPD_RST_TYPE_DET_CABLE_RESET_RCVD, 0x00000002
.set CYVAL_USBPD_RST_TYPE_DET_RSVD1_RESET_RCVD, 0x00000003
.set CYVAL_USBPD_RST_TYPE_DET_RSVD2_RESET_RCVD, 0x00000004
.set CYFLD_USBPD_VCONN1_STATUS__OFFSET, 0x0000000c
.set CYFLD_USBPD_VCONN1_STATUS__SIZE, 0x00000001
.set CYFLD_USBPD_CC1_STATUS__OFFSET, 0x0000000e
.set CYFLD_USBPD_CC1_STATUS__SIZE, 0x00000001
.set CYFLD_USBPD_CC2_STATUS__OFFSET, 0x0000000f
.set CYFLD_USBPD_CC2_STATUS__SIZE, 0x00000001
.set CYFLD_USBPD_VCMP_LA_STATUS__OFFSET, 0x00000010
.set CYFLD_USBPD_VCMP_LA_STATUS__SIZE, 0x00000001
.set CYFLD_USBPD_VCMP_UP_STATUS__OFFSET, 0x00000011
.set CYFLD_USBPD_VCMP_UP_STATUS__SIZE, 0x00000001
.set CYFLD_USBPD_VCMP_DN_STATUS__OFFSET, 0x00000012
.set CYFLD_USBPD_VCMP_DN_STATUS__SIZE, 0x00000001
.set CYFLD_USBPD_VCMP_FS__OFFSET, 0x00000013
.set CYFLD_USBPD_VCMP_FS__SIZE, 0x00000001
.set CYFLD_USBPD_SENDING_GOODCRC_MSG__OFFSET, 0x00000014
.set CYFLD_USBPD_SENDING_GOODCRC_MSG__SIZE, 0x00000001
.set CYFLD_USBPD_V5V_STATUS__OFFSET, 0x00000015
.set CYFLD_USBPD_V5V_STATUS__SIZE, 0x00000001
.set CYFLD_USBPD_ADC1_CMP_OUT_STATUS__OFFSET, 0x00000016
.set CYFLD_USBPD_ADC1_CMP_OUT_STATUS__SIZE, 0x00000001
.set CYFLD_USBPD_ADC2_CMP_OUT_STATUS__OFFSET, 0x00000017
.set CYFLD_USBPD_ADC2_CMP_OUT_STATUS__SIZE, 0x00000001
.set CYFLD_USBPD_HPD_STATUS__OFFSET, 0x00000018
.set CYFLD_USBPD_HPD_STATUS__SIZE, 0x00000001
.set CYFLD_USBPD_SPARE6_STATUS__OFFSET, 0x00000019
.set CYFLD_USBPD_SPARE6_STATUS__SIZE, 0x00000001
.set CYFLD_USBPD_SPARE7_STATUS__OFFSET, 0x0000001a
.set CYFLD_USBPD_SPARE7_STATUS__SIZE, 0x00000001
.set CYREG_USBPD_RX_SOP_GOOD_CRC_EN_CTRL, 0x400a00a8
.set CYFLD_USBPD_TX_SEND_DEFAULT_SOP_GOOD_CRC_EN__OFFSET, 0x00000000
.set CYFLD_USBPD_TX_SEND_DEFAULT_SOP_GOOD_CRC_EN__SIZE, 0x00000001
.set CYFLD_USBPD_TX_SEND_PRIME_SOP_GOOD_CRC_EN__OFFSET, 0x00000001
.set CYFLD_USBPD_TX_SEND_PRIME_SOP_GOOD_CRC_EN__SIZE, 0x00000001
.set CYFLD_USBPD_TX_SEND_DBL_PRIME_SOP_GOOD_CRC_EN__OFFSET, 0x00000002
.set CYFLD_USBPD_TX_SEND_DBL_PRIME_SOP_GOOD_CRC_EN__SIZE, 0x00000001
.set CYFLD_USBPD_EXT_TX_SEND_DEFAULT_SOP_GOOD_CRC_EN__OFFSET, 0x00000003
.set CYFLD_USBPD_EXT_TX_SEND_DEFAULT_SOP_GOOD_CRC_EN__SIZE, 0x00000001
.set CYFLD_USBPD_EXT_TX_SEND_PRIME_SOP_GOOD_CRC_EN__OFFSET, 0x00000004
.set CYFLD_USBPD_EXT_TX_SEND_PRIME_SOP_GOOD_CRC_EN__SIZE, 0x00000001
.set CYFLD_USBPD_EXT_TX_SEND_DBL_PRIME_SOP_GOOD_CRC_EN__OFFSET, 0x00000005
.set CYFLD_USBPD_EXT_TX_SEND_DBL_PRIME_SOP_GOOD_CRC_EN__SIZE, 0x00000001
.set CYFLD_USBPD_SEND_GOOD_CRC_BAD_EOP__OFFSET, 0x00000006
.set CYFLD_USBPD_SEND_GOOD_CRC_BAD_EOP__SIZE, 0x00000001
.set CYFLD_USBPD_SEND_GOOD_CRC_BAD_KCHAR__OFFSET, 0x00000007
.set CYFLD_USBPD_SEND_GOOD_CRC_BAD_KCHAR__SIZE, 0x00000001
.set CYFLD_USBPD_SEND_GOOD_CRC_SRAM_OVERFLOW__OFFSET, 0x00000008
.set CYFLD_USBPD_SEND_GOOD_CRC_SRAM_OVERFLOW__SIZE, 0x00000001
.set CYREG_USBPD_RX_DEFAULT_SOP_GOODCRC_CTRL_0, 0x400a00ac
.set CYFLD_USBPD_SEND_GOOD_CRC_PER_CTRL_MSG_TYP__OFFSET, 0x00000000
.set CYFLD_USBPD_SEND_GOOD_CRC_PER_CTRL_MSG_TYP__SIZE, 0x00000020
.set CYREG_USBPD_RX_DEFAULT_SOP_GOODCRC_CTRL_1, 0x400a00b0
.set CYFLD_USBPD_SEND_GOOD_CRC_PER_DATA_MSG_TYP__OFFSET, 0x00000000
.set CYFLD_USBPD_SEND_GOOD_CRC_PER_DATA_MSG_TYP__SIZE, 0x00000020
.set CYREG_USBPD_RX_DEFAULT_SOP_GOODCRC_CTRL_2, 0x400a00b4
.set CYREG_USBPD_RX_PRIME_SOP_GOODCRC_CTRL_0, 0x400a00b8
.set CYREG_USBPD_RX_PRIME_SOP_GOODCRC_CTRL_1, 0x400a00bc
.set CYREG_USBPD_RX_PRIME_SOP_GOODCRC_CTRL_2, 0x400a00c0
.set CYREG_USBPD_RX_DBL_PRIME_SOP_GOODCRC_CTRL_0, 0x400a00c4
.set CYREG_USBPD_RX_DBL_PRIME_SOP_GOODCRC_CTRL_1, 0x400a00c8
.set CYREG_USBPD_RX_DBL_PRIME_SOP_GOODCRC_CTRL_2, 0x400a00cc
.set CYREG_USBPD_RX_EXPECT_GOODCRC_MSG, 0x400a00d0
.set CYFLD_USBPD_EXPECTED_HEADER__OFFSET, 0x00000000
.set CYFLD_USBPD_EXPECTED_HEADER__SIZE, 0x00000010
.set CYFLD_USBPD_EXPECTED_SOP__OFFSET, 0x00000010
.set CYFLD_USBPD_EXPECTED_SOP__SIZE, 0x00000003
.set CYVAL_USBPD_EXPECTED_SOP_EXP_RESERVED, 0x00000000
.set CYVAL_USBPD_EXPECTED_SOP_EXP_DEFAULT_SOP_RCVD, 0x00000001
.set CYVAL_USBPD_EXPECTED_SOP_EXP_PRIME_SOP_RCVD, 0x00000002
.set CYVAL_USBPD_EXPECTED_SOP_EXP_DBL_PRIME_SOP_RCVD, 0x00000003
.set CYVAL_USBPD_EXPECTED_SOP_EXP_DBG_PRIME_SOP_RCVD, 0x00000004
.set CYVAL_USBPD_EXPECTED_SOP_EXP_DBG_DBL_PRIME_SOP_RCVD, 0x00000005
.set CYVAL_USBPD_EXPECTED_SOP_EXP_RSVD1_SOP_RCVD, 0x00000006
.set CYVAL_USBPD_EXPECTED_SOP_EXP_RSVD2_SOP_RCVD, 0x00000007
.set CYFLD_USBPD_DISABLE_RX_CRC_TIMER__OFFSET, 0x00000013
.set CYFLD_USBPD_DISABLE_RX_CRC_TIMER__SIZE, 0x00000001
.set CYREG_USBPD_RX_GOODCRC_MSG, 0x400a00d4
.set CYFLD_USBPD_HEADER__OFFSET, 0x00000000
.set CYFLD_USBPD_HEADER__SIZE, 0x00000010
.set CYREG_USBPD_RX_CC, 0x400a00d8
.set CYFLD_USBPD_RX_CNT_MAX__OFFSET, 0x00000000
.set CYFLD_USBPD_RX_CNT_MAX__SIZE, 0x00000008
.set CYFLD_USBPD_RX_UI_BOUNDARY_DELTA__OFFSET, 0x00000008
.set CYFLD_USBPD_RX_UI_BOUNDARY_DELTA__SIZE, 0x00000006
.set CYFLD_USBPD_DELAY_HALF__OFFSET, 0x0000000e
.set CYFLD_USBPD_DELAY_HALF__SIZE, 0x00000001
.set CYFLD_USBPD_DELAY_VALUE__OFFSET, 0x0000000f
.set CYFLD_USBPD_DELAY_VALUE__SIZE, 0x00000004
.set CYFLD_USBPD_DELAY_WIDEN_HIGH__OFFSET, 0x00000013
.set CYFLD_USBPD_DELAY_WIDEN_HIGH__SIZE, 0x00000001
.set CYFLD_USBPD_DELAY_AUTO__OFFSET, 0x00000014
.set CYFLD_USBPD_DELAY_AUTO__SIZE, 0x00000001
.set CYREG_USBPD_RX_CC2, 0x400a00e0
.set CYFLD_USBPD_MIN_PULSE_VALUE__OFFSET, 0x00000000
.set CYFLD_USBPD_MIN_PULSE_VALUE__SIZE, 0x00000008
.set CYFLD_USBPD_MAX_PULSE_VALUE__OFFSET, 0x00000008
.set CYFLD_USBPD_MAX_PULSE_VALUE__SIZE, 0x00000008
.set CYFLD_USBPD_DELAY_VALID_COUNT__OFFSET, 0x00000010
.set CYFLD_USBPD_DELAY_VALID_COUNT__SIZE, 0x00000004
.set CYREG_USBPD_RX_ORDER_SET_CTRL, 0x400a00e4
.set CYFLD_USBPD_SOP_CMP_OPT__OFFSET, 0x00000000
.set CYFLD_USBPD_SOP_CMP_OPT__SIZE, 0x00000001
.set CYFLD_USBPD_RST_CMP_OPT__OFFSET, 0x00000001
.set CYFLD_USBPD_RST_CMP_OPT__SIZE, 0x00000001
.set CYFLD_USBPD_PREAMBLE_SOP_EN__OFFSET, 0x00000002
.set CYFLD_USBPD_PREAMBLE_SOP_EN__SIZE, 0x00000001
.set CYFLD_USBPD_PREAMBLE_RST_EN__OFFSET, 0x00000003
.set CYFLD_USBPD_PREAMBLE_RST_EN__SIZE, 0x00000001
.set CYFLD_USBPD_SOP_RST_EN__OFFSET, 0x00000008
.set CYFLD_USBPD_SOP_RST_EN__SIZE, 0x0000000b
.set CYVAL_USBPD_SOP_RST_EN_EN_DEFAULT_SOP_DET, 0x00000001
.set CYVAL_USBPD_SOP_RST_EN_EN_PRIME_SOP_DET, 0x00000002
.set CYVAL_USBPD_SOP_RST_EN_EN_DBL_PRIME_SOP_DET, 0x00000004
.set CYVAL_USBPD_SOP_RST_EN_EN_DEBUG_PRIME_SOP_DET, 0x00000008
.set CYVAL_USBPD_SOP_RST_EN_EN_DEBUG_DBL_PRIME_DET, 0x00000010
.set CYVAL_USBPD_SOP_RST_EN_EN_RX_CABLE_RESET_DET, 0x00000020
.set CYVAL_USBPD_SOP_RST_EN_EN_RX_HARD_RESET_DET, 0x00000040
.set CYVAL_USBPD_SOP_RST_EN_RESERVED1_CFG, 0x00000080
.set CYVAL_USBPD_SOP_RST_EN_EN_RESERVED1, 0x00000100
.set CYVAL_USBPD_SOP_RST_EN_RESERVED2_CFG, 0x00000200
.set CYVAL_USBPD_SOP_RST_EN_EN_RESERVED2, 0x00000400
.set CYREG_USBPD_RX_RESERVED1_ORDER_SET, 0x400a00e8
.set CYFLD_USBPD_RX_RESERVED1_OS__OFFSET, 0x00000000
.set CYFLD_USBPD_RX_RESERVED1_OS__SIZE, 0x00000020
.set CYREG_USBPD_RX_RESERVED2_ORDER_SET, 0x400a00ec
.set CYFLD_USBPD_RX_RESERVED2_OS__OFFSET, 0x00000000
.set CYFLD_USBPD_RX_RESERVED2_OS__SIZE, 0x00000014
.set CYREG_USBPD_TX_GOODCRC_MSG_ORDER_SET, 0x400a00f0
.set CYFLD_USBPD_TX_GOODCRC_OS__OFFSET, 0x00000000
.set CYFLD_USBPD_TX_GOODCRC_OS__SIZE, 0x00000020
.set CYREG_USBPD_TX_CTRL, 0x400a00f4
.set CYFLD_USBPD_GOODCRC_MSG_BITS__OFFSET, 0x00000000
.set CYFLD_USBPD_GOODCRC_MSG_BITS__SIZE, 0x00000010
.set CYFLD_USBPD_EN_TX_BIST_CM2__OFFSET, 0x00000010
.set CYFLD_USBPD_EN_TX_BIST_CM2__SIZE, 0x00000001
.set CYFLD_USBPD_TX_GO__OFFSET, 0x00000011
.set CYFLD_USBPD_TX_GO__SIZE, 0x00000001
.set CYFLD_USBPD_TX_SEND_RST__OFFSET, 0x00000012
.set CYFLD_USBPD_TX_SEND_RST__SIZE, 0x00000001
.set CYFLD_USBPD_TX_RETRY_ENABLE__OFFSET, 0x00000013
.set CYFLD_USBPD_TX_RETRY_ENABLE__SIZE, 0x00000001
.set CYFLD_USBPD_TX_REG_EN__OFFSET, 0x00000014
.set CYFLD_USBPD_TX_REG_EN__SIZE, 0x00000001
.set CYFLD_USBPD_TX_REG_CFG__OFFSET, 0x00000015
.set CYFLD_USBPD_TX_REG_CFG__SIZE, 0x00000001
.set CYFLD_USBPD_TX_REG_TIMER__OFFSET, 0x00000018
.set CYFLD_USBPD_TX_REG_TIMER__SIZE, 0x00000006
.set CYFLD_USBPD_TX_CORRUPT_CRC_ON_UNDER_FLOW__OFFSET, 0x0000001f
.set CYFLD_USBPD_TX_CORRUPT_CRC_ON_UNDER_FLOW__SIZE, 0x00000001
.set CYREG_USBPD_TX_SOP_ORDER_SET, 0x400a00f8
.set CYFLD_USBPD_TX_SOP_OS__OFFSET, 0x00000000
.set CYFLD_USBPD_TX_SOP_OS__SIZE, 0x00000014
.set CYREG_USBPD_TX_HARD_CABLE_ORDER_SET, 0x400a00fc
.set CYFLD_USBPD_TX_RESET_OS__OFFSET, 0x00000000
.set CYFLD_USBPD_TX_RESET_OS__SIZE, 0x00000014
.set CYREG_USBPD_CRC_COUNTER, 0x400a0100
.set CYFLD_USBPD_CRC_COUNTER__OFFSET, 0x00000000
.set CYFLD_USBPD_CRC_COUNTER__SIZE, 0x00000010
.set CYREG_USBPD_INTER_PACKET_COUNTER, 0x400a0104
.set CYFLD_USBPD_BUS_IDLE_CNT__OFFSET, 0x00000000
.set CYFLD_USBPD_BUS_IDLE_CNT__SIZE, 0x0000000b
.set CYFLD_USBPD_IDLE_COUNTER__OFFSET, 0x0000000b
.set CYFLD_USBPD_IDLE_COUNTER__SIZE, 0x0000000a
.set CYFLD_USBPD_IFG_COUNTER__OFFSET, 0x00000015
.set CYFLD_USBPD_IFG_COUNTER__SIZE, 0x0000000b
.set CYREG_USBPD_TIMER_TRIGGER, 0x400a0108
.set CYFLD_USBPD_EN_TRIGGER0__OFFSET, 0x00000000
.set CYFLD_USBPD_EN_TRIGGER0__SIZE, 0x00000001
.set CYFLD_USBPD_EN_TRIGGER1__OFFSET, 0x00000001
.set CYFLD_USBPD_EN_TRIGGER1__SIZE, 0x00000001
.set CYFLD_USBPD_EN_TRIGGER2__OFFSET, 0x00000002
.set CYFLD_USBPD_EN_TRIGGER2__SIZE, 0x00000001
.set CYFLD_USBPD_EN_TRIGGER3__OFFSET, 0x00000003
.set CYFLD_USBPD_EN_TRIGGER3__SIZE, 0x00000001
.set CYFLD_USBPD_EN_TRIGGER4__OFFSET, 0x00000004
.set CYFLD_USBPD_EN_TRIGGER4__SIZE, 0x00000001
.set CYFLD_USBPD_EN_TRIGGER5__OFFSET, 0x00000005
.set CYFLD_USBPD_EN_TRIGGER5__SIZE, 0x00000001
.set CYFLD_USBPD_EN_TRIGGER6__OFFSET, 0x00000006
.set CYFLD_USBPD_EN_TRIGGER6__SIZE, 0x00000001
.set CYREG_USBPD_INTR_DDFT_MUX, 0x400a010c
.set CYFLD_USBPD_intr_ddft0_sel__OFFSET, 0x00000000
.set CYFLD_USBPD_intr_ddft0_sel__SIZE, 0x00000007
.set CYFLD_USBPD_intr_ddft1_sel__OFFSET, 0x00000007
.set CYFLD_USBPD_intr_ddft1_sel__SIZE, 0x00000007
.set CYREG_USBPD_DDFT_MUX, 0x400a0110
.set CYFLD_USBPD_ddft0_sel__OFFSET, 0x00000000
.set CYFLD_USBPD_ddft0_sel__SIZE, 0x00000006
.set CYFLD_USBPD_ddft1_sel__OFFSET, 0x00000006
.set CYFLD_USBPD_ddft1_sel__SIZE, 0x00000006
.set CYREG_USBPD_INTR_1_CFG, 0x400a0114
.set CYFLD_USBPD_VCONN1_CFG__OFFSET, 0x00000000
.set CYFLD_USBPD_VCONN1_CFG__SIZE, 0x00000002
.set CYVAL_USBPD_VCONN1_CFG_POS_EDG_DIS_NEG_EDG_DIS, 0x00000000
.set CYVAL_USBPD_VCONN1_CFG_POS_EDG_DIS_NEG_EDG_EN, 0x00000001
.set CYVAL_USBPD_VCONN1_CFG_POS_EDG_EN_NEG_EDG_DIS, 0x00000002
.set CYVAL_USBPD_VCONN1_CFG_POS_EDG_EN_NEG_EDG_EN, 0x00000003
.set CYFLD_USBPD_CC1_CFG__OFFSET, 0x00000004
.set CYFLD_USBPD_CC1_CFG__SIZE, 0x00000002
.set CYVAL_USBPD_CC1_CFG_POS_EDG_DIS_NEG_EDG_DIS, 0x00000000
.set CYVAL_USBPD_CC1_CFG_POS_EDG_DIS_NEG_EDG_EN, 0x00000001
.set CYVAL_USBPD_CC1_CFG_POS_EDG_EN_NEG_EDG_DIS, 0x00000002
.set CYVAL_USBPD_CC1_CFG_POS_EDG_EN_NEG_EDG_EN, 0x00000003
.set CYFLD_USBPD_CC2_CFG__OFFSET, 0x00000006
.set CYFLD_USBPD_CC2_CFG__SIZE, 0x00000002
.set CYVAL_USBPD_CC2_CFG_POS_EDG_DIS_NEG_EDG_DIS, 0x00000000
.set CYVAL_USBPD_CC2_CFG_POS_EDG_DIS_NEG_EDG_EN, 0x00000001
.set CYVAL_USBPD_CC2_CFG_POS_EDG_EN_NEG_EDG_DIS, 0x00000002
.set CYVAL_USBPD_CC2_CFG_POS_EDG_EN_NEG_EDG_EN, 0x00000003
.set CYFLD_USBPD_VCMP_UP_CFG__OFFSET, 0x00000008
.set CYFLD_USBPD_VCMP_UP_CFG__SIZE, 0x00000002
.set CYVAL_USBPD_VCMP_UP_CFG_POS_EDG_DIS_NEG_EDG_DIS, 0x00000000
.set CYVAL_USBPD_VCMP_UP_CFG_POS_EDG_DIS_NEG_EDG_EN, 0x00000001
.set CYVAL_USBPD_VCMP_UP_CFG_POS_EDG_EN_NEG_EDG_DIS, 0x00000002
.set CYVAL_USBPD_VCMP_UP_CFG_POS_EDG_EN_NEG_EDG_EN, 0x00000003
.set CYFLD_USBPD_VCMP_DN_CFG__OFFSET, 0x0000000a
.set CYFLD_USBPD_VCMP_DN_CFG__SIZE, 0x00000002
.set CYVAL_USBPD_VCMP_DN_CFG_POS_EDG_DIS_NEG_EDG_DIS, 0x00000000
.set CYVAL_USBPD_VCMP_DN_CFG_POS_EDG_DIS_NEG_EDG_EN, 0x00000001
.set CYVAL_USBPD_VCMP_DN_CFG_POS_EDG_EN_NEG_EDG_DIS, 0x00000002
.set CYVAL_USBPD_VCMP_DN_CFG_POS_EDG_EN_NEG_EDG_EN, 0x00000003
.set CYFLD_USBPD_VCMP_LA_CFG__OFFSET, 0x0000000c
.set CYFLD_USBPD_VCMP_LA_CFG__SIZE, 0x00000002
.set CYVAL_USBPD_VCMP_LA_CFG_POS_EDG_DIS_NEG_EDG_DIS, 0x00000000
.set CYVAL_USBPD_VCMP_LA_CFG_POS_EDG_DIS_NEG_EDG_EN, 0x00000001
.set CYVAL_USBPD_VCMP_LA_CFG_POS_EDG_EN_NEG_EDG_DIS, 0x00000002
.set CYVAL_USBPD_VCMP_LA_CFG_POS_EDG_EN_NEG_EDG_EN, 0x00000003
.set CYFLD_USBPD_VCONN1_FILT_EN__OFFSET, 0x0000000e
.set CYFLD_USBPD_VCONN1_FILT_EN__SIZE, 0x00000001
.set CYFLD_USBPD_CC1_CFG_FILT_EN__OFFSET, 0x00000010
.set CYFLD_USBPD_CC1_CFG_FILT_EN__SIZE, 0x00000001
.set CYFLD_USBPD_CC2_FILT_EN__OFFSET, 0x00000011
.set CYFLD_USBPD_CC2_FILT_EN__SIZE, 0x00000001
.set CYFLD_USBPD_VCMP_UP_FILT_EN__OFFSET, 0x00000012
.set CYFLD_USBPD_VCMP_UP_FILT_EN__SIZE, 0x00000001
.set CYFLD_USBPD_VCMP_DN_FILT_EN__OFFSET, 0x00000013
.set CYFLD_USBPD_VCMP_DN_FILT_EN__SIZE, 0x00000001
.set CYFLD_USBPD_V5V_FILT_EN__OFFSET, 0x00000014
.set CYFLD_USBPD_V5V_FILT_EN__SIZE, 0x00000001
.set CYFLD_USBPD_V5V_CFG__OFFSET, 0x00000015
.set CYFLD_USBPD_V5V_CFG__SIZE, 0x00000002
.set CYVAL_USBPD_V5V_CFG_POS_EDG_DIS_NEG_EDG_DIS, 0x00000000
.set CYVAL_USBPD_V5V_CFG_POS_EDG_DIS_NEG_EDG_EN, 0x00000001
.set CYVAL_USBPD_V5V_CFG_POS_EDG_EN_NEG_EDG_DIS, 0x00000002
.set CYVAL_USBPD_V5V_CFG_POS_EDG_EN_NEG_EDG_EN, 0x00000003
.set CYFLD_USBPD_CMP_OUT1_FILT_EN__OFFSET, 0x00000017
.set CYFLD_USBPD_CMP_OUT1_FILT_EN__SIZE, 0x00000001
.set CYFLD_USBPD_ADC1_CFG__OFFSET, 0x00000018
.set CYFLD_USBPD_ADC1_CFG__SIZE, 0x00000002
.set CYVAL_USBPD_ADC1_CFG_POS_EDG_DIS_NEG_EDG_DIS, 0x00000000
.set CYVAL_USBPD_ADC1_CFG_POS_EDG_DIS_NEG_EDG_EN, 0x00000001
.set CYVAL_USBPD_ADC1_CFG_POS_EDG_EN_NEG_EDG_DIS, 0x00000002
.set CYVAL_USBPD_ADC1_CFG_POS_EDG_EN_NEG_EDG_EN, 0x00000003
.set CYFLD_USBPD_CMP_OUT2_FILT_EN__OFFSET, 0x0000001a
.set CYFLD_USBPD_CMP_OUT2_FILT_EN__SIZE, 0x00000001
.set CYFLD_USBPD_ADC2_CFG__OFFSET, 0x0000001b
.set CYFLD_USBPD_ADC2_CFG__SIZE, 0x00000002
.set CYVAL_USBPD_ADC2_CFG_POS_EDG_DIS_NEG_EDG_DIS, 0x00000000
.set CYVAL_USBPD_ADC2_CFG_POS_EDG_DIS_NEG_EDG_EN, 0x00000001
.set CYVAL_USBPD_ADC2_CFG_POS_EDG_EN_NEG_EDG_DIS, 0x00000002
.set CYVAL_USBPD_ADC2_CFG_POS_EDG_EN_NEG_EDG_EN, 0x00000003
.set CYFLD_USBPD_HPDIN_CFG__OFFSET, 0x0000001d
.set CYFLD_USBPD_HPDIN_CFG__SIZE, 0x00000002
.set CYVAL_USBPD_HPDIN_CFG_POS_EDG_DIS_NEG_EDG_DIS, 0x00000000
.set CYVAL_USBPD_HPDIN_CFG_POS_EDG_DIS_NEG_EDG_EN, 0x00000001
.set CYVAL_USBPD_HPDIN_CFG_POS_EDG_EN_NEG_EDG_DIS, 0x00000002
.set CYVAL_USBPD_HPDIN_CFG_POS_EDG_EN_NEG_EDG_EN, 0x00000003
.set CYFLD_USBPD_HPDIN_FILT_EN__OFFSET, 0x0000001f
.set CYFLD_USBPD_HPDIN_FILT_EN__SIZE, 0x00000001
.set CYREG_USBPD_INTR0, 0x400a0118
.set CYFLD_USBPD_RCV_GOOD_PACKET_COMPLETE__OFFSET, 0x00000000
.set CYFLD_USBPD_RCV_GOOD_PACKET_COMPLETE__SIZE, 0x00000001
.set CYFLD_USBPD_RCV_BAD_PACKET_COMPLETE__OFFSET, 0x00000001
.set CYFLD_USBPD_RCV_BAD_PACKET_COMPLETE__SIZE, 0x00000001
.set CYFLD_USBPD_RX_SOP__OFFSET, 0x00000002
.set CYFLD_USBPD_RX_SOP__SIZE, 0x00000001
.set CYFLD_USBPD_RCV_GOODCRC_MSG_COMPLETE__OFFSET, 0x00000003
.set CYFLD_USBPD_RCV_GOODCRC_MSG_COMPLETE__SIZE, 0x00000001
.set CYFLD_USBPD_RCV_EXPT_GOODCRC_MSG_COMPLETE__OFFSET, 0x00000004
.set CYFLD_USBPD_RCV_EXPT_GOODCRC_MSG_COMPLETE__SIZE, 0x00000001
.set CYFLD_USBPD_EOP_ERROR__OFFSET, 0x00000005
.set CYFLD_USBPD_EOP_ERROR__SIZE, 0x00000001
.set CYFLD_USBPD_RX_OVER_RUN__OFFSET, 0x00000006
.set CYFLD_USBPD_RX_OVER_RUN__SIZE, 0x00000001
.set CYFLD_USBPD_TX_PACKET_DONE__OFFSET, 0x00000007
.set CYFLD_USBPD_TX_PACKET_DONE__SIZE, 0x00000001
.set CYFLD_USBPD_TX_HARD_RST_DONE__OFFSET, 0x00000008
.set CYFLD_USBPD_TX_HARD_RST_DONE__SIZE, 0x00000001
.set CYFLD_USBPD_RCV_RST__OFFSET, 0x00000009
.set CYFLD_USBPD_RCV_RST__SIZE, 0x00000001
.set CYFLD_USBPD_SAR1_DONE__OFFSET, 0x0000000a
.set CYFLD_USBPD_SAR1_DONE__SIZE, 0x00000001
.set CYFLD_USBPD_TX_GOODCRC_MSG_DONE__OFFSET, 0x0000000b
.set CYFLD_USBPD_TX_GOODCRC_MSG_DONE__SIZE, 0x00000001
.set CYFLD_USBPD_CC_VALID_DATA_DETECTED__OFFSET, 0x0000000c
.set CYFLD_USBPD_CC_VALID_DATA_DETECTED__SIZE, 0x00000001
.set CYFLD_USBPD_CC_NO_VALID_DATA_DETECTED__OFFSET, 0x0000000d
.set CYFLD_USBPD_CC_NO_VALID_DATA_DETECTED__SIZE, 0x00000001
.set CYFLD_USBPD_CRC_RX_TIMER_EXP__OFFSET, 0x0000000e
.set CYFLD_USBPD_CRC_RX_TIMER_EXP__SIZE, 0x00000001
.set CYFLD_USBPD_COLLISION_TYPE1__OFFSET, 0x0000000f
.set CYFLD_USBPD_COLLISION_TYPE1__SIZE, 0x00000001
.set CYFLD_USBPD_COLLISION_TYPE2__OFFSET, 0x00000010
.set CYFLD_USBPD_COLLISION_TYPE2__SIZE, 0x00000001
.set CYFLD_USBPD_COLLISION_TYPE3__OFFSET, 0x00000011
.set CYFLD_USBPD_COLLISION_TYPE3__SIZE, 0x00000001
.set CYFLD_USBPD_COLLISION_TYPE4__OFFSET, 0x00000012
.set CYFLD_USBPD_COLLISION_TYPE4__SIZE, 0x00000001
.set CYFLD_USBPD_CMP_OUT1_DET__OFFSET, 0x00000013
.set CYFLD_USBPD_CMP_OUT1_DET__SIZE, 0x00000001
.set CYFLD_USBPD_TX_SRAM_HALF_END__OFFSET, 0x00000014
.set CYFLD_USBPD_TX_SRAM_HALF_END__SIZE, 0x00000001
.set CYFLD_USBPD_RX_SRAM_HALF_END__OFFSET, 0x00000015
.set CYFLD_USBPD_RX_SRAM_HALF_END__SIZE, 0x00000001
.set CYFLD_USBPD_TX_RETRY_ENABLE_CLRD__OFFSET, 0x00000016
.set CYFLD_USBPD_TX_RETRY_ENABLE_CLRD__SIZE, 0x00000001
.set CYFLD_USBPD_KCHAR_ERROR__OFFSET, 0x00000017
.set CYFLD_USBPD_KCHAR_ERROR__SIZE, 0x00000001
.set CYFLD_USBPD_TX_CC_DATA_OEN_ASSERT__OFFSET, 0x00000018
.set CYFLD_USBPD_TX_CC_DATA_OEN_ASSERT__SIZE, 0x00000001
.set CYFLD_USBPD_TX_CC_DATA_OEN_DEASSERT__OFFSET, 0x00000019
.set CYFLD_USBPD_TX_CC_DATA_OEN_DEASSERT__SIZE, 0x00000001
.set CYFLD_USBPD_TX_REGULATOR_ENABLED__OFFSET, 0x0000001a
.set CYFLD_USBPD_TX_REGULATOR_ENABLED__SIZE, 0x00000001
.set CYFLD_USBPD_TX_STATE_IDLE__OFFSET, 0x0000001b
.set CYFLD_USBPD_TX_STATE_IDLE__SIZE, 0x00000001
.set CYFLD_USBPD_RX_STATE_IDLE__OFFSET, 0x0000001c
.set CYFLD_USBPD_RX_STATE_IDLE__SIZE, 0x00000001
.set CYFLD_USBPD_SAR2_DONE__OFFSET, 0x0000001d
.set CYFLD_USBPD_SAR2_DONE__SIZE, 0x00000001
.set CYFLD_USBPD_CMP_OUT2_DET__OFFSET, 0x0000001e
.set CYFLD_USBPD_CMP_OUT2_DET__SIZE, 0x00000001
.set CYREG_USBPD_INTR1, 0x400a011c
.set CYFLD_USBPD_VCONN1_CHANGED__OFFSET, 0x00000000
.set CYFLD_USBPD_VCONN1_CHANGED__SIZE, 0x00000001
.set CYFLD_USBPD_CC1_CHANGED__OFFSET, 0x00000002
.set CYFLD_USBPD_CC1_CHANGED__SIZE, 0x00000001
.set CYFLD_USBPD_CC2_CHANGED__OFFSET, 0x00000003
.set CYFLD_USBPD_CC2_CHANGED__SIZE, 0x00000001
.set CYFLD_USBPD_VCMP_LA_CHANGED__OFFSET, 0x00000004
.set CYFLD_USBPD_VCMP_LA_CHANGED__SIZE, 0x00000001
.set CYFLD_USBPD_VCMP_UP_CHANGED__OFFSET, 0x00000005
.set CYFLD_USBPD_VCMP_UP_CHANGED__SIZE, 0x00000001
.set CYFLD_USBPD_VCMP_DN_CHANGED__OFFSET, 0x00000006
.set CYFLD_USBPD_VCMP_DN_CHANGED__SIZE, 0x00000001
.set CYFLD_USBPD_V5V_CHANGED__OFFSET, 0x00000007
.set CYFLD_USBPD_V5V_CHANGED__SIZE, 0x00000001
.set CYFLD_USBPD_CMP_OUT1_CHANGED__OFFSET, 0x00000008
.set CYFLD_USBPD_CMP_OUT1_CHANGED__SIZE, 0x00000001
.set CYFLD_USBPD_CMP_OUT2_CHANGED__OFFSET, 0x00000009
.set CYFLD_USBPD_CMP_OUT2_CHANGED__SIZE, 0x00000001
.set CYFLD_USBPD_HPDIN_CHANGED__OFFSET, 0x0000000a
.set CYFLD_USBPD_HPDIN_CHANGED__SIZE, 0x00000001
.set CYFLD_USBPD_SPARE6__OFFSET, 0x0000000b
.set CYFLD_USBPD_SPARE6__SIZE, 0x00000001
.set CYFLD_USBPD_SPARE7__OFFSET, 0x0000000c
.set CYFLD_USBPD_SPARE7__SIZE, 0x00000001
.set CYREG_USBPD_INTR0_SET, 0x400a0120
.set CYREG_USBPD_INTR1_SET, 0x400a0124
.set CYREG_USBPD_INTR0_MASK, 0x400a0128
.set CYFLD_USBPD_RCV_GOOD_PACKET_COMPLETE_MASK__OFFSET, 0x00000000
.set CYFLD_USBPD_RCV_GOOD_PACKET_COMPLETE_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_RCV_BAD_PACKET_COMPLETE_MASK__OFFSET, 0x00000001
.set CYFLD_USBPD_RCV_BAD_PACKET_COMPLETE_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_RX_SOP_MASK__OFFSET, 0x00000002
.set CYFLD_USBPD_RX_SOP_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_RCV_GOODCRC_MSG_COMPLETE_MASK__OFFSET, 0x00000003
.set CYFLD_USBPD_RCV_GOODCRC_MSG_COMPLETE_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_RCV_EXPT_GOODCRC_MSG_COMPLETE_MASK__OFFSET, 0x00000004
.set CYFLD_USBPD_RCV_EXPT_GOODCRC_MSG_COMPLETE_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_EOP_ERROR_MASK__OFFSET, 0x00000005
.set CYFLD_USBPD_EOP_ERROR_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_RX_OVER_RUN_MASK__OFFSET, 0x00000006
.set CYFLD_USBPD_RX_OVER_RUN_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_TX_PACKET_DONE_MASK__OFFSET, 0x00000007
.set CYFLD_USBPD_TX_PACKET_DONE_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_TX_HARD_RST_DONE_MASK__OFFSET, 0x00000008
.set CYFLD_USBPD_TX_HARD_RST_DONE_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_RCV_RST_MASK__OFFSET, 0x00000009
.set CYFLD_USBPD_RCV_RST_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_SAR1_DONE_MASK__OFFSET, 0x0000000a
.set CYFLD_USBPD_SAR1_DONE_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_TX_GOODCRC_MSG_DONE_MASK__OFFSET, 0x0000000b
.set CYFLD_USBPD_TX_GOODCRC_MSG_DONE_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_CC_VALID_DATA_DETECTED_MASK__OFFSET, 0x0000000c
.set CYFLD_USBPD_CC_VALID_DATA_DETECTED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_CC_NO_VALID_DATA_DETECTED_MASK__OFFSET, 0x0000000d
.set CYFLD_USBPD_CC_NO_VALID_DATA_DETECTED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_CRC_RX_TIMER_EXP_MASK__OFFSET, 0x0000000e
.set CYFLD_USBPD_CRC_RX_TIMER_EXP_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_COLLISION_TYPE1_MASK__OFFSET, 0x0000000f
.set CYFLD_USBPD_COLLISION_TYPE1_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_COLLISION_TYPE2_MASK__OFFSET, 0x00000010
.set CYFLD_USBPD_COLLISION_TYPE2_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_COLLISION_TYPE3_MASK__OFFSET, 0x00000011
.set CYFLD_USBPD_COLLISION_TYPE3_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_COLLISION_TYPE4_MASK__OFFSET, 0x00000012
.set CYFLD_USBPD_COLLISION_TYPE4_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_CMP_OUT1_DET_MASK__OFFSET, 0x00000013
.set CYFLD_USBPD_CMP_OUT1_DET_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_TX_SRAM_HALF_END_MASK__OFFSET, 0x00000014
.set CYFLD_USBPD_TX_SRAM_HALF_END_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_RX_SRAM_HALF_END_MASK__OFFSET, 0x00000015
.set CYFLD_USBPD_RX_SRAM_HALF_END_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_TX_RETRY_ENABLE_CLRD_MASK__OFFSET, 0x00000016
.set CYFLD_USBPD_TX_RETRY_ENABLE_CLRD_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_KCHAR_ERROR_MASK__OFFSET, 0x00000017
.set CYFLD_USBPD_KCHAR_ERROR_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_TX_CC_DATA_OEN_ASSERT_MASK__OFFSET, 0x00000018
.set CYFLD_USBPD_TX_CC_DATA_OEN_ASSERT_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_TX_CC_DATA_OEN_DEASSERT_MASK__OFFSET, 0x00000019
.set CYFLD_USBPD_TX_CC_DATA_OEN_DEASSERT_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_TX_REGULATOR_ENABLED_MASK__OFFSET, 0x0000001a
.set CYFLD_USBPD_TX_REGULATOR_ENABLED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_TX_STATE_IDLE_MASK__OFFSET, 0x0000001b
.set CYFLD_USBPD_TX_STATE_IDLE_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_RX_STATE_IDLE_MASK__OFFSET, 0x0000001c
.set CYFLD_USBPD_RX_STATE_IDLE_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_SAR2_DONE_MASK__OFFSET, 0x0000001d
.set CYFLD_USBPD_SAR2_DONE_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_CMP_OUT2_DET_MASK__OFFSET, 0x0000001e
.set CYFLD_USBPD_CMP_OUT2_DET_MASK__SIZE, 0x00000001
.set CYREG_USBPD_INTR1_MASK, 0x400a012c
.set CYFLD_USBPD_VCONN1_CHANGED_MASK__OFFSET, 0x00000000
.set CYFLD_USBPD_VCONN1_CHANGED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_CC1_CHANGED_MASK__OFFSET, 0x00000002
.set CYFLD_USBPD_CC1_CHANGED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_CC2_CHANGED_MASK__OFFSET, 0x00000003
.set CYFLD_USBPD_CC2_CHANGED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_VCMP_LA_CHANGED_MASK__OFFSET, 0x00000004
.set CYFLD_USBPD_VCMP_LA_CHANGED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_VCMP_UP_CHANGED_MASK__OFFSET, 0x00000005
.set CYFLD_USBPD_VCMP_UP_CHANGED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_VCMP_DN_CHANGED_MASK__OFFSET, 0x00000006
.set CYFLD_USBPD_VCMP_DN_CHANGED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_V5V_CHANGED_MASK__OFFSET, 0x00000007
.set CYFLD_USBPD_V5V_CHANGED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_CMP_OUT1_CHANGED_MASK__OFFSET, 0x00000008
.set CYFLD_USBPD_CMP_OUT1_CHANGED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_CMP_OUT2_CHANGED_MASK__OFFSET, 0x00000009
.set CYFLD_USBPD_CMP_OUT2_CHANGED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_HPDIN_CHANGED_MASK__OFFSET, 0x0000000a
.set CYFLD_USBPD_HPDIN_CHANGED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_SPARE6_MASK__OFFSET, 0x0000000b
.set CYFLD_USBPD_SPARE6_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_SPARE7_MASK__OFFSET, 0x0000000c
.set CYFLD_USBPD_SPARE7_MASK__SIZE, 0x00000001
.set CYREG_USBPD_INTR0_MASKED, 0x400a0130
.set CYFLD_USBPD_RCV_GOOD_PACKET_COMPLETE_MASKED__OFFSET, 0x00000000
.set CYFLD_USBPD_RCV_GOOD_PACKET_COMPLETE_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_RCV_BAD_PACKET_COMPLETE_MASKED__OFFSET, 0x00000001
.set CYFLD_USBPD_RCV_BAD_PACKET_COMPLETE_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_RX_SOP_MASKED__OFFSET, 0x00000002
.set CYFLD_USBPD_RX_SOP_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_RCV_GOODCRC_MSG_COMPLETE_MASKED__OFFSET, 0x00000003
.set CYFLD_USBPD_RCV_GOODCRC_MSG_COMPLETE_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_RCV_EXPT_GOODCRC_MSG_COMPLETE_MASKED__OFFSET, 0x00000004
.set CYFLD_USBPD_RCV_EXPT_GOODCRC_MSG_COMPLETE_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_EOP_ERROR_MASKED__OFFSET, 0x00000005
.set CYFLD_USBPD_EOP_ERROR_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_RX_OVER_RUN_MASKED__OFFSET, 0x00000006
.set CYFLD_USBPD_RX_OVER_RUN_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_TX_PACKET_DONE_MASKED__OFFSET, 0x00000007
.set CYFLD_USBPD_TX_PACKET_DONE_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_TX_HARD_RST_DONE_MASKED__OFFSET, 0x00000008
.set CYFLD_USBPD_TX_HARD_RST_DONE_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_RCV_RST_MASKED__OFFSET, 0x00000009
.set CYFLD_USBPD_RCV_RST_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_SAR1_DONE_MASKED__OFFSET, 0x0000000a
.set CYFLD_USBPD_SAR1_DONE_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_TX_GOODCRC_MSG_DONE_MASKED__OFFSET, 0x0000000b
.set CYFLD_USBPD_TX_GOODCRC_MSG_DONE_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_CC_VALID_DATA_DETECTED_MASKED__OFFSET, 0x0000000c
.set CYFLD_USBPD_CC_VALID_DATA_DETECTED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_CC_NO_VALID_DATA_DETECTED_MASKED__OFFSET, 0x0000000d
.set CYFLD_USBPD_CC_NO_VALID_DATA_DETECTED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_CRC_RX_TIMER_EXP_MASKED__OFFSET, 0x0000000e
.set CYFLD_USBPD_CRC_RX_TIMER_EXP_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_COLLISION_TYPE1_MASKED__OFFSET, 0x0000000f
.set CYFLD_USBPD_COLLISION_TYPE1_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_COLLISION_TYPE2_MASKED__OFFSET, 0x00000010
.set CYFLD_USBPD_COLLISION_TYPE2_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_COLLISION_TYPE3_MASKED__OFFSET, 0x00000011
.set CYFLD_USBPD_COLLISION_TYPE3_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_COLLISION_TYPE4_MASKED__OFFSET, 0x00000012
.set CYFLD_USBPD_COLLISION_TYPE4_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_CMP_OUT1_DET_MASKED__OFFSET, 0x00000013
.set CYFLD_USBPD_CMP_OUT1_DET_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_TX_SRAM_HALF_END_MASKED__OFFSET, 0x00000014
.set CYFLD_USBPD_TX_SRAM_HALF_END_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_RX_SRAM_HALF_END_MASKED__OFFSET, 0x00000015
.set CYFLD_USBPD_RX_SRAM_HALF_END_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_TX_RETRY_ENABLE_CLRD_MASKED__OFFSET, 0x00000016
.set CYFLD_USBPD_TX_RETRY_ENABLE_CLRD_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_KCHAR_ERROR_MASKED__OFFSET, 0x00000017
.set CYFLD_USBPD_KCHAR_ERROR_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_TX_CC_DATA_OEN_ASSERT_MASKED__OFFSET, 0x00000018
.set CYFLD_USBPD_TX_CC_DATA_OEN_ASSERT_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_TX_CC_DATA_OEN_DEASSERT_MASKED__OFFSET, 0x00000019
.set CYFLD_USBPD_TX_CC_DATA_OEN_DEASSERT_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_TX_REGULATOR_ENABLED_MASKED__OFFSET, 0x0000001a
.set CYFLD_USBPD_TX_REGULATOR_ENABLED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_TX_STATE_IDLE_MASKED__OFFSET, 0x0000001b
.set CYFLD_USBPD_TX_STATE_IDLE_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_RX_STATE_IDLE_MASKED__OFFSET, 0x0000001c
.set CYFLD_USBPD_RX_STATE_IDLE_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_SAR2_DONE_MASKED__OFFSET, 0x0000001d
.set CYFLD_USBPD_SAR2_DONE_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_CMP_OUT2_DET_MASKED__OFFSET, 0x0000001e
.set CYFLD_USBPD_CMP_OUT2_DET_MASKED__SIZE, 0x00000001
.set CYREG_USBPD_INTR1_MASKED, 0x400a0134
.set CYFLD_USBPD_VCONN1_CHANGED_MASKED__OFFSET, 0x00000000
.set CYFLD_USBPD_VCONN1_CHANGED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_CC1_CHANGED_MASKED__OFFSET, 0x00000002
.set CYFLD_USBPD_CC1_CHANGED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_CC2_CHANGED_MASKED__OFFSET, 0x00000003
.set CYFLD_USBPD_CC2_CHANGED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_VCMP_LA_CHANGED_MASKED__OFFSET, 0x00000004
.set CYFLD_USBPD_VCMP_LA_CHANGED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_VCMP_UP_CHANGED_MASKED__OFFSET, 0x00000005
.set CYFLD_USBPD_VCMP_UP_CHANGED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_VCMP_DN_CHANGED_MASKED__OFFSET, 0x00000006
.set CYFLD_USBPD_VCMP_DN_CHANGED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_V5V_CHANGED_MASKED__OFFSET, 0x00000007
.set CYFLD_USBPD_V5V_CHANGED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_CMP_OUT1_CHANGED_MASKED__OFFSET, 0x00000008
.set CYFLD_USBPD_CMP_OUT1_CHANGED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_CMP_OUT2_CHANGED_MASKED__OFFSET, 0x00000009
.set CYFLD_USBPD_CMP_OUT2_CHANGED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_HPDIN_CHANGED_MASKED__OFFSET, 0x0000000a
.set CYFLD_USBPD_HPDIN_CHANGED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_SPARE6_MASKED__OFFSET, 0x0000000b
.set CYFLD_USBPD_SPARE6_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_SPARE7_MASKED__OFFSET, 0x0000000c
.set CYFLD_USBPD_SPARE7_MASKED__SIZE, 0x00000001
.set CYREG_USBPD_DEBUG_CTRL, 0x400a0138
.set CYFLD_USBPD_RESET_RX__OFFSET, 0x00000000
.set CYFLD_USBPD_RESET_RX__SIZE, 0x00000001
.set CYFLD_USBPD_RX_MSG_CAL_STATE__OFFSET, 0x00000001
.set CYFLD_USBPD_RX_MSG_CAL_STATE__SIZE, 0x00000003
.set CYVAL_USBPD_RX_MSG_CAL_STATE_MSGSM_IDLE, 0x00000000
.set CYVAL_USBPD_RX_MSG_CAL_STATE_MSGSM_PRE_HDR, 0x00000001
.set CYVAL_USBPD_RX_MSG_CAL_STATE_MSGSM_HDR, 0x00000002
.set CYVAL_USBPD_RX_MSG_CAL_STATE_MSGSM_DATA, 0x00000003
.set CYVAL_USBPD_RX_MSG_CAL_STATE_MSGSM_CRC, 0x00000004
.set CYVAL_USBPD_RX_MSG_CAL_STATE_MSGSM_EOP, 0x00000005
.set CYVAL_USBPD_RX_MSG_CAL_STATE_MSGSM_STAT, 0x00000006
.set CYFLD_USBPD_RESET_TX__OFFSET, 0x00000008
.set CYFLD_USBPD_RESET_TX__SIZE, 0x00000001
.set CYFLD_USBPD_TX_MSG_STATE__OFFSET, 0x00000009
.set CYFLD_USBPD_TX_MSG_STATE__SIZE, 0x00000003
.set CYVAL_USBPD_TX_MSG_STATE_MSG_IDLE, 0x00000000
.set CYVAL_USBPD_TX_MSG_STATE_MSG_CAL, 0x00000001
.set CYVAL_USBPD_TX_MSG_STATE_MSG_SYN, 0x00000002
.set CYVAL_USBPD_TX_MSG_STATE_MSG_DOBJ, 0x00000003
.set CYVAL_USBPD_TX_MSG_STATE_MSG_CRC, 0x00000004
.set CYVAL_USBPD_TX_MSG_STATE_MSG_EOP, 0x00000005
.set CYVAL_USBPD_TX_MSG_STATE_MSG_RST, 0x00000006
.set CYVAL_USBPD_TX_MSG_STATE_MSG_BIDLE, 0x00000007
.set CYFLD_USBPD_TX_SRC_SEL_STATE__OFFSET, 0x0000000d
.set CYFLD_USBPD_TX_SRC_SEL_STATE__SIZE, 0x00000003
.set CYVAL_USBPD_TX_SRC_SEL_STATE_IDLE_SEL, 0x00000000
.set CYVAL_USBPD_TX_SRC_SEL_STATE_CAL_SEL, 0x00000001
.set CYVAL_USBPD_TX_SRC_SEL_STATE_SYN_SEL, 0x00000002
.set CYVAL_USBPD_TX_SRC_SEL_STATE_KCHAR_SEL, 0x00000003
.set CYVAL_USBPD_TX_SRC_SEL_STATE_EOP_SEL, 0x00000004
.set CYVAL_USBPD_TX_SRC_SEL_STATE_RST_SEL, 0x00000005
.set CYFLD_USBPD_TX_PREAMBLE_CNT__OFFSET, 0x00000010
.set CYFLD_USBPD_TX_PREAMBLE_CNT__SIZE, 0x00000006
.set CYFLD_USBPD_EOP_VALUE__OFFSET, 0x00000016
.set CYFLD_USBPD_EOP_VALUE__SIZE, 0x00000005
.set CYFLD_USBPD_ENABLE_EXIT_ON_EOP__OFFSET, 0x0000001b
.set CYFLD_USBPD_ENABLE_EXIT_ON_EOP__SIZE, 0x00000001
.set CYREG_USBPD_DEBUG_CC_0, 0x400a013c
.set CYFLD_USBPD_TX_FIRST_BIT_LEVEL__OFFSET, 0x00000000
.set CYFLD_USBPD_TX_FIRST_BIT_LEVEL__SIZE, 0x00000001
.set CYFLD_USBPD_LOOP_BACK_NO_BMC__OFFSET, 0x00000001
.set CYFLD_USBPD_LOOP_BACK_NO_BMC__SIZE, 0x00000001
.set CYFLD_USBPD_LOOP_BACK_WITH_BMC__OFFSET, 0x00000002
.set CYFLD_USBPD_LOOP_BACK_WITH_BMC__SIZE, 0x00000001
.set CYFLD_USBPD_EXT_LOOP_BACK__OFFSET, 0x00000003
.set CYFLD_USBPD_EXT_LOOP_BACK__SIZE, 0x00000001
.set CYFLD_USBPD_RX_CLEAR__OFFSET, 0x00000004
.set CYFLD_USBPD_RX_CLEAR__SIZE, 0x00000001
.set CYFLD_USBPD_TX_CLEAR__OFFSET, 0x00000005
.set CYFLD_USBPD_TX_CLEAR__SIZE, 0x00000001
.set CYFLD_USBPD_TX_CC_DRIVE_SRC__OFFSET, 0x00000006
.set CYFLD_USBPD_TX_CC_DRIVE_SRC__SIZE, 0x00000001
.set CYFLD_USBPD_TX_CC_DATA__OFFSET, 0x00000007
.set CYFLD_USBPD_TX_CC_DATA__SIZE, 0x00000001
.set CYFLD_USBPD_DEBUG_SEL__OFFSET, 0x00000008
.set CYFLD_USBPD_DEBUG_SEL__SIZE, 0x00000005
.set CYFLD_USBPD_RX_CC_DATA_VALID_DIS__OFFSET, 0x0000000d
.set CYFLD_USBPD_RX_CC_DATA_VALID_DIS__SIZE, 0x00000001
.set CYFLD_USBPD_TX_DELAY_FALLN_RISE__OFFSET, 0x0000000e
.set CYFLD_USBPD_TX_DELAY_FALLN_RISE__SIZE, 0x00000001
.set CYFLD_USBPD_TX_DELAY_VALUE__OFFSET, 0x0000000f
.set CYFLD_USBPD_TX_DELAY_VALUE__SIZE, 0x00000004
.set CYFLD_USBPD_DEBUG_OUT__OFFSET, 0x00000014
.set CYFLD_USBPD_DEBUG_OUT__SIZE, 0x00000008
.set CYFLD_USBPD_IREF_SEL__OFFSET, 0x0000001c
.set CYFLD_USBPD_IREF_SEL__SIZE, 0x00000001
.set CYFLD_USBPD_DISABLE_BIST_EOP__OFFSET, 0x0000001d
.set CYFLD_USBPD_DISABLE_BIST_EOP__SIZE, 0x00000001
.set CYFLD_USBPD_VBUS_C_SWAP_SOURCE_SEL__OFFSET, 0x0000001e
.set CYFLD_USBPD_VBUS_C_SWAP_SOURCE_SEL__SIZE, 0x00000001
.set CYFLD_USBPD_CSA_BW_1__OFFSET, 0x0000001f
.set CYFLD_USBPD_CSA_BW_1__SIZE, 0x00000001
.set CYREG_USBPD_DEBUG_CC_1, 0x400a0140
.set CYFLD_USBPD_NUM_PREAMBLE_AVG__OFFSET, 0x00000000
.set CYFLD_USBPD_NUM_PREAMBLE_AVG__SIZE, 0x00000003
.set CYVAL_USBPD_NUM_PREAMBLE_AVG_FOUR_PREAM_AVG0, 0x00000000
.set CYVAL_USBPD_NUM_PREAMBLE_AVG_FOUR_PREAM_AVG1, 0x00000001
.set CYVAL_USBPD_NUM_PREAMBLE_AVG_FOUR_PREAM_AVG2, 0x00000002
.set CYVAL_USBPD_NUM_PREAMBLE_AVG_EIGHT_PREAM_AVG, 0x00000003
.set CYVAL_USBPD_NUM_PREAMBLE_AVG_SIXTEEN_PREAM_AVG, 0x00000004
.set CYVAL_USBPD_NUM_PREAMBLE_AVG_THIRTY_TWO_PREAM_AVG, 0x00000005
.set CYVAL_USBPD_NUM_PREAMBLE_AVG_RESERVED6_PREAM_AVG, 0x00000006
.set CYVAL_USBPD_NUM_PREAMBLE_AVG_RESERVED7_PREAM_AVG, 0x00000007
.set CYFLD_USBPD_NUM_TRANS_AVG__OFFSET, 0x00000003
.set CYFLD_USBPD_NUM_TRANS_AVG__SIZE, 0x00000006
.set CYFLD_USBPD_RX_DISABLE_AUTO_ADJ__OFFSET, 0x00000009
.set CYFLD_USBPD_RX_DISABLE_AUTO_ADJ__SIZE, 0x00000001
.set CYFLD_USBPD_RX_UI_PERIOD__OFFSET, 0x0000000a
.set CYFLD_USBPD_RX_UI_PERIOD__SIZE, 0x00000008
.set CYFLD_USBPD_SPARE2__OFFSET, 0x00000012
.set CYFLD_USBPD_SPARE2__SIZE, 0x0000000b
.set CYREG_USBPD_DEBUG_CC_2, 0x400a0144
.set CYFLD_USBPD_RX_DELTA_POLARITY__OFFSET, 0x00000000
.set CYFLD_USBPD_RX_DELTA_POLARITY__SIZE, 0x00000001
.set CYFLD_USBPD_DIS_CC_MON_AUTO_CRC__OFFSET, 0x00000001
.set CYFLD_USBPD_DIS_CC_MON_AUTO_CRC__SIZE, 0x00000001
.set CYFLD_USBPD_RESET_RX_ON_EOP__OFFSET, 0x00000002
.set CYFLD_USBPD_RESET_RX_ON_EOP__SIZE, 0x00000001
.set CYFLD_USBPD_RX_IGNR_TRANS_NUM__OFFSET, 0x00000006
.set CYFLD_USBPD_RX_IGNR_TRANS_NUM__SIZE, 0x00000006
.set CYFLD_USBPD_EXPECTED_HEADER_MASK__OFFSET, 0x00000010
.set CYFLD_USBPD_EXPECTED_HEADER_MASK__SIZE, 0x00000010
.set CYREG_USBPD_DEBUG_SPARE_INTR_CFG, 0x400a0148
.set CYFLD_USBPD_SPARE6_CFG__OFFSET, 0x00000000
.set CYFLD_USBPD_SPARE6_CFG__SIZE, 0x00000002
.set CYVAL_USBPD_SPARE6_CFG_POS_EDG_DIS_NEG_EDG_DIS, 0x00000000
.set CYVAL_USBPD_SPARE6_CFG_POS_EDG_DIS_NEG_EDG_EN, 0x00000001
.set CYVAL_USBPD_SPARE6_CFG_POS_EDG_EN_NEG_EDG_DIS, 0x00000002
.set CYVAL_USBPD_SPARE6_CFG_POS_EDG_EN_NEG_EDG_EN, 0x00000003
.set CYFLD_USBPD_SPARE6_FILT_EN__OFFSET, 0x00000002
.set CYFLD_USBPD_SPARE6_FILT_EN__SIZE, 0x00000001
.set CYFLD_USBPD_SPARE6_FILT_SEL__OFFSET, 0x00000003
.set CYFLD_USBPD_SPARE6_FILT_SEL__SIZE, 0x00000003
.set CYFLD_USBPD_SPARE7_CFG__OFFSET, 0x00000006
.set CYFLD_USBPD_SPARE7_CFG__SIZE, 0x00000002
.set CYVAL_USBPD_SPARE7_CFG_POS_EDG_DIS_NEG_EDG_DIS, 0x00000000
.set CYVAL_USBPD_SPARE7_CFG_POS_EDG_DIS_NEG_EDG_EN, 0x00000001
.set CYVAL_USBPD_SPARE7_CFG_POS_EDG_EN_NEG_EDG_DIS, 0x00000002
.set CYVAL_USBPD_SPARE7_CFG_POS_EDG_EN_NEG_EDG_EN, 0x00000003
.set CYFLD_USBPD_SPARE7_FILT_EN__OFFSET, 0x00000008
.set CYFLD_USBPD_SPARE7_FILT_EN__SIZE, 0x00000001
.set CYFLD_USBPD_SPARE7_FILT_SEL__OFFSET, 0x00000009
.set CYFLD_USBPD_SPARE7_FILT_SEL__SIZE, 0x00000003
.set CYREG_USBPD_INTR2, 0x400a014c
.set CYFLD_USBPD_UI_CAL_DONE__OFFSET, 0x00000000
.set CYFLD_USBPD_UI_CAL_DONE__SIZE, 0x00000001
.set CYFLD_USBPD_PULSE_MIN_VIOLATED__OFFSET, 0x00000001
.set CYFLD_USBPD_PULSE_MIN_VIOLATED__SIZE, 0x00000001
.set CYFLD_USBPD_PULSE_MAX_VIOLATED__OFFSET, 0x00000002
.set CYFLD_USBPD_PULSE_MAX_VIOLATED__SIZE, 0x00000001
.set CYFLD_USBPD_HPD_IRQ__OFFSET, 0x00000003
.set CYFLD_USBPD_HPD_IRQ__SIZE, 0x00000001
.set CYFLD_USBPD_HPD_PLUGED__OFFSET, 0x00000004
.set CYFLD_USBPD_HPD_PLUGED__SIZE, 0x00000001
.set CYFLD_USBPD_HPD_UNPLUGED__OFFSET, 0x00000005
.set CYFLD_USBPD_HPD_UNPLUGED__SIZE, 0x00000001
.set CYFLD_USBPD_HPD_UNSTABLE__OFFSET, 0x00000006
.set CYFLD_USBPD_HPD_UNSTABLE__SIZE, 0x00000001
.set CYFLD_USBPD_HPD_QUEUE__OFFSET, 0x00000007
.set CYFLD_USBPD_HPD_QUEUE__SIZE, 0x00000001
.set CYFLD_USBPD_HPDT_COMMAND_DONE__OFFSET, 0x00000008
.set CYFLD_USBPD_HPDT_COMMAND_DONE__SIZE, 0x00000001
.set CYFLD_USBPD_EXTENDED_MSG_DET__OFFSET, 0x00000009
.set CYFLD_USBPD_EXTENDED_MSG_DET__SIZE, 0x00000001
.set CYFLD_USBPD_CHUNK_DET__OFFSET, 0x0000000a
.set CYFLD_USBPD_CHUNK_DET__SIZE, 0x00000001
.set CYFLD_USBPD_RX_SRAM_OVER_FLOW__OFFSET, 0x0000000b
.set CYFLD_USBPD_RX_SRAM_OVER_FLOW__SIZE, 0x00000001
.set CYFLD_USBPD_TX_SRAM_UNDER_FLOW__OFFSET, 0x0000000c
.set CYFLD_USBPD_TX_SRAM_UNDER_FLOW__SIZE, 0x00000001
.set CYFLD_USBPD_SPARE3__OFFSET, 0x0000000d
.set CYFLD_USBPD_SPARE3__SIZE, 0x00000001
.set CYFLD_USBPD_SPARE4__OFFSET, 0x0000000e
.set CYFLD_USBPD_SPARE4__SIZE, 0x00000001
.set CYFLD_USBPD_SPARE5__OFFSET, 0x0000000f
.set CYFLD_USBPD_SPARE5__SIZE, 0x00000001
.set CYFLD_USBPD_NGDO_C_SPACING_DONE__OFFSET, 0x00000010
.set CYFLD_USBPD_NGDO_C_SPACING_DONE__SIZE, 0x00000001
.set CYFLD_USBPD_NGDO_P_SPACING_DONE__OFFSET, 0x00000011
.set CYFLD_USBPD_NGDO_P_SPACING_DONE__SIZE, 0x00000001
.set CYFLD_USBPD_VREG20V_SWITCH_DONE__OFFSET, 0x00000012
.set CYFLD_USBPD_VREG20V_SWITCH_DONE__SIZE, 0x00000001
.set CYFLD_USBPD_VDDD_SW_SWITCH_DONE__OFFSET, 0x00000013
.set CYFLD_USBPD_VDDD_SW_SWITCH_DONE__SIZE, 0x00000001
.set CYFLD_USBPD_VSWAP_VBUS_LESS_5_DONE__OFFSET, 0x00000014
.set CYFLD_USBPD_VSWAP_VBUS_LESS_5_DONE__SIZE, 0x00000001
.set CYFLD_USBPD_SWAP_IRQ__OFFSET, 0x00000015
.set CYFLD_USBPD_SWAP_IRQ__SIZE, 0x00000001
.set CYFLD_USBPD_SWAP_PLUGED__OFFSET, 0x00000016
.set CYFLD_USBPD_SWAP_PLUGED__SIZE, 0x00000001
.set CYFLD_USBPD_SWAP_UNPLUGED__OFFSET, 0x00000017
.set CYFLD_USBPD_SWAP_UNPLUGED__SIZE, 0x00000001
.set CYFLD_USBPD_SWAP_UNSTABLE__OFFSET, 0x00000018
.set CYFLD_USBPD_SWAP_UNSTABLE__SIZE, 0x00000001
.set CYFLD_USBPD_SWAP_QUEUE__OFFSET, 0x00000019
.set CYFLD_USBPD_SWAP_QUEUE__SIZE, 0x00000001
.set CYFLD_USBPD_SWAP_COMMAND_DONE__OFFSET, 0x0000001a
.set CYFLD_USBPD_SWAP_COMMAND_DONE__SIZE, 0x00000001
.set CYREG_USBPD_INTR2_SET, 0x400a0150
.set CYREG_USBPD_INTR2_MASK, 0x400a0154
.set CYFLD_USBPD_UI_CAL_DONE_MASK__OFFSET, 0x00000000
.set CYFLD_USBPD_UI_CAL_DONE_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_PULSE_MIN_VIOLATED_MASK__OFFSET, 0x00000001
.set CYFLD_USBPD_PULSE_MIN_VIOLATED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_PULSE_MAX_VIOLATED_MASK__OFFSET, 0x00000002
.set CYFLD_USBPD_PULSE_MAX_VIOLATED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_HPD_IRQ_MASK__OFFSET, 0x00000003
.set CYFLD_USBPD_HPD_IRQ_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_HPD_PLUGED_MASK__OFFSET, 0x00000004
.set CYFLD_USBPD_HPD_PLUGED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_HPD_UNPLUGED_MASK__OFFSET, 0x00000005
.set CYFLD_USBPD_HPD_UNPLUGED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_HPD_UNSTABLE_MASK__OFFSET, 0x00000006
.set CYFLD_USBPD_HPD_UNSTABLE_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_HPD_QUEUE_MASK__OFFSET, 0x00000007
.set CYFLD_USBPD_HPD_QUEUE_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_HPDT_COMMAND_DONE_MASK__OFFSET, 0x00000008
.set CYFLD_USBPD_HPDT_COMMAND_DONE_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_EXTENDED_MSG_DET_MASK__OFFSET, 0x00000009
.set CYFLD_USBPD_EXTENDED_MSG_DET_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_CHUNK_DET_MASK__OFFSET, 0x0000000a
.set CYFLD_USBPD_CHUNK_DET_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_RX_SRAM_OVER_FLOW_MASK__OFFSET, 0x0000000b
.set CYFLD_USBPD_RX_SRAM_OVER_FLOW_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_TX_SRAM_UNDER_FLOW_MASK__OFFSET, 0x0000000c
.set CYFLD_USBPD_TX_SRAM_UNDER_FLOW_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_SPARE3_MASK__OFFSET, 0x0000000d
.set CYFLD_USBPD_SPARE3_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_SPARE4_MASK__OFFSET, 0x0000000e
.set CYFLD_USBPD_SPARE4_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_SPARE5_MASK__OFFSET, 0x0000000f
.set CYFLD_USBPD_SPARE5_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_NGDO_C_SPACING_DONE_MASK__OFFSET, 0x00000010
.set CYFLD_USBPD_NGDO_C_SPACING_DONE_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_NGDO_P_SPACING_DONE_MASK__OFFSET, 0x00000011
.set CYFLD_USBPD_NGDO_P_SPACING_DONE_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_VREG20V_SWITCH_DONE_MASK__OFFSET, 0x00000012
.set CYFLD_USBPD_VREG20V_SWITCH_DONE_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_VDDD_SW_SWITCH_DONE_MASK__OFFSET, 0x00000013
.set CYFLD_USBPD_VDDD_SW_SWITCH_DONE_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_VSWAP_VBUS_LESS_5_DONE_MASK__OFFSET, 0x00000014
.set CYFLD_USBPD_VSWAP_VBUS_LESS_5_DONE_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_SWAP_IRQ_MASK__OFFSET, 0x00000015
.set CYFLD_USBPD_SWAP_IRQ_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_SWAP_PLUGED_MASK__OFFSET, 0x00000016
.set CYFLD_USBPD_SWAP_PLUGED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_SWAP_UNPLUGED_MASK__OFFSET, 0x00000017
.set CYFLD_USBPD_SWAP_UNPLUGED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_SWAP_UNSTABLE_MASK__OFFSET, 0x00000018
.set CYFLD_USBPD_SWAP_UNSTABLE_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_SWAP_QUEUE_MASK__OFFSET, 0x00000019
.set CYFLD_USBPD_SWAP_QUEUE_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_SWAP_COMMAND_DONE_MASK__OFFSET, 0x0000001a
.set CYFLD_USBPD_SWAP_COMMAND_DONE_MASK__SIZE, 0x00000001
.set CYREG_USBPD_INTR2_MASKED, 0x400a0158
.set CYFLD_USBPD_UI_CAL_DONE_MASKED__OFFSET, 0x00000000
.set CYFLD_USBPD_UI_CAL_DONE_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_PULSE_MIN_VIOLATED_MASKED__OFFSET, 0x00000001
.set CYFLD_USBPD_PULSE_MIN_VIOLATED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_PULSE_MAX_VIOLATED_MASKED__OFFSET, 0x00000002
.set CYFLD_USBPD_PULSE_MAX_VIOLATED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_HPD_IRQ_MASKED__OFFSET, 0x00000003
.set CYFLD_USBPD_HPD_IRQ_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_HPD_PLUGED_MASKED__OFFSET, 0x00000004
.set CYFLD_USBPD_HPD_PLUGED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_HPD_UNPLUGED_MASKED__OFFSET, 0x00000005
.set CYFLD_USBPD_HPD_UNPLUGED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_HPD_UNSTABLE_MASKED__OFFSET, 0x00000006
.set CYFLD_USBPD_HPD_UNSTABLE_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_HPD_QUEUE_MASKED__OFFSET, 0x00000007
.set CYFLD_USBPD_HPD_QUEUE_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_HPDT_COMMAND_DONE_MASKED__OFFSET, 0x00000008
.set CYFLD_USBPD_HPDT_COMMAND_DONE_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_EXTENDED_MSG_DET_MASKED__OFFSET, 0x00000009
.set CYFLD_USBPD_EXTENDED_MSG_DET_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_CHUNK_DET_MASKED__OFFSET, 0x0000000a
.set CYFLD_USBPD_CHUNK_DET_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_RX_SRAM_OVER_FLOW_MASKED__OFFSET, 0x0000000b
.set CYFLD_USBPD_RX_SRAM_OVER_FLOW_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_TX_SRAM_UNDER_FLOW_MASKED__OFFSET, 0x0000000c
.set CYFLD_USBPD_TX_SRAM_UNDER_FLOW_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_SPARE3_MASKED__OFFSET, 0x0000000d
.set CYFLD_USBPD_SPARE3_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_SPARE4_MASKED__OFFSET, 0x0000000e
.set CYFLD_USBPD_SPARE4_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_SPARE5_MASKED__OFFSET, 0x0000000f
.set CYFLD_USBPD_SPARE5_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_NGDO_C_SPACING_DONE_MASKED__OFFSET, 0x00000010
.set CYFLD_USBPD_NGDO_C_SPACING_DONE_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_NGDO_P_SPACING_DONE_MASKED__OFFSET, 0x00000011
.set CYFLD_USBPD_NGDO_P_SPACING_DONE_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_VREG20V_SWITCH_DONE_MASKED__OFFSET, 0x00000012
.set CYFLD_USBPD_VREG20V_SWITCH_DONE_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_VDDD_SW_SWITCH_DONE_MASKED__OFFSET, 0x00000013
.set CYFLD_USBPD_VDDD_SW_SWITCH_DONE_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_VSWAP_VBUS_LESS_5_DONE_MASKED__OFFSET, 0x00000014
.set CYFLD_USBPD_VSWAP_VBUS_LESS_5_DONE_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_SWAP_IRQ_MASKED__OFFSET, 0x00000015
.set CYFLD_USBPD_SWAP_IRQ_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_SWAP_PLUGED_MASKED__OFFSET, 0x00000016
.set CYFLD_USBPD_SWAP_PLUGED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_SWAP_UNPLUGED_MASKED__OFFSET, 0x00000017
.set CYFLD_USBPD_SWAP_UNPLUGED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_SWAP_UNSTABLE_MASKED__OFFSET, 0x00000018
.set CYFLD_USBPD_SWAP_UNSTABLE_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_SWAP_QUEUE_MASKED__OFFSET, 0x00000019
.set CYFLD_USBPD_SWAP_QUEUE_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_SWAP_COMMAND_DONE_MASKED__OFFSET, 0x0000001a
.set CYFLD_USBPD_SWAP_COMMAND_DONE_MASKED__SIZE, 0x00000001
.set CYREG_USBPD_HPD_CTRL1, 0x400a015c
.set CYFLD_USBPD_IRQ_MIN__OFFSET, 0x00000000
.set CYFLD_USBPD_IRQ_MIN__SIZE, 0x0000000c
.set CYFLD_USBPD_IRQ_MAX__OFFSET, 0x0000000c
.set CYFLD_USBPD_IRQ_MAX__SIZE, 0x0000000c
.set CYFLD_USBPD_FLUSH_QUEUE__OFFSET, 0x00000018
.set CYFLD_USBPD_FLUSH_QUEUE__SIZE, 0x00000001
.set CYFLD_USBPD_LOOPBACK_EN__OFFSET, 0x0000001e
.set CYFLD_USBPD_LOOPBACK_EN__SIZE, 0x00000001
.set CYFLD_USBPD_RESET_HPD_STATE__OFFSET, 0x0000001f
.set CYFLD_USBPD_RESET_HPD_STATE__SIZE, 0x00000001
.set CYREG_USBPD_HPD_CTRL2, 0x400a0160
.set CYFLD_USBPD_GLITCH_WIDTH_HIGH__OFFSET, 0x00000000
.set CYFLD_USBPD_GLITCH_WIDTH_HIGH__SIZE, 0x0000000c
.set CYFLD_USBPD_GLITCH_WIDTH_LOW__OFFSET, 0x0000000c
.set CYFLD_USBPD_GLITCH_WIDTH_LOW__SIZE, 0x0000000c
.set CYREG_USBPD_HPD_CTRL3, 0x400a0164
.set CYFLD_USBPD_STABLE_HIGH__OFFSET, 0x00000000
.set CYFLD_USBPD_STABLE_HIGH__SIZE, 0x0000000c
.set CYFLD_USBPD_STABLE_LOW__OFFSET, 0x0000000c
.set CYFLD_USBPD_STABLE_LOW__SIZE, 0x0000000c
.set CYREG_USBPD_HPD_CTRL4, 0x400a0168
.set CYFLD_USBPD_IRQ_SPACING__OFFSET, 0x00000000
.set CYFLD_USBPD_IRQ_SPACING__SIZE, 0x0000000c
.set CYREG_USBPD_HPD_CTRL5, 0x400a016c
.set CYFLD_USBPD_LONG_HIGH__OFFSET, 0x00000000
.set CYFLD_USBPD_LONG_HIGH__SIZE, 0x00000010
.set CYFLD_USBPD_LONG_LOW__OFFSET, 0x00000010
.set CYFLD_USBPD_LONG_LOW__SIZE, 0x00000010
.set CYREG_USBPD_HPD_QUEUE, 0x400a0170
.set CYFLD_USBPD_DATA_OUT__OFFSET, 0x00000000
.set CYFLD_USBPD_DATA_OUT__SIZE, 0x00000008
.set CYREG_USBPD_HPDT_CTRL1, 0x400a0174
.set CYFLD_USBPD_IRQ_WIDTH__OFFSET, 0x00000000
.set CYFLD_USBPD_IRQ_WIDTH__SIZE, 0x0000000c
.set CYFLD_USBPD_SET_IRQ_DELAY__OFFSET, 0x0000000c
.set CYFLD_USBPD_SET_IRQ_DELAY__SIZE, 0x0000000c
.set CYFLD_USBPD_DEFAULT_LEVEL__OFFSET, 0x00000018
.set CYFLD_USBPD_DEFAULT_LEVEL__SIZE, 0x00000001
.set CYFLD_USBPD_DATA_SOURCE_SELECT__OFFSET, 0x00000019
.set CYFLD_USBPD_DATA_SOURCE_SELECT__SIZE, 0x00000001
.set CYFLD_USBPD_DATA_SOURCE__OFFSET, 0x0000001a
.set CYFLD_USBPD_DATA_SOURCE__SIZE, 0x00000001
.set CYFLD_USBPD_COMMAND__OFFSET, 0x0000001b
.set CYFLD_USBPD_COMMAND__SIZE, 0x00000002
.set CYFLD_USBPD_COMMAND_START__OFFSET, 0x0000001d
.set CYFLD_USBPD_COMMAND_START__SIZE, 0x00000001
.set CYFLD_USBPD_RESET_HPDT_STATE__OFFSET, 0x0000001e
.set CYFLD_USBPD_RESET_HPDT_STATE__SIZE, 0x00000001
.set CYREG_USBPD_HPDT_CTRL2, 0x400a0178
.set CYFLD_USBPD_SET_LOW_DELAY__OFFSET, 0x00000000
.set CYFLD_USBPD_SET_LOW_DELAY__SIZE, 0x0000000c
.set CYFLD_USBPD_SET_HIGH_DELAY__OFFSET, 0x0000000c
.set CYFLD_USBPD_SET_HIGH_DELAY__SIZE, 0x0000000c
.set CYFLD_USBPD_DEFAULT_OE__OFFSET, 0x00000018
.set CYFLD_USBPD_DEFAULT_OE__SIZE, 0x00000001
.set CYFLD_USBPD_OE_SOURCE_SELECT__OFFSET, 0x00000019
.set CYFLD_USBPD_OE_SOURCE_SELECT__SIZE, 0x00000001
.set CYFLD_USBPD_HPDT_DEBUG_SEL__OFFSET, 0x0000001a
.set CYFLD_USBPD_HPDT_DEBUG_SEL__SIZE, 0x00000002
.set CYFLD_USBPD_HPDT_DEBUG_OUT__OFFSET, 0x0000001c
.set CYFLD_USBPD_HPDT_DEBUG_OUT__SIZE, 0x00000004
.set CYREG_USBPD_SWAP_CTRL0, 0x400a017c
.set CYFLD_USBPD_SWAPT_SOURCE_SEL__OFFSET, 0x00000000
.set CYFLD_USBPD_SWAPT_SOURCE_SEL__SIZE, 0x00000002
.set CYVAL_USBPD_SWAPT_SOURCE_SEL_CPU_SOURCE, 0x00000000
.set CYVAL_USBPD_SWAPT_SOURCE_SEL_GPIO_SOURCE, 0x00000001
.set CYVAL_USBPD_SWAPT_SOURCE_SEL_ADC1_CMP_OUT, 0x00000002
.set CYVAL_USBPD_SWAPT_SOURCE_SEL_ADC2_CMP_OUT, 0x00000003
.set CYFLD_USBPD_SWAPR_SOURCE_SEL__OFFSET, 0x00000002
.set CYFLD_USBPD_SWAPR_SOURCE_SEL__SIZE, 0x00000001
.set CYFLD_USBPD_SWAPT_POLARITY__OFFSET, 0x00000003
.set CYFLD_USBPD_SWAPT_POLARITY__SIZE, 0x00000001
.set CYFLD_USBPD_SWAPT_EN_CC1_PULLDN__OFFSET, 0x00000004
.set CYFLD_USBPD_SWAPT_EN_CC1_PULLDN__SIZE, 0x00000001
.set CYFLD_USBPD_SWAPT_EN_CC2_PULLDN__OFFSET, 0x00000005
.set CYFLD_USBPD_SWAPT_EN_CC2_PULLDN__SIZE, 0x00000001
.set CYFLD_USBPD_SWAPT_TO_GPIO1_EN__OFFSET, 0x00000006
.set CYFLD_USBPD_SWAPT_TO_GPIO1_EN__SIZE, 0x00000001
.set CYFLD_USBPD_SWAPT_TO_GPIO2_EN__OFFSET, 0x00000007
.set CYFLD_USBPD_SWAPT_TO_GPIO2_EN__SIZE, 0x00000001
.set CYFLD_USBPD_SWAP_ENABLED__OFFSET, 0x0000001f
.set CYFLD_USBPD_SWAP_ENABLED__SIZE, 0x00000001
.set CYREG_USBPD_SWAP_CTRL1, 0x400a0180
.set CYFLD_USBPD_RESET_SWAP_STATE__OFFSET, 0x0000001f
.set CYFLD_USBPD_RESET_SWAP_STATE__SIZE, 0x00000001
.set CYREG_USBPD_SWAP_CTRL2, 0x400a0184
.set CYREG_USBPD_SWAP_CTRL3, 0x400a0188
.set CYREG_USBPD_SWAP_CTRL4, 0x400a018c
.set CYREG_USBPD_SWAP_CTRL5, 0x400a0190
.set CYREG_USBPD_SWAP_QUEUE, 0x400a0194
.set CYREG_USBPD_SWAPT_CTRL1, 0x400a0198
.set CYFLD_USBPD_RESET_SWAPT_STATE__OFFSET, 0x0000001e
.set CYFLD_USBPD_RESET_SWAPT_STATE__SIZE, 0x00000001
.set CYREG_USBPD_SWAPT_CTRL2, 0x400a019c
.set CYFLD_USBPD_SWAPT_DEBUG_SEL__OFFSET, 0x0000001a
.set CYFLD_USBPD_SWAPT_DEBUG_SEL__SIZE, 0x00000002
.set CYFLD_USBPD_SWAPT_DEBUG_OUT__OFFSET, 0x0000001c
.set CYFLD_USBPD_SWAPT_DEBUG_OUT__SIZE, 0x00000004
.set CYREG_USBPD_ADC1_SAR_CTRL, 0x400a01a0
.set CYFLD_USBPD_SAR_EN__OFFSET, 0x00000000
.set CYFLD_USBPD_SAR_EN__SIZE, 0x00000001
.set CYFLD_USBPD_MID_VAL__OFFSET, 0x00000008
.set CYFLD_USBPD_MID_VAL__SIZE, 0x00000008
.set CYFLD_USBPD_SAR_OUT__OFFSET, 0x00000010
.set CYFLD_USBPD_SAR_OUT__SIZE, 0x00000008
.set CYFLD_USBPD_INTR_CMP_SEL__OFFSET, 0x00000018
.set CYFLD_USBPD_INTR_CMP_SEL__SIZE, 0x00000002
.set CYVAL_USBPD_INTR_CMP_SEL_DIS_INT0_CMP_OUT_DET_1, 0x00000000
.set CYVAL_USBPD_INTR_CMP_SEL_EN_RISE_EDGE_1, 0x00000001
.set CYVAL_USBPD_INTR_CMP_SEL_EN_FALL_EDGE_1, 0x00000002
.set CYVAL_USBPD_INTR_CMP_SEL_EN_BOTH_EDGE_1, 0x00000003
.set CYFLD_USBPD_CMP_OUT_TO_GPIO_FILT_SEL__OFFSET, 0x0000001a
.set CYFLD_USBPD_CMP_OUT_TO_GPIO_FILT_SEL__SIZE, 0x00000003
.set CYREG_USBPD_ADC1_CTRL, 0x400a01a4
.set CYFLD_USBPD_DAC_CNTRL__OFFSET, 0x00000000
.set CYFLD_USBPD_DAC_CNTRL__SIZE, 0x00000008
.set CYFLD_USBPD_DFT_MUXSEL__OFFSET, 0x00000008
.set CYFLD_USBPD_DFT_MUXSEL__SIZE, 0x00000001
.set CYFLD_USBPD_ADC_ISO_N__OFFSET, 0x00000009
.set CYFLD_USBPD_ADC_ISO_N__SIZE, 0x00000001
.set CYFLD_USBPD_CMP_OUT__OFFSET, 0x0000000f
.set CYFLD_USBPD_CMP_OUT__SIZE, 0x00000001
.set CYFLD_USBPD_VSEL__OFFSET, 0x00000011
.set CYFLD_USBPD_VSEL__SIZE, 0x00000002
.set CYVAL_USBPD_VSEL_ANA_IN1_AMUX_A_1, 0x00000000
.set CYVAL_USBPD_VSEL_ANA_IN2_AMUX_A_1, 0x00000001
.set CYVAL_USBPD_VSEL_BAND_GAP_1, 0x00000002
.set CYVAL_USBPD_VSEL_BJT_1, 0x00000003
.set CYFLD_USBPD_PD_LV__OFFSET, 0x0000001f
.set CYFLD_USBPD_PD_LV__SIZE, 0x00000001
.set CYREG_USBPD_ADC2_SAR_CTRL, 0x400a01a8
.set CYREG_USBPD_ADC2_CTRL, 0x400a01ac
.set CYREG_USBPD_CC_CTRL_0, 0x400a01b0
.set CYFLD_USBPD_TX_EN__OFFSET, 0x00000000
.set CYFLD_USBPD_TX_EN__SIZE, 0x00000001
.set CYFLD_USBPD_RX_EN__OFFSET, 0x00000001
.set CYFLD_USBPD_RX_EN__SIZE, 0x00000001
.set CYFLD_USBPD_CC_1V2__OFFSET, 0x00000002
.set CYFLD_USBPD_CC_1V2__SIZE, 0x00000001
.set CYFLD_USBPD_CMP_EN__OFFSET, 0x00000003
.set CYFLD_USBPD_CMP_EN__SIZE, 0x00000001
.set CYFLD_USBPD_CMP_DN_CC1V2__OFFSET, 0x00000004
.set CYFLD_USBPD_CMP_DN_CC1V2__SIZE, 0x00000001
.set CYFLD_USBPD_CMP_DN_VSEL__OFFSET, 0x00000005
.set CYFLD_USBPD_CMP_DN_VSEL__SIZE, 0x00000003
.set CYVAL_USBPD_CMP_DN_VSEL_SEL_0_2_VOL, 0x00000000
.set CYVAL_USBPD_CMP_DN_VSEL_SEL_0_4_VOL, 0x00000001
.set CYVAL_USBPD_CMP_DN_VSEL_SEL_0_55_VOL, 0x00000002
.set CYVAL_USBPD_CMP_DN_VSEL_SEL_0_655_VOL, 0x00000003
.set CYVAL_USBPD_CMP_DN_VSEL_SEL_0_8_VOL, 0x00000004
.set CYVAL_USBPD_CMP_DN_VSEL_SEL_1_235_VOL, 0x00000005
.set CYVAL_USBPD_CMP_DN_VSEL_SEL_1_575_VOL, 0x00000006
.set CYVAL_USBPD_CMP_DN_VSEL_SEL_2_6_VOL, 0x00000007
.set CYFLD_USBPD_CMP_UP_CC1V2__OFFSET, 0x00000008
.set CYFLD_USBPD_CMP_UP_CC1V2__SIZE, 0x00000001
.set CYFLD_USBPD_CMP_UP_VSEL__OFFSET, 0x00000009
.set CYFLD_USBPD_CMP_UP_VSEL__SIZE, 0x00000003
.set CYVAL_USBPD_CMP_UP_VSEL_SEL_0_2_VOL, 0x00000000
.set CYVAL_USBPD_CMP_UP_VSEL_SEL_0_4_VOL, 0x00000001
.set CYVAL_USBPD_CMP_UP_VSEL_SEL_0_3_VOL, 0x00000002
.set CYVAL_USBPD_CMP_UP_VSEL_SEL_0_655_VOL, 0x00000003
.set CYVAL_USBPD_CMP_UP_VSEL_SEL_0_8_VOL, 0x00000004
.set CYVAL_USBPD_CMP_UP_VSEL_SEL_1_235_VOL, 0x00000005
.set CYVAL_USBPD_CMP_UP_VSEL_SEL_1_575_VOL, 0x00000006
.set CYVAL_USBPD_CMP_UP_VSEL_SEL_2_6_VOL, 0x00000007
.set CYFLD_USBPD_CMP_UP_OFFSET__OFFSET, 0x0000000c
.set CYFLD_USBPD_CMP_UP_OFFSET__SIZE, 0x00000003
.set CYVAL_USBPD_CMP_UP_OFFSET_SEL_MINUS_50_MV, 0x00000000
.set CYVAL_USBPD_CMP_UP_OFFSET_SEL_MINUS_100_MV, 0x00000001
.set CYVAL_USBPD_CMP_UP_OFFSET_SEL_MINUS_150_MV, 0x00000002
.set CYVAL_USBPD_CMP_UP_OFFSET_SEL_MINUS_200_MV, 0x00000003
.set CYVAL_USBPD_CMP_UP_OFFSET_SEL_PLUS_50_MV, 0x00000004
.set CYVAL_USBPD_CMP_UP_OFFSET_SEL_PLUS_100_MV, 0x00000005
.set CYVAL_USBPD_CMP_UP_OFFSET_SEL_PLUS_150_MV, 0x00000006
.set CYVAL_USBPD_CMP_UP_OFFSET_SEL_PLUS_200_MV, 0x00000007
.set CYFLD_USBPD_CMP_UP_OFFSET_EN__OFFSET, 0x0000000f
.set CYFLD_USBPD_CMP_UP_OFFSET_EN__SIZE, 0x00000001
.set CYFLD_USBPD_CMP_LA_CC1V2__OFFSET, 0x00000010
.set CYFLD_USBPD_CMP_LA_CC1V2__SIZE, 0x00000001
.set CYFLD_USBPD_CMP_LA_VSEL__OFFSET, 0x00000011
.set CYFLD_USBPD_CMP_LA_VSEL__SIZE, 0x00000003
.set CYVAL_USBPD_CMP_LA_VSEL_SEL_0_2_VOL, 0x00000000
.set CYVAL_USBPD_CMP_LA_VSEL_SEL_0_4_VOL, 0x00000001
.set CYVAL_USBPD_CMP_LA_VSEL_SEL_0_55_VOL, 0x00000002
.set CYVAL_USBPD_CMP_LA_VSEL_SEL_0_655_VOL, 0x00000003
.set CYVAL_USBPD_CMP_LA_VSEL_SEL_0_8_VOL, 0x00000004
.set CYVAL_USBPD_CMP_LA_VSEL_SEL_1_235_VOL, 0x00000005
.set CYVAL_USBPD_CMP_LA_VSEL_SEL_1_575_VOL, 0x00000006
.set CYVAL_USBPD_CMP_LA_VSEL_SEL_2_6_VOL, 0x00000007
.set CYFLD_USBPD_RD_CC1_DB_DIS__OFFSET, 0x00000014
.set CYFLD_USBPD_RD_CC1_DB_DIS__SIZE, 0x00000001
.set CYFLD_USBPD_RD_CC2_DB_DIS__OFFSET, 0x00000015
.set CYFLD_USBPD_RD_CC2_DB_DIS__SIZE, 0x00000001
.set CYFLD_USBPD_RD_CC1_EN__OFFSET, 0x00000016
.set CYFLD_USBPD_RD_CC1_EN__SIZE, 0x00000001
.set CYFLD_USBPD_RD_CC2_EN__OFFSET, 0x00000017
.set CYFLD_USBPD_RD_CC2_EN__SIZE, 0x00000001
.set CYFLD_USBPD_RP_CC1_EN__OFFSET, 0x00000018
.set CYFLD_USBPD_RP_CC1_EN__SIZE, 0x00000001
.set CYFLD_USBPD_RP_CC2_EN__OFFSET, 0x00000019
.set CYFLD_USBPD_RP_CC2_EN__SIZE, 0x00000001
.set CYFLD_USBPD_RP_MODE__OFFSET, 0x0000001a
.set CYFLD_USBPD_RP_MODE__SIZE, 0x00000002
.set CYVAL_USBPD_RP_MODE_PU0_80_UA, 0x00000000
.set CYVAL_USBPD_RP_MODE_PU1_1p5_A, 0x00000001
.set CYVAL_USBPD_RP_MODE_PU2_80_UA, 0x00000002
.set CYVAL_USBPD_RP_MODE_PU3_3A, 0x00000003
.set CYFLD_USBPD_EN_HYST__OFFSET, 0x0000001c
.set CYFLD_USBPD_EN_HYST__SIZE, 0x00000001
.set CYFLD_USBPD_HYST_MODE__OFFSET, 0x0000001d
.set CYFLD_USBPD_HYST_MODE__SIZE, 0x00000001
.set CYFLD_USBPD_DFP_EN__OFFSET, 0x0000001e
.set CYFLD_USBPD_DFP_EN__SIZE, 0x00000001
.set CYFLD_USBPD_PWR_DISABLE__OFFSET, 0x0000001f
.set CYFLD_USBPD_PWR_DISABLE__SIZE, 0x00000001
.set CYREG_USBPD_CC_CTRL_1, 0x400a01b4
.set CYFLD_USBPD_CC_ADFT_EN__OFFSET, 0x00000000
.set CYFLD_USBPD_CC_ADFT_EN__SIZE, 0x00000001
.set CYFLD_USBPD_CC_ADFT_CTRL__OFFSET, 0x00000001
.set CYFLD_USBPD_CC_ADFT_CTRL__SIZE, 0x00000004
.set CYFLD_USBPD_RX_OFFSET_EN__OFFSET, 0x00000006
.set CYFLD_USBPD_RX_OFFSET_EN__SIZE, 0x00000001
.set CYFLD_USBPD_RX_OFFSET__OFFSET, 0x00000007
.set CYFLD_USBPD_RX_OFFSET__SIZE, 0x00000003
.set CYVAL_USBPD_RX_OFFSET_SEL_MINUS_50_MV, 0x00000000
.set CYVAL_USBPD_RX_OFFSET_SEL_MINUS_100_MV, 0x00000001
.set CYVAL_USBPD_RX_OFFSET_SEL_MINUS_150_MV, 0x00000002
.set CYVAL_USBPD_RX_OFFSET_SEL_MINUS_200_MV, 0x00000003
.set CYVAL_USBPD_RX_OFFSET_SEL_PLUS_50_MV, 0x00000004
.set CYVAL_USBPD_RX_OFFSET_SEL_PLUS_100_MV, 0x00000005
.set CYVAL_USBPD_RX_OFFSET_SEL_PLUS_150_MV, 0x00000006
.set CYVAL_USBPD_RX_OFFSET_SEL_PLUS_200_MV, 0x00000007
.set CYFLD_USBPD_DS_ATTACH_DET_EN__OFFSET, 0x0000000a
.set CYFLD_USBPD_DS_ATTACH_DET_EN__SIZE, 0x00000001
.set CYFLD_USBPD_VTX_SEL__OFFSET, 0x0000000b
.set CYFLD_USBPD_VTX_SEL__SIZE, 0x00000003
.set CYVAL_USBPD_VTX_SEL_SEL_0_93_V, 0x00000000
.set CYVAL_USBPD_VTX_SEL_SEL_1_03_V, 0x00000001
.set CYVAL_USBPD_VTX_SEL_SEL_1_125_V, 0x00000002
.set CYVAL_USBPD_VTX_SEL_SEL_1_225_V, 0x00000003
.set CYVAL_USBPD_VTX_SEL_SEL_1_33_V, 0x00000004
.set CYVAL_USBPD_VTX_SEL_SEL_1_43_V, 0x00000005
.set CYVAL_USBPD_VTX_SEL_SEL_1_53_V, 0x00000006
.set CYVAL_USBPD_VTX_SEL_SEL_1_63_V, 0x00000007
.set CYFLD_USBPD_CC_ISO_N__OFFSET, 0x0000000e
.set CYFLD_USBPD_CC_ISO_N__SIZE, 0x00000001
.set CYREG_USBPD_DPSLP_REF_CTRL, 0x400a01b8
.set CYFLD_USBPD_IGEN_EN__OFFSET, 0x00000000
.set CYFLD_USBPD_IGEN_EN__SIZE, 0x00000001
.set CYFLD_USBPD_DPSLP_ADFT_EN__OFFSET, 0x00000001
.set CYFLD_USBPD_DPSLP_ADFT_EN__SIZE, 0x00000001
.set CYFLD_USBPD_ADFT_CTRL__OFFSET, 0x00000002
.set CYFLD_USBPD_ADFT_CTRL__SIZE, 0x00000001
.set CYFLD_USBPD_PD_DPSLP__OFFSET, 0x00000003
.set CYFLD_USBPD_PD_DPSLP__SIZE, 0x00000001
.set CYFLD_USBPD_PCTAT_CTRL__OFFSET, 0x00000004
.set CYFLD_USBPD_PCTAT_CTRL__SIZE, 0x00000002
.set CYREG_USBPD_VCONN_CTRL, 0x400a01bc
.set CYFLD_USBPD_PUMP_EN__OFFSET, 0x00000000
.set CYFLD_USBPD_PUMP_EN__SIZE, 0x00000001
.set CYFLD_USBPD_EN_COMP1__OFFSET, 0x00000001
.set CYFLD_USBPD_EN_COMP1__SIZE, 0x00000001
.set CYFLD_USBPD_LEAKER_CONFIG1__OFFSET, 0x00000003
.set CYFLD_USBPD_LEAKER_CONFIG1__SIZE, 0x00000003
.set CYVAL_USBPD_LEAKER_CONFIG1_LEAKER_DIS, 0x00000000
.set CYVAL_USBPD_LEAKER_CONFIG1_SEL_200_UA, 0x00000001
.set CYVAL_USBPD_LEAKER_CONFIG1_SEL_0_1_UF, 0x00000002
.set CYVAL_USBPD_LEAKER_CONFIG1_SEL_0_5_UF, 0x00000003
.set CYVAL_USBPD_LEAKER_CONFIG1_SEL_1_UF, 0x00000004
.set CYVAL_USBPD_LEAKER_CONFIG1_SEL_2_UF, 0x00000005
.set CYVAL_USBPD_LEAKER_CONFIG1_SEL_5_UF, 0x00000006
.set CYVAL_USBPD_LEAKER_CONFIG1_SEL_10_UF, 0x00000007
.set CYREG_USBPD_PUMP_CTRL, 0x400a01c0
.set CYFLD_USBPD_ADFT__OFFSET, 0x00000000
.set CYFLD_USBPD_ADFT__SIZE, 0x00000002
.set CYFLD_USBPD_BYPASS_LV__OFFSET, 0x00000002
.set CYFLD_USBPD_BYPASS_LV__SIZE, 0x00000001
.set CYFLD_USBPD_CLK_SEL__OFFSET, 0x00000003
.set CYFLD_USBPD_CLK_SEL__SIZE, 0x00000001
.set CYFLD_USBPD_PD_PUMP__OFFSET, 0x00000004
.set CYFLD_USBPD_PD_PUMP__SIZE, 0x00000001
.set CYREG_USBPD_PFET300_CTRL, 0x400a01c4
.set CYFLD_USBPD_EN_COMP__OFFSET, 0x00000000
.set CYFLD_USBPD_EN_COMP__SIZE, 0x00000001
.set CYFLD_USBPD_EN_SWITCH_CC1__OFFSET, 0x00000001
.set CYFLD_USBPD_EN_SWITCH_CC1__SIZE, 0x00000001
.set CYFLD_USBPD_EN_SWITCH_CC2__OFFSET, 0x00000002
.set CYFLD_USBPD_EN_SWITCH_CC2__SIZE, 0x00000001
.set CYREG_USBPD_UVOV_CTRL, 0x400a01c8
.set CYFLD_USBPD_UV_IN__OFFSET, 0x00000000
.set CYFLD_USBPD_UV_IN__SIZE, 0x00000006
.set CYFLD_USBPD_OV_IN__OFFSET, 0x00000006
.set CYFLD_USBPD_OV_IN__SIZE, 0x00000006
.set CYFLD_USBPD_UVOV_ISO_N__OFFSET, 0x0000000c
.set CYFLD_USBPD_UVOV_ISO_N__SIZE, 0x00000001
.set CYFLD_USBPD_UVOV_ADFT_EN__OFFSET, 0x0000000d
.set CYFLD_USBPD_UVOV_ADFT_EN__SIZE, 0x00000001
.set CYFLD_USBPD_UVOV_ADFT_CTRL__OFFSET, 0x0000000e
.set CYFLD_USBPD_UVOV_ADFT_CTRL__SIZE, 0x00000002
.set CYFLD_USBPD_UVOV_SPARE__OFFSET, 0x00000010
.set CYFLD_USBPD_UVOV_SPARE__SIZE, 0x00000008
.set CYFLD_USBPD_PD_UVOV__OFFSET, 0x0000001e
.set CYFLD_USBPD_PD_UVOV__SIZE, 0x00000001
.set CYREG_USBPD_CSA_CTRL, 0x400a01cc
.set CYFLD_USBPD_AV1__OFFSET, 0x00000000
.set CYFLD_USBPD_AV1__SIZE, 0x00000003
.set CYFLD_USBPD_SEL_OUT_D__OFFSET, 0x00000006
.set CYFLD_USBPD_SEL_OUT_D__SIZE, 0x00000001
.set CYFLD_USBPD_CSA_ISO_N__OFFSET, 0x00000007
.set CYFLD_USBPD_CSA_ISO_N__SIZE, 0x00000001
.set CYFLD_USBPD_CSA_ADFT_CTRL__OFFSET, 0x00000008
.set CYFLD_USBPD_CSA_ADFT_CTRL__SIZE, 0x00000004
.set CYFLD_USBPD_CSA_VREF_SEL__OFFSET, 0x0000000c
.set CYFLD_USBPD_CSA_VREF_SEL__SIZE, 0x00000006
.set CYFLD_USBPD_CSA_SPARE__OFFSET, 0x00000012
.set CYFLD_USBPD_CSA_SPARE__SIZE, 0x00000004
.set CYFLD_USBPD_VREFIN_SEL__OFFSET, 0x0000001c
.set CYFLD_USBPD_VREFIN_SEL__SIZE, 0x00000001
.set CYFLD_USBPD_HYST_EN__OFFSET, 0x0000001d
.set CYFLD_USBPD_HYST_EN__SIZE, 0x00000001
.set CYFLD_USBPD_BW__OFFSET, 0x0000001e
.set CYFLD_USBPD_BW__SIZE, 0x00000001
.set CYFLD_USBPD_PD_CSA__OFFSET, 0x0000001f
.set CYFLD_USBPD_PD_CSA__SIZE, 0x00000001
.set CYREG_USBPD_VREG_CTRL, 0x400a01d0
.set CYFLD_USBPD_VREG20_ADFT_CTRL__OFFSET, 0x00000000
.set CYFLD_USBPD_VREG20_ADFT_CTRL__SIZE, 0x00000002
.set CYFLD_USBPD_VREG_ISO_N__OFFSET, 0x00000002
.set CYFLD_USBPD_VREG_ISO_N__SIZE, 0x00000001
.set CYFLD_USBPD_VBG_EN__OFFSET, 0x00000008
.set CYFLD_USBPD_VBG_EN__SIZE, 0x00000001
.set CYFLD_USBPD_VREG_SPARE__OFFSET, 0x00000009
.set CYFLD_USBPD_VREG_SPARE__SIZE, 0x00000007
.set CYREG_USBPD_SBU_CTRL, 0x400a01d4
.set CYFLD_USBPD_SBU_ADFT_EN__OFFSET, 0x00000000
.set CYFLD_USBPD_SBU_ADFT_EN__SIZE, 0x00000001
.set CYFLD_USBPD_SBU_ADFT_SEL__OFFSET, 0x00000001
.set CYFLD_USBPD_SBU_ADFT_SEL__SIZE, 0x00000004
.set CYFLD_USBPD_IN1_OUT1_EN__OFFSET, 0x00000005
.set CYFLD_USBPD_IN1_OUT1_EN__SIZE, 0x00000001
.set CYFLD_USBPD_IN2_OUT1_EN__OFFSET, 0x00000006
.set CYFLD_USBPD_IN2_OUT1_EN__SIZE, 0x00000001
.set CYFLD_USBPD_IN1_OUT2_EN__OFFSET, 0x00000007
.set CYFLD_USBPD_IN1_OUT2_EN__SIZE, 0x00000001
.set CYFLD_USBPD_IN2_OUT2_EN__OFFSET, 0x00000008
.set CYFLD_USBPD_IN2_OUT2_EN__SIZE, 0x00000001
.set CYFLD_USBPD_OUT1_1MEG_EN_PU__OFFSET, 0x00000009
.set CYFLD_USBPD_OUT1_1MEG_EN_PU__SIZE, 0x00000001
.set CYFLD_USBPD_OUT1_100K_EN_PD__OFFSET, 0x0000000a
.set CYFLD_USBPD_OUT1_100K_EN_PD__SIZE, 0x00000001
.set CYFLD_USBPD_OUT1_470K_EN_PD__OFFSET, 0x0000000b
.set CYFLD_USBPD_OUT1_470K_EN_PD__SIZE, 0x00000001
.set CYFLD_USBPD_OUT2_100K_EN_PU__OFFSET, 0x0000000c
.set CYFLD_USBPD_OUT2_100K_EN_PU__SIZE, 0x00000001
.set CYFLD_USBPD_OUT2_4P7MEG_EN_PD__OFFSET, 0x0000000d
.set CYFLD_USBPD_OUT2_4P7MEG_EN_PD__SIZE, 0x00000001
.set CYFLD_USBPD_OUT2_1MEG_EN_PD__OFFSET, 0x0000000e
.set CYFLD_USBPD_OUT2_1MEG_EN_PD__SIZE, 0x00000001
.set CYFLD_USBPD_SBU_SPARE__OFFSET, 0x00000010
.set CYFLD_USBPD_SBU_SPARE__SIZE, 0x00000008
.set CYREG_USBPD_VSYS_CTRL, 0x400a01d8
.set CYFLD_USBPD_VSYS_ISO_N__OFFSET, 0x00000000
.set CYFLD_USBPD_VSYS_ISO_N__SIZE, 0x00000001
.set CYFLD_USBPD_ADFT_EN__OFFSET, 0x00000001
.set CYFLD_USBPD_ADFT_EN__SIZE, 0x00000001
.set CYFLD_USBPD_ADFT_SEL__OFFSET, 0x00000002
.set CYFLD_USBPD_ADFT_SEL__SIZE, 0x00000002
.set CYFLD_USBPD_VSYS_SPARE__OFFSET, 0x00000008
.set CYFLD_USBPD_VSYS_SPARE__SIZE, 0x00000008
.set CYREG_USBPD_VREG_VSYS_CTRL, 0x400a01dc
.set CYFLD_USBPD_VREG20_EN__OFFSET, 0x00000000
.set CYFLD_USBPD_VREG20_EN__SIZE, 0x00000001
.set CYFLD_USBPD_VREG20_ONOFF_CNTR__OFFSET, 0x00000008
.set CYFLD_USBPD_VREG20_ONOFF_CNTR__SIZE, 0x00000008
.set CYFLD_USBPD_ENABLE_VDDD_SWITCH__OFFSET, 0x00000010
.set CYFLD_USBPD_ENABLE_VDDD_SWITCH__SIZE, 0x00000001
.set CYFLD_USBPD_VDDD_SW_ONOFF_CNTR__OFFSET, 0x00000011
.set CYFLD_USBPD_VDDD_SW_ONOFF_CNTR__SIZE, 0x00000008
.set CYREG_USBPD_NGDO_CTRL_0, 0x400a01e0
.set CYFLD_USBPD_NGDO_VBUS_C_CLKIN_SEL_LV__OFFSET, 0x00000000
.set CYFLD_USBPD_NGDO_VBUS_C_CLKIN_SEL_LV__SIZE, 0x00000001
.set CYFLD_USBPD_NGDO_VBUS_C_CLKSEL_LV__OFFSET, 0x00000001
.set CYFLD_USBPD_NGDO_VBUS_C_CLKSEL_LV__SIZE, 0x00000002
.set CYFLD_USBPD_NGDO_VBUS_C_NGDO_EN_LV__OFFSET, 0x00000003
.set CYFLD_USBPD_NGDO_VBUS_C_NGDO_EN_LV__SIZE, 0x00000002
.set CYFLD_USBPD_NGDO_VBUS_C_PULLDN_EN_LV__OFFSET, 0x00000005
.set CYFLD_USBPD_NGDO_VBUS_C_PULLDN_EN_LV__SIZE, 0x00000002
.set CYFLD_USBPD_NGDO_VBUS_C_DFT_EN_LV__OFFSET, 0x00000007
.set CYFLD_USBPD_NGDO_VBUS_C_DFT_EN_LV__SIZE, 0x00000001
.set CYFLD_USBPD_NGDO_VBUS_C_DFT_CLKOUT_SEL_LV__OFFSET, 0x00000008
.set CYFLD_USBPD_NGDO_VBUS_C_DFT_CLKOUT_SEL_LV__SIZE, 0x00000001
.set CYFLD_USBPD_NGDO_VBUS_P_CLKIN_SEL_LV__OFFSET, 0x00000009
.set CYFLD_USBPD_NGDO_VBUS_P_CLKIN_SEL_LV__SIZE, 0x00000001
.set CYFLD_USBPD_NGDO_VBUS_P_CLKSEL_LV__OFFSET, 0x0000000a
.set CYFLD_USBPD_NGDO_VBUS_P_CLKSEL_LV__SIZE, 0x00000002
.set CYFLD_USBPD_NGDO_VBUS_P_NGDO_EN_LV__OFFSET, 0x0000000c
.set CYFLD_USBPD_NGDO_VBUS_P_NGDO_EN_LV__SIZE, 0x00000002
.set CYFLD_USBPD_NGDO_VBUS_P_PULLDN_EN_LV__OFFSET, 0x0000000e
.set CYFLD_USBPD_NGDO_VBUS_P_PULLDN_EN_LV__SIZE, 0x00000002
.set CYFLD_USBPD_NGDO_VBUS_P_DFT_EN_LV__OFFSET, 0x00000010
.set CYFLD_USBPD_NGDO_VBUS_P_DFT_EN_LV__SIZE, 0x00000001
.set CYFLD_USBPD_NGDO_VBUS_P_DFT_CLKOUT_SEL_LV__OFFSET, 0x00000011
.set CYFLD_USBPD_NGDO_VBUS_P_DFT_CLKOUT_SEL_LV__SIZE, 0x00000001
.set CYFLD_USBPD_NGDO_SPARE__OFFSET, 0x00000018
.set CYFLD_USBPD_NGDO_SPARE__SIZE, 0x00000008
.set CYREG_USBPD_NGDO_CTRL_C, 0x400a01e4
.set CYFLD_USBPD_AUTO_MODE__OFFSET, 0x00000000
.set CYFLD_USBPD_AUTO_MODE__SIZE, 0x00000001
.set CYFLD_USBPD_RST_EDGE_DET__OFFSET, 0x00000001
.set CYFLD_USBPD_RST_EDGE_DET__SIZE, 0x00000001
.set CYFLD_USBPD_TURN_OFF_SEL__OFFSET, 0x00000002
.set CYFLD_USBPD_TURN_OFF_SEL__SIZE, 0x00000001
.set CYFLD_USBPD_BYPASS_2DFF__OFFSET, 0x00000003
.set CYFLD_USBPD_BYPASS_2DFF__SIZE, 0x00000001
.set CYFLD_USBPD_TURN_OFF_SPACING__OFFSET, 0x00000004
.set CYFLD_USBPD_TURN_OFF_SPACING__SIZE, 0x00000004
.set CYFLD_USBPD_SEL_OV__OFFSET, 0x00000008
.set CYFLD_USBPD_SEL_OV__SIZE, 0x00000001
.set CYFLD_USBPD_SEL_UV__OFFSET, 0x00000009
.set CYFLD_USBPD_SEL_UV__SIZE, 0x00000001
.set CYFLD_USBPD_SEL_OC__OFFSET, 0x0000000a
.set CYFLD_USBPD_SEL_OC__SIZE, 0x00000001
.set CYFLD_USBPD_SEL_SWAP_VBUS_LESS_5__OFFSET, 0x0000000b
.set CYFLD_USBPD_SEL_SWAP_VBUS_LESS_5__SIZE, 0x00000001
.set CYFLD_USBPD_EN_LV_OFF_VALUE__OFFSET, 0x0000000c
.set CYFLD_USBPD_EN_LV_OFF_VALUE__SIZE, 0x00000002
.set CYFLD_USBPD_PULLDN_EN_LV_OFF_VALUE__OFFSET, 0x0000000e
.set CYFLD_USBPD_PULLDN_EN_LV_OFF_VALUE__SIZE, 0x00000002
.set CYFLD_USBPD_EN_LV_ON_VALUE__OFFSET, 0x00000010
.set CYFLD_USBPD_EN_LV_ON_VALUE__SIZE, 0x00000002
.set CYFLD_USBPD_PULLDN_EN_LV_ON_VALUE__OFFSET, 0x00000012
.set CYFLD_USBPD_PULLDN_EN_LV_ON_VALUE__SIZE, 0x00000002
.set CYREG_USBPD_NGDO_CTRL_P, 0x400a01e8
.set CYREG_USBPD_VBUS_CTRL, 0x400a01ec
.set CYFLD_USBPD_DISCHG_EN__OFFSET, 0x00000000
.set CYFLD_USBPD_DISCHG_EN__SIZE, 0x00000001
.set CYFLD_USBPD_VBUS_SPARE__OFFSET, 0x00000008
.set CYFLD_USBPD_VBUS_SPARE__SIZE, 0x00000008
.set CYREG_USBPD_CHGDET_CTRL_0, 0x400a01f0
.set CYFLD_USBPD_EN_CHGDET__OFFSET, 0x00000000
.set CYFLD_USBPD_EN_CHGDET__SIZE, 0x00000001
.set CYFLD_USBPD_IDP_SNK_EN__OFFSET, 0x00000001
.set CYFLD_USBPD_IDP_SNK_EN__SIZE, 0x00000001
.set CYFLD_USBPD_IDM_SNK_EN__OFFSET, 0x00000002
.set CYFLD_USBPD_IDM_SNK_EN__SIZE, 0x00000001
.set CYFLD_USBPD_VDP_SRC_EN__OFFSET, 0x00000003
.set CYFLD_USBPD_VDP_SRC_EN__SIZE, 0x00000001
.set CYFLD_USBPD_VDM_SRC_EN__OFFSET, 0x00000004
.set CYFLD_USBPD_VDM_SRC_EN__SIZE, 0x00000001
.set CYFLD_USBPD_IDP_SRC_EN__OFFSET, 0x00000005
.set CYFLD_USBPD_IDP_SRC_EN__SIZE, 0x00000001
.set CYFLD_USBPD_DCP_EN__OFFSET, 0x00000006
.set CYFLD_USBPD_DCP_EN__SIZE, 0x00000001
.set CYFLD_USBPD_RDM_PD_EN__OFFSET, 0x00000007
.set CYFLD_USBPD_RDM_PD_EN__SIZE, 0x00000001
.set CYFLD_USBPD_RDM_PU_EN__OFFSET, 0x00000008
.set CYFLD_USBPD_RDM_PU_EN__SIZE, 0x00000001
.set CYFLD_USBPD_RDP_PD_EN__OFFSET, 0x00000009
.set CYFLD_USBPD_RDP_PD_EN__SIZE, 0x00000001
.set CYFLD_USBPD_RDP_PU_EN__OFFSET, 0x0000000a
.set CYFLD_USBPD_RDP_PU_EN__SIZE, 0x00000001
.set CYFLD_USBPD_RDAT_LKG_DP_EN__OFFSET, 0x0000000b
.set CYFLD_USBPD_RDAT_LKG_DP_EN__SIZE, 0x00000001
.set CYFLD_USBPD_RDAT_LKG_DM_EN__OFFSET, 0x0000000c
.set CYFLD_USBPD_RDAT_LKG_DM_EN__SIZE, 0x00000001
.set CYFLD_USBPD_CMP_INN_SEL__OFFSET, 0x0000000d
.set CYFLD_USBPD_CMP_INN_SEL__SIZE, 0x00000002
.set CYFLD_USBPD_CMP_INP_SEL__OFFSET, 0x0000000f
.set CYFLD_USBPD_CMP_INP_SEL__SIZE, 0x00000002
.set CYFLD_USBPD_VREF_SEL__OFFSET, 0x00000011
.set CYFLD_USBPD_VREF_SEL__SIZE, 0x00000003
.set CYFLD_USBPD_EN_COMP_CHGDET__OFFSET, 0x00000014
.set CYFLD_USBPD_EN_COMP_CHGDET__SIZE, 0x00000001
.set CYFLD_USBPD_CMP_OFFSET_SEL__OFFSET, 0x00000015
.set CYFLD_USBPD_CMP_OFFSET_SEL__SIZE, 0x00000003
.set CYFLD_USBPD_CMPP_OFFSET_EN__OFFSET, 0x00000018
.set CYFLD_USBPD_CMPP_OFFSET_EN__SIZE, 0x00000001
.set CYFLD_USBPD_CMP_UGM_EN__OFFSET, 0x00000019
.set CYFLD_USBPD_CMP_UGM_EN__SIZE, 0x00000001
.set CYFLD_USBPD_PD__OFFSET, 0x0000001f
.set CYFLD_USBPD_PD__SIZE, 0x00000001
.set CYREG_USBPD_CHGDET_CTRL_1, 0x400a01f4
.set CYFLD_USBPD_CHGDET_ADFT_EN__OFFSET, 0x00000000
.set CYFLD_USBPD_CHGDET_ADFT_EN__SIZE, 0x00000001
.set CYFLD_USBPD_CHGDET_ADFT_CTRL__OFFSET, 0x00000001
.set CYFLD_USBPD_CHGDET_ADFT_CTRL__SIZE, 0x00000004
.set CYFLD_USBPD_CHGDET_ISO_N__OFFSET, 0x00000005
.set CYFLD_USBPD_CHGDET_ISO_N__SIZE, 0x00000001
.set CYFLD_USBPD_CHGDET_APP_DET__OFFSET, 0x00000006
.set CYFLD_USBPD_CHGDET_APP_DET__SIZE, 0x00000001
.set CYFLD_USBPD_CHGDET_APPLE_MODE_DM__OFFSET, 0x00000007
.set CYFLD_USBPD_CHGDET_APPLE_MODE_DM__SIZE, 0x00000002
.set CYFLD_USBPD_CHGDET_APPLE_MODE_DP__OFFSET, 0x00000009
.set CYFLD_USBPD_CHGDET_APPLE_MODE_DP__SIZE, 0x00000002
.set CYFLD_USBPD_CHGDET_SPARE__OFFSET, 0x00000010
.set CYFLD_USBPD_CHGDET_SPARE__SIZE, 0x00000008
.set CYREG_USBPD_INTR3_CFG_0, 0x400a01f8
.set CYFLD_USBPD_CSA_POS_FILT_EN__OFFSET, 0x00000000
.set CYFLD_USBPD_CSA_POS_FILT_EN__SIZE, 0x00000001
.set CYFLD_USBPD_CSA_POS_FILT_SEL__OFFSET, 0x00000001
.set CYFLD_USBPD_CSA_POS_FILT_SEL__SIZE, 0x00000003
.set CYFLD_USBPD_CSA_NEG_FILT_EN__OFFSET, 0x00000004
.set CYFLD_USBPD_CSA_NEG_FILT_EN__SIZE, 0x00000001
.set CYFLD_USBPD_CSA_NEG_FILT_SEL__OFFSET, 0x00000005
.set CYFLD_USBPD_CSA_NEG_FILT_SEL__SIZE, 0x00000003
.set CYFLD_USBPD_OV_POS_FILT_EN__OFFSET, 0x00000008
.set CYFLD_USBPD_OV_POS_FILT_EN__SIZE, 0x00000001
.set CYFLD_USBPD_OV_POS_FILT_SEL__OFFSET, 0x00000009
.set CYFLD_USBPD_OV_POS_FILT_SEL__SIZE, 0x00000003
.set CYFLD_USBPD_OV_NEG_FILT_EN__OFFSET, 0x0000000c
.set CYFLD_USBPD_OV_NEG_FILT_EN__SIZE, 0x00000001
.set CYFLD_USBPD_OV_NEG_FILT_SEL__OFFSET, 0x0000000d
.set CYFLD_USBPD_OV_NEG_FILT_SEL__SIZE, 0x00000003
.set CYFLD_USBPD_UV_POS_FILT_EN__OFFSET, 0x00000010
.set CYFLD_USBPD_UV_POS_FILT_EN__SIZE, 0x00000001
.set CYFLD_USBPD_UV_POS_FILT_SEL__OFFSET, 0x00000011
.set CYFLD_USBPD_UV_POS_FILT_SEL__SIZE, 0x00000003
.set CYFLD_USBPD_UV_NEG_FILT_EN__OFFSET, 0x00000014
.set CYFLD_USBPD_UV_NEG_FILT_EN__SIZE, 0x00000001
.set CYFLD_USBPD_UV_NEG_FILT_SEL__OFFSET, 0x00000015
.set CYFLD_USBPD_UV_NEG_FILT_SEL__SIZE, 0x00000003
.set CYFLD_USBPD_CHGDET_CFG__OFFSET, 0x00000018
.set CYFLD_USBPD_CHGDET_CFG__SIZE, 0x00000002
.set CYVAL_USBPD_CHGDET_CFG_POS_EDG_DIS_NEG_EDG_DIS, 0x00000000
.set CYVAL_USBPD_CHGDET_CFG_POS_EDG_DIS_NEG_EDG_EN, 0x00000001
.set CYVAL_USBPD_CHGDET_CFG_POS_EDG_EN_NEG_EDG_DIS, 0x00000002
.set CYVAL_USBPD_CHGDET_CFG_POS_EDG_EN_NEG_EDG_EN, 0x00000003
.set CYFLD_USBPD_CHGDET_FILT_EN__OFFSET, 0x0000001a
.set CYFLD_USBPD_CHGDET_FILT_EN__SIZE, 0x00000001
.set CYFLD_USBPD_CHGDET_FILT_SEL__OFFSET, 0x0000001b
.set CYFLD_USBPD_CHGDET_FILT_SEL__SIZE, 0x00000003
.set CYREG_USBPD_INTR3_CFG_1, 0x400a01fc
.set CYFLD_USBPD_VSYS_CFG__OFFSET, 0x00000000
.set CYFLD_USBPD_VSYS_CFG__SIZE, 0x00000002
.set CYVAL_USBPD_VSYS_CFG_POS_EDG_DIS_NEG_EDG_DIS, 0x00000000
.set CYVAL_USBPD_VSYS_CFG_POS_EDG_DIS_NEG_EDG_EN, 0x00000001
.set CYVAL_USBPD_VSYS_CFG_POS_EDG_EN_NEG_EDG_DIS, 0x00000002
.set CYVAL_USBPD_VSYS_CFG_POS_EDG_EN_NEG_EDG_EN, 0x00000003
.set CYFLD_USBPD_VSYS_FILT_EN__OFFSET, 0x00000002
.set CYFLD_USBPD_VSYS_FILT_EN__SIZE, 0x00000001
.set CYFLD_USBPD_VSYS_FILT_SEL__OFFSET, 0x00000003
.set CYFLD_USBPD_VSYS_FILT_SEL__SIZE, 0x00000003
.set CYFLD_USBPD_VBUS_C_CFG__OFFSET, 0x00000006
.set CYFLD_USBPD_VBUS_C_CFG__SIZE, 0x00000002
.set CYVAL_USBPD_VBUS_C_CFG_POS_EDG_DIS_NEG_EDG_DIS, 0x00000000
.set CYVAL_USBPD_VBUS_C_CFG_POS_EDG_DIS_NEG_EDG_EN, 0x00000001
.set CYVAL_USBPD_VBUS_C_CFG_POS_EDG_EN_NEG_EDG_DIS, 0x00000002
.set CYVAL_USBPD_VBUS_C_CFG_POS_EDG_EN_NEG_EDG_EN, 0x00000003
.set CYFLD_USBPD_VBUS_C_FILT_EN__OFFSET, 0x00000008
.set CYFLD_USBPD_VBUS_C_FILT_EN__SIZE, 0x00000001
.set CYFLD_USBPD_VBUS_C_FILT_SEL__OFFSET, 0x00000009
.set CYFLD_USBPD_VBUS_C_FILT_SEL__SIZE, 0x00000003
.set CYFLD_USBPD_VBUS_P_CFG__OFFSET, 0x0000000c
.set CYFLD_USBPD_VBUS_P_CFG__SIZE, 0x00000002
.set CYVAL_USBPD_VBUS_P_CFG_POS_EDG_DIS_NEG_EDG_DIS, 0x00000000
.set CYVAL_USBPD_VBUS_P_CFG_POS_EDG_DIS_NEG_EDG_EN, 0x00000001
.set CYVAL_USBPD_VBUS_P_CFG_POS_EDG_EN_NEG_EDG_DIS, 0x00000002
.set CYVAL_USBPD_VBUS_P_CFG_POS_EDG_EN_NEG_EDG_EN, 0x00000003
.set CYFLD_USBPD_VBUS_P_FILT_EN__OFFSET, 0x0000000e
.set CYFLD_USBPD_VBUS_P_FILT_EN__SIZE, 0x00000001
.set CYFLD_USBPD_VBUS_P_FILT_SEL__OFFSET, 0x0000000f
.set CYFLD_USBPD_VBUS_P_FILT_SEL__SIZE, 0x00000003
.set CYREG_USBPD_NCELL_STATUS, 0x400a0200
.set CYFLD_USBPD_VSYS_STATUS__OFFSET, 0x00000000
.set CYFLD_USBPD_VSYS_STATUS__SIZE, 0x00000001
.set CYFLD_USBPD_CSA_STATUS__OFFSET, 0x00000001
.set CYFLD_USBPD_CSA_STATUS__SIZE, 0x00000001
.set CYFLD_USBPD_UV_STATUS__OFFSET, 0x00000002
.set CYFLD_USBPD_UV_STATUS__SIZE, 0x00000001
.set CYFLD_USBPD_OV_STATUS__OFFSET, 0x00000003
.set CYFLD_USBPD_OV_STATUS__SIZE, 0x00000001
.set CYFLD_USBPD_CHGDET_STATUS__OFFSET, 0x00000004
.set CYFLD_USBPD_CHGDET_STATUS__SIZE, 0x00000001
.set CYFLD_USBPD_VBUS_C_STATUS__OFFSET, 0x00000005
.set CYFLD_USBPD_VBUS_C_STATUS__SIZE, 0x00000001
.set CYFLD_USBPD_VBUS_P_STATUS__OFFSET, 0x00000006
.set CYFLD_USBPD_VBUS_P_STATUS__SIZE, 0x00000001
.set CYREG_USBPD_INTR3, 0x400a0204
.set CYFLD_USBPD_VSYS_CHANGED__OFFSET, 0x00000000
.set CYFLD_USBPD_VSYS_CHANGED__SIZE, 0x00000001
.set CYFLD_USBPD_POS_CSA_CHANGED__OFFSET, 0x00000001
.set CYFLD_USBPD_POS_CSA_CHANGED__SIZE, 0x00000001
.set CYFLD_USBPD_POS_OV_CHANGED__OFFSET, 0x00000002
.set CYFLD_USBPD_POS_OV_CHANGED__SIZE, 0x00000001
.set CYFLD_USBPD_POS_UV_CHANGED__OFFSET, 0x00000003
.set CYFLD_USBPD_POS_UV_CHANGED__SIZE, 0x00000001
.set CYFLD_USBPD_NEG_CSA_CHANGED__OFFSET, 0x00000004
.set CYFLD_USBPD_NEG_CSA_CHANGED__SIZE, 0x00000001
.set CYFLD_USBPD_NEG_OV_CHANGED__OFFSET, 0x00000005
.set CYFLD_USBPD_NEG_OV_CHANGED__SIZE, 0x00000001
.set CYFLD_USBPD_NEG_UV_CHANGED__OFFSET, 0x00000006
.set CYFLD_USBPD_NEG_UV_CHANGED__SIZE, 0x00000001
.set CYFLD_USBPD_CHGDET_CHANGED__OFFSET, 0x00000007
.set CYFLD_USBPD_CHGDET_CHANGED__SIZE, 0x00000001
.set CYFLD_USBPD_VBUS_C_CHANGED__OFFSET, 0x00000008
.set CYFLD_USBPD_VBUS_C_CHANGED__SIZE, 0x00000001
.set CYFLD_USBPD_VBUS_P_CHANGED__OFFSET, 0x00000009
.set CYFLD_USBPD_VBUS_P_CHANGED__SIZE, 0x00000001
.set CYREG_USBPD_INTR3_SET, 0x400a0208
.set CYREG_USBPD_INTR3_MASK, 0x400a020c
.set CYFLD_USBPD_VSYS_CHANGED_MASK__OFFSET, 0x00000000
.set CYFLD_USBPD_VSYS_CHANGED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_POS_CSA_CHANGED_MASK__OFFSET, 0x00000001
.set CYFLD_USBPD_POS_CSA_CHANGED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_POS_OV_CHANGED_MASK__OFFSET, 0x00000002
.set CYFLD_USBPD_POS_OV_CHANGED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_POS_UV_CHANGED_MASK__OFFSET, 0x00000003
.set CYFLD_USBPD_POS_UV_CHANGED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_NEG_CSA_CHANGED_MASK__OFFSET, 0x00000004
.set CYFLD_USBPD_NEG_CSA_CHANGED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_NEG_OV_CHANGED_MASK__OFFSET, 0x00000005
.set CYFLD_USBPD_NEG_OV_CHANGED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_NEG_UV_CHANGED_MASK__OFFSET, 0x00000006
.set CYFLD_USBPD_NEG_UV_CHANGED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_CHGDET_CHANGED_MASK__OFFSET, 0x00000007
.set CYFLD_USBPD_CHGDET_CHANGED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_VBUS_C_CHANGED_MASK__OFFSET, 0x00000008
.set CYFLD_USBPD_VBUS_C_CHANGED_MASK__SIZE, 0x00000001
.set CYFLD_USBPD_VBUS_P_CHANGED_MASK__OFFSET, 0x00000009
.set CYFLD_USBPD_VBUS_P_CHANGED_MASK__SIZE, 0x00000001
.set CYREG_USBPD_INTR3_MASKED, 0x400a0210
.set CYFLD_USBPD_VSYS_CHANGED_MASKED__OFFSET, 0x00000000
.set CYFLD_USBPD_VSYS_CHANGED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_POS_CSA_CHANGED_MASKED__OFFSET, 0x00000001
.set CYFLD_USBPD_POS_CSA_CHANGED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_POS_OV_CHANGED_MASKED__OFFSET, 0x00000002
.set CYFLD_USBPD_POS_OV_CHANGED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_POS_UV_CHANGED_MASKED__OFFSET, 0x00000003
.set CYFLD_USBPD_POS_UV_CHANGED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_NEG_CSA_CHANGED_MASKED__OFFSET, 0x00000004
.set CYFLD_USBPD_NEG_CSA_CHANGED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_NEG_OV_CHANGED_MASKED__OFFSET, 0x00000005
.set CYFLD_USBPD_NEG_OV_CHANGED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_NEG_UV_CHANGED_MASKED__OFFSET, 0x00000006
.set CYFLD_USBPD_NEG_UV_CHANGED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_CHGDET_CHANGED_MASKED__OFFSET, 0x00000007
.set CYFLD_USBPD_CHGDET_CHANGED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_VBUS_C_CHANGED_MASKED__OFFSET, 0x00000008
.set CYFLD_USBPD_VBUS_C_CHANGED_MASKED__SIZE, 0x00000001
.set CYFLD_USBPD_VBUS_P_CHANGED_MASKED__OFFSET, 0x00000009
.set CYFLD_USBPD_VBUS_P_CHANGED_MASKED__SIZE, 0x00000001
.set CYREG_USBPD_NCELL_DDFT_MUX, 0x400a0214
.set CYFLD_USBPD_ncell_ddft0_sel__OFFSET, 0x00000000
.set CYFLD_USBPD_ncell_ddft0_sel__SIZE, 0x00000006
.set CYFLD_USBPD_ncell_ddft1_sel__OFFSET, 0x00000006
.set CYFLD_USBPD_ncell_ddft1_sel__SIZE, 0x00000006
.set CYREG_USBPD_GPIO_DDFT_MUX, 0x400a0218
.set CYFLD_USBPD_gpio_ddft0_sel__OFFSET, 0x00000000
.set CYFLD_USBPD_gpio_ddft0_sel__SIZE, 0x00000006
.set CYFLD_USBPD_gpio_ddft1_sel__OFFSET, 0x00000006
.set CYFLD_USBPD_gpio_ddft1_sel__SIZE, 0x00000006
.set CYREG_USBPD_GPIO_INTR_DDFT_MUX, 0x400a021c
.set CYFLD_USBPD_gpio_intr_ddft0_sel__OFFSET, 0x00000000
.set CYFLD_USBPD_gpio_intr_ddft0_sel__SIZE, 0x00000007
.set CYFLD_USBPD_gpio_intr_ddft1_sel__OFFSET, 0x00000007
.set CYFLD_USBPD_gpio_intr_ddft1_sel__SIZE, 0x00000007
.set CYREG_USBPD_GPIO_NCELL_DDFT_MUX, 0x400a0220
.set CYFLD_USBPD_gpio_ncell_ddft0_sel__OFFSET, 0x00000000
.set CYFLD_USBPD_gpio_ncell_ddft0_sel__SIZE, 0x00000006
.set CYFLD_USBPD_gpio_ncell_ddft1_sel__OFFSET, 0x00000006
.set CYFLD_USBPD_gpio_ncell_ddft1_sel__SIZE, 0x00000006
.set CYREG_USBPD_SWAP_CNTRL_0, 0x400a0224
.set CYFLD_USBPD_CP_REF_SEL__OFFSET, 0x00000000
.set CYFLD_USBPD_CP_REF_SEL__SIZE, 0x00000001
.set CYFLD_USBPD_CMP_FS_CC1V2__OFFSET, 0x00000001
.set CYFLD_USBPD_CMP_FS_CC1V2__SIZE, 0x00000001
.set CYFLD_USBPD_CMP_FS_VSEL__OFFSET, 0x00000002
.set CYFLD_USBPD_CMP_FS_VSEL__SIZE, 0x00000003
.set CYFLD_USBPD_SWAP_1__OFFSET, 0x00000005
.set CYFLD_USBPD_SWAP_1__SIZE, 0x00000003
.set CYFLD_USBPD_SWAP_2__OFFSET, 0x00000008
.set CYFLD_USBPD_SWAP_2__SIZE, 0x00000008
.set CYFLD_USBPD_SWAP_3__OFFSET, 0x00000010
.set CYFLD_USBPD_SWAP_3__SIZE, 0x00000008
.set CYFLD_USBPD_SWAP_4__OFFSET, 0x00000018
.set CYFLD_USBPD_SWAP_4__SIZE, 0x00000008
.set CYREG_USBPD_SWAP_CNTRL_1, 0x400a0228
.set CYFLD_USBPD_SWAP_5__OFFSET, 0x00000000
.set CYFLD_USBPD_SWAP_5__SIZE, 0x00000008
.set CYFLD_USBPD_SWAP_6__OFFSET, 0x00000008
.set CYFLD_USBPD_SWAP_6__SIZE, 0x00000008
.set CYFLD_USBPD_SWAP_7__OFFSET, 0x00000010
.set CYFLD_USBPD_SWAP_7__SIZE, 0x00000008
.set CYFLD_USBPD_SWAP_8__OFFSET, 0x00000018
.set CYFLD_USBPD_SWAP_8__SIZE, 0x00000008
.set CYREG_USBPD_S8USBPD_TRIM_0, 0x400aff00
.set CYFLD_USBPD_ZDRV_TRIM__OFFSET, 0x00000000
.set CYFLD_USBPD_ZDRV_TRIM__SIZE, 0x00000002
.set CYFLD_USBPD_TX_TRIM__OFFSET, 0x00000002
.set CYFLD_USBPD_TX_TRIM__SIZE, 0x00000002
.set CYFLD_USBPD_RD_TRIM__OFFSET, 0x00000004
.set CYFLD_USBPD_RD_TRIM__SIZE, 0x00000004
.set CYREG_USBPD_S8USBPD_TRIM_1, 0x400aff04
.set CYFLD_USBPD_RP_CC1_TRIM__OFFSET, 0x00000000
.set CYFLD_USBPD_RP_CC1_TRIM__SIZE, 0x00000006
.set CYFLD_USBPD_TC_I_TRIM_9P__OFFSET, 0x00000006
.set CYFLD_USBPD_TC_I_TRIM_9P__SIZE, 0x00000002
.set CYREG_USBPD_S8USBPD_TRIM_2, 0x400aff08
.set CYFLD_USBPD_RP_CC2_TRIM__OFFSET, 0x00000000
.set CYFLD_USBPD_RP_CC2_TRIM__SIZE, 0x00000006
.set CYFLD_USBPD_TC_I_TRIM_4P__OFFSET, 0x00000006
.set CYFLD_USBPD_TC_I_TRIM_4P__SIZE, 0x00000002
.set CYREG_USBPD_S8USBPD_TRIM_3, 0x400aff0c
.set CYFLD_USBPD_V0P55_TRIM__OFFSET, 0x00000000
.set CYFLD_USBPD_V0P55_TRIM__SIZE, 0x00000003
.set CYFLD_USBPD_V0P655_TRIM__OFFSET, 0x00000003
.set CYFLD_USBPD_V0P655_TRIM__SIZE, 0x00000003
.set CYREG_USBPD_S8USBPD_TRIM_4, 0x400aff10
.set CYFLD_USBPD_V0P74_TRIM__OFFSET, 0x00000000
.set CYFLD_USBPD_V0P74_TRIM__SIZE, 0x00000004
.set CYFLD_USBPD_V0P8_TRIM__OFFSET, 0x00000004
.set CYFLD_USBPD_V0P8_TRIM__SIZE, 0x00000003
.set CYREG_USBPD_S8USBPD_TRIM_5, 0x400aff14
.set CYFLD_USBPD_V1P125_TRIM__OFFSET, 0x00000000
.set CYFLD_USBPD_V1P125_TRIM__SIZE, 0x00000003
.set CYFLD_USBPD_V1P235_TRIM__OFFSET, 0x00000003
.set CYFLD_USBPD_V1P235_TRIM__SIZE, 0x00000003
.set CYREG_USBPD_S8USBPD_TRIM_6, 0x400aff18
.set CYFLD_USBPD_V1P575_TRIM__OFFSET, 0x00000000
.set CYFLD_USBPD_V1P575_TRIM__SIZE, 0x00000003
.set CYFLD_USBPD_REF_TRIM__OFFSET, 0x00000003
.set CYFLD_USBPD_REF_TRIM__SIZE, 0x00000004
.set CYREG_USBPD_S8USBPD_TRIM_7, 0x400aff1c
.set CYFLD_USBPD_I_TRIM__OFFSET, 0x00000000
.set CYFLD_USBPD_I_TRIM__SIZE, 0x00000008
.set CYREG_USBPD_S8USBPD_TRIM_SPARE1, 0x400aff20
.set CYFLD_USBPD_VREG_TRIM__OFFSET, 0x00000000
.set CYFLD_USBPD_VREG_TRIM__SIZE, 0x00000003
.set CYFLD_USBPD_SPARE1_TRIM__OFFSET, 0x00000003
.set CYFLD_USBPD_SPARE1_TRIM__SIZE, 0x00000005
.set CYREG_USBPD_S8USBPD_TRIM_SPARE2, 0x400aff24
.set CYFLD_USBPD_SPARE2_TRIM__OFFSET, 0x00000000
.set CYFLD_USBPD_SPARE2_TRIM__SIZE, 0x00000008
.set CYREG_USBPD_S8USBPD_TRIM_CSA_0, 0x400aff28
.set CYFLD_USBPD_OS_EL__OFFSET, 0x00000000
.set CYFLD_USBPD_OS_EL__SIZE, 0x00000004
.set CYFLD_USBPD_INP_DIV_TR__OFFSET, 0x00000004
.set CYFLD_USBPD_INP_DIV_TR__SIZE, 0x00000004
.set CYREG_USBPD_S8USBPD_TRIM_CSA_1, 0x400aff2c
.set CYFLD_USBPD_AV1_TR__OFFSET, 0x00000000
.set CYFLD_USBPD_AV1_TR__SIZE, 0x00000004
.set CYFLD_USBPD_SPARE__OFFSET, 0x00000004
.set CYFLD_USBPD_SPARE__SIZE, 0x00000004
.set CYREG_USBPD_S8USBPD_TRIM_CSA_2, 0x400aff30
.set CYFLD_USBPD_VREF_TR__OFFSET, 0x00000000
.set CYFLD_USBPD_VREF_TR__SIZE, 0x00000004
.set CYREG_USBPD_S8USBPD_TRIM_CHGDET_0, 0x400aff34
.set CYFLD_USBPD_V600M_TRIM__OFFSET, 0x00000000
.set CYFLD_USBPD_V600M_TRIM__SIZE, 0x00000003
.set CYFLD_USBPD_V0P74_CHGDET_TRIM__OFFSET, 0x00000003
.set CYFLD_USBPD_V0P74_CHGDET_TRIM__SIZE, 0x00000004
.set CYREG_USBPD_S8USBPD_TRIM_CHGDET_1, 0x400aff38
.set CYFLD_USBPD_V325M_TRIM__OFFSET, 0x00000000
.set CYFLD_USBPD_V325M_TRIM__SIZE, 0x00000002
.set CYFLD_USBPD_V2V_TRIM__OFFSET, 0x00000002
.set CYFLD_USBPD_V2V_TRIM__SIZE, 0x00000002
.set CYFLD_USBPD_VAPP_TRIM__OFFSET, 0x00000004
.set CYFLD_USBPD_VAPP_TRIM__SIZE, 0x00000003
.set CYREG_USBPD_S8USBPD_TRIM_CHGDET_2, 0x400aff3c
.set CYFLD_USBPD_V850M_TRIM__OFFSET, 0x00000000
.set CYFLD_USBPD_V850M_TRIM__SIZE, 0x00000002
.set CYFLD_USBPD_V2P2V_TRIM__OFFSET, 0x00000002
.set CYFLD_USBPD_V2P2V_TRIM__SIZE, 0x00000002
.set CYFLD_USBPD_V2P9V_TRIM__OFFSET, 0x00000004
.set CYFLD_USBPD_V2P9V_TRIM__SIZE, 0x00000002
.set CYFLD_USBPD_V2P5V_TRIM__OFFSET, 0x00000006
.set CYFLD_USBPD_V2P5V_TRIM__SIZE, 0x00000002
.set CYREG_USBPD_S8USBPD_TRIM_SBU_0, 0x400aff40
.set CYFLD_USBPD_SBU_1MEG_TRIM__OFFSET, 0x00000000
.set CYFLD_USBPD_SBU_1MEG_TRIM__SIZE, 0x00000003
.set CYFLD_USBPD_SBU_100K_TRIM__OFFSET, 0x00000003
.set CYFLD_USBPD_SBU_100K_TRIM__SIZE, 0x00000003
.set CYREG_USBPD_S8USBPD_TRIM_SBU_1, 0x400aff44
.set CYFLD_USBPD_SBU_470K_PD_TRIM__OFFSET, 0x00000000
.set CYFLD_USBPD_SBU_470K_PD_TRIM__SIZE, 0x00000003
.set CYREG_USBPD_S8USBPD_TRIM_SBU_2, 0x400aff48
.set CYFLD_USBPD_SBU_4P7MEG_PD_TRIM__OFFSET, 0x00000000
.set CYFLD_USBPD_SBU_4P7MEG_PD_TRIM__SIZE, 0x00000003
.set CYREG_USBPD_S8USBPD_TRIM_SPARE3, 0x400aff4c
.set CYFLD_USBPD_SPARE3_TRIM__OFFSET, 0x00000000
.set CYFLD_USBPD_SPARE3_TRIM__SIZE, 0x00000008
.set CYREG_USBPD_S8USBPD_TRIM_SPARE4, 0x400aff50
.set CYFLD_USBPD_SPARE4_TRIM__OFFSET, 0x00000000
.set CYFLD_USBPD_SPARE4_TRIM__SIZE, 0x00000008
.set CYDEV_CRYPTO_BASE, 0x400b0000
.set CYDEV_CRYPTO_SIZE, 0x00010000
.set CYREG_CRYPTO_CTL, 0x400b0000
.set CYFLD_CRYPTO_OPCODE__OFFSET, 0x00000000
.set CYFLD_CRYPTO_OPCODE__SIZE, 0x00000005
.set CYVAL_CRYPTO_OPCODE_AES_FORWARD, 0x00000000
.set CYVAL_CRYPTO_OPCODE_AES_INVERSE, 0x00000001
.set CYVAL_CRYPTO_OPCODE_SHA, 0x00000010
.set CYVAL_CRYPTO_OPCODE_CRC, 0x00000018
.set CYFLD_CRYPTO_ENABLED__OFFSET, 0x0000001f
.set CYFLD_CRYPTO_ENABLED__SIZE, 0x00000001
.set CYREG_CRYPTO_STATUS, 0x400b0004
.set CYFLD_CRYPTO_BUSY__OFFSET, 0x00000000
.set CYFLD_CRYPTO_BUSY__SIZE, 0x00000001
.set CYREG_CRYPTO_CMD, 0x400b0008
.set CYFLD_CRYPTO_START__OFFSET, 0x00000000
.set CYFLD_CRYPTO_START__SIZE, 0x00000001
.set CYREG_CRYPTO_SRC_CTL0, 0x400b0010
.set CYFLD_CRYPTO_OFFSET__OFFSET, 0x00000002
.set CYFLD_CRYPTO_OFFSET__SIZE, 0x00000010
.set CYREG_CRYPTO_SRC_CTL1, 0x400b0014
.set CYREG_CRYPTO_DST_CTL0, 0x400b0020
.set CYREG_CRYPTO_DST_CTL1, 0x400b0024
.set CYREG_CRYPTO_AES_CTL, 0x400b0100
.set CYFLD_CRYPTO_KEY_SIZE__OFFSET, 0x00000000
.set CYFLD_CRYPTO_KEY_SIZE__SIZE, 0x00000002
.set CYREG_CRYPTO_PR_CTL, 0x400b0200
.set CYFLD_CRYPTO_MAX__OFFSET, 0x00000000
.set CYFLD_CRYPTO_MAX__SIZE, 0x00000020
.set CYREG_CRYPTO_PR_CMD, 0x400b0208
.set CYREG_CRYPTO_PR_LFSR_CTL0, 0x400b0210
.set CYFLD_CRYPTO_LFSR32__OFFSET, 0x00000000
.set CYFLD_CRYPTO_LFSR32__SIZE, 0x00000020
.set CYREG_CRYPTO_PR_LFSR_CTL1, 0x400b0214
.set CYFLD_CRYPTO_LFSR31__OFFSET, 0x00000000
.set CYFLD_CRYPTO_LFSR31__SIZE, 0x0000001f
.set CYREG_CRYPTO_PR_LFSR_CTL2, 0x400b0218
.set CYFLD_CRYPTO_LFSR29__OFFSET, 0x00000000
.set CYFLD_CRYPTO_LFSR29__SIZE, 0x0000001d
.set CYREG_CRYPTO_PR_RESULT, 0x400b0220
.set CYFLD_CRYPTO_DATA32__OFFSET, 0x00000000
.set CYFLD_CRYPTO_DATA32__SIZE, 0x00000020
.set CYREG_CRYPTO_TR_CTL0, 0x400b0280
.set CYFLD_CRYPTO_SAMPLE_CLOCK_DIV__OFFSET, 0x00000000
.set CYFLD_CRYPTO_SAMPLE_CLOCK_DIV__SIZE, 0x00000008
.set CYFLD_CRYPTO_RED_CLOCK_DIV__OFFSET, 0x00000008
.set CYFLD_CRYPTO_RED_CLOCK_DIV__SIZE, 0x00000008
.set CYFLD_CRYPTO_INIT_DELAY__OFFSET, 0x00000010
.set CYFLD_CRYPTO_INIT_DELAY__SIZE, 0x00000008
.set CYFLD_CRYPTO_VON_NEUMANN_CORR__OFFSET, 0x00000018
.set CYFLD_CRYPTO_VON_NEUMANN_CORR__SIZE, 0x00000001
.set CYFLD_CRYPTO_STOP_ON_AP_DETECT__OFFSET, 0x0000001c
.set CYFLD_CRYPTO_STOP_ON_AP_DETECT__SIZE, 0x00000001
.set CYFLD_CRYPTO_STOP_ON_RC_DETECT__OFFSET, 0x0000001d
.set CYFLD_CRYPTO_STOP_ON_RC_DETECT__SIZE, 0x00000001
.set CYREG_CRYPTO_TR_CTL1, 0x400b0284
.set CYFLD_CRYPTO_DATA_BIT_SIZE__OFFSET, 0x00000000
.set CYFLD_CRYPTO_DATA_BIT_SIZE__SIZE, 0x00000006
.set CYREG_CRYPTO_TR_RESULT0, 0x400b0288
.set CYREG_CRYPTO_TR_RESULT1, 0x400b028c
.set CYREG_CRYPTO_TR_CMD, 0x400b0290
.set CYFLD_CRYPTO_START_RO11__OFFSET, 0x00000000
.set CYFLD_CRYPTO_START_RO11__SIZE, 0x00000001
.set CYFLD_CRYPTO_START_RO15__OFFSET, 0x00000001
.set CYFLD_CRYPTO_START_RO15__SIZE, 0x00000001
.set CYFLD_CRYPTO_START_GARO15__OFFSET, 0x00000002
.set CYFLD_CRYPTO_START_GARO15__SIZE, 0x00000001
.set CYFLD_CRYPTO_START_GARO31__OFFSET, 0x00000003
.set CYFLD_CRYPTO_START_GARO31__SIZE, 0x00000001
.set CYFLD_CRYPTO_START_FIRO15__OFFSET, 0x00000004
.set CYFLD_CRYPTO_START_FIRO15__SIZE, 0x00000001
.set CYFLD_CRYPTO_START_FIRO31__OFFSET, 0x00000005
.set CYFLD_CRYPTO_START_FIRO31__SIZE, 0x00000001
.set CYREG_CRYPTO_TR_GARO_CTL, 0x400b02a0
.set CYFLD_CRYPTO_POLYNOMIAL31__OFFSET, 0x00000000
.set CYFLD_CRYPTO_POLYNOMIAL31__SIZE, 0x0000001f
.set CYREG_CRYPTO_TR_FIRO_CTL, 0x400b02a4
.set CYREG_CRYPTO_TR_MON_CTL, 0x400b02c0
.set CYFLD_CRYPTO_BITSTREAM_SEL__OFFSET, 0x00000000
.set CYFLD_CRYPTO_BITSTREAM_SEL__SIZE, 0x00000002
.set CYREG_CRYPTO_TR_MON_CMD, 0x400b02c8
.set CYFLD_CRYPTO_START_AP__OFFSET, 0x00000000
.set CYFLD_CRYPTO_START_AP__SIZE, 0x00000001
.set CYFLD_CRYPTO_START_RC__OFFSET, 0x00000001
.set CYFLD_CRYPTO_START_RC__SIZE, 0x00000001
.set CYREG_CRYPTO_TR_MON_RC_CTL, 0x400b02d0
.set CYFLD_CRYPTO_CUTOFF_COUNT8__OFFSET, 0x00000000
.set CYFLD_CRYPTO_CUTOFF_COUNT8__SIZE, 0x00000008
.set CYREG_CRYPTO_TR_MON_RC_STATUS0, 0x400b02d8
.set CYFLD_CRYPTO_BIT__OFFSET, 0x00000000
.set CYFLD_CRYPTO_BIT__SIZE, 0x00000001
.set CYREG_CRYPTO_TR_MON_RC_STATUS1, 0x400b02dc
.set CYFLD_CRYPTO_REP_COUNT__OFFSET, 0x00000000
.set CYFLD_CRYPTO_REP_COUNT__SIZE, 0x00000008
.set CYREG_CRYPTO_TR_MON_AP_CTL, 0x400b02e0
.set CYFLD_CRYPTO_CUTOFF_COUNT16__OFFSET, 0x00000000
.set CYFLD_CRYPTO_CUTOFF_COUNT16__SIZE, 0x00000010
.set CYFLD_CRYPTO_WINDOW_SIZE__OFFSET, 0x00000010
.set CYFLD_CRYPTO_WINDOW_SIZE__SIZE, 0x00000010
.set CYREG_CRYPTO_TR_MON_AP_STATUS0, 0x400b02e8
.set CYREG_CRYPTO_TR_MON_AP_STATUS1, 0x400b02ec
.set CYFLD_CRYPTO_OCC_COUNT__OFFSET, 0x00000000
.set CYFLD_CRYPTO_OCC_COUNT__SIZE, 0x00000010
.set CYFLD_CRYPTO_WINDOW_INDEX__OFFSET, 0x00000010
.set CYFLD_CRYPTO_WINDOW_INDEX__SIZE, 0x00000010
.set CYREG_CRYPTO_SHA_CTL, 0x400b0300
.set CYFLD_CRYPTO_MODE__OFFSET, 0x00000000
.set CYFLD_CRYPTO_MODE__SIZE, 0x00000003
.set CYREG_CRYPTO_CRC_DATA_CTL0, 0x400b0400
.set CYFLD_CRYPTO_DATA_REVERSE__OFFSET, 0x00000000
.set CYFLD_CRYPTO_DATA_REVERSE__SIZE, 0x00000001
.set CYFLD_CRYPTO_DATA_SIZE__OFFSET, 0x00000010
.set CYFLD_CRYPTO_DATA_SIZE__SIZE, 0x00000010
.set CYREG_CRYPTO_CRC_DATA_CTL1, 0x400b0404
.set CYFLD_CRYPTO_DATA_XOR__OFFSET, 0x00000000
.set CYFLD_CRYPTO_DATA_XOR__SIZE, 0x00000008
.set CYREG_CRYPTO_CRC_POL_CTL, 0x400b0410
.set CYFLD_CRYPTO_POLYNOMIAL__OFFSET, 0x00000000
.set CYFLD_CRYPTO_POLYNOMIAL__SIZE, 0x00000020
.set CYREG_CRYPTO_CRC_LFSR_CTL, 0x400b0414
.set CYREG_CRYPTO_CRC_REM_CTL0, 0x400b0420
.set CYFLD_CRYPTO_REM_REVERSE__OFFSET, 0x00000000
.set CYFLD_CRYPTO_REM_REVERSE__SIZE, 0x00000001
.set CYREG_CRYPTO_CRC_REM_CTL1, 0x400b0424
.set CYFLD_CRYPTO_REM_XOR__OFFSET, 0x00000000
.set CYFLD_CRYPTO_REM_XOR__SIZE, 0x00000020
.set CYREG_CRYPTO_CRC_REM, 0x400b0428
.set CYFLD_CRYPTO_REM__OFFSET, 0x00000000
.set CYFLD_CRYPTO_REM__SIZE, 0x00000020
.set CYREG_CRYPTO_INTR, 0x400b07c0
.set CYFLD_CRYPTO_DONE__OFFSET, 0x00000000
.set CYFLD_CRYPTO_DONE__SIZE, 0x00000001
.set CYFLD_CRYPTO_ACCESS_ERROR__OFFSET, 0x00000001
.set CYFLD_CRYPTO_ACCESS_ERROR__SIZE, 0x00000001
.set CYFLD_CRYPTO_TR_INITIALIZED__OFFSET, 0x00000006
.set CYFLD_CRYPTO_TR_INITIALIZED__SIZE, 0x00000001
.set CYFLD_CRYPTO_TR_DATA_AVAILABLE__OFFSET, 0x00000007
.set CYFLD_CRYPTO_TR_DATA_AVAILABLE__SIZE, 0x00000001
.set CYFLD_CRYPTO_TR_AP_DETECT__OFFSET, 0x00000008
.set CYFLD_CRYPTO_TR_AP_DETECT__SIZE, 0x00000001
.set CYFLD_CRYPTO_TR_RC_DETECT__OFFSET, 0x00000009
.set CYFLD_CRYPTO_TR_RC_DETECT__SIZE, 0x00000001
.set CYREG_CRYPTO_INTR_SET, 0x400b07c4
.set CYREG_CRYPTO_INTR_MASK, 0x400b07c8
.set CYREG_CRYPTO_INTR_MASKED, 0x400b07cc
.set CYREG_CRYPTO_MEM_BUFF0, 0x400b0800
.set CYREG_CRYPTO_MEM_BUFF1, 0x400b0804
.set CYREG_CRYPTO_MEM_BUFF2, 0x400b0808
.set CYREG_CRYPTO_MEM_BUFF3, 0x400b080c
.set CYREG_CRYPTO_MEM_BUFF4, 0x400b0810
.set CYREG_CRYPTO_MEM_BUFF5, 0x400b0814
.set CYREG_CRYPTO_MEM_BUFF6, 0x400b0818
.set CYREG_CRYPTO_MEM_BUFF7, 0x400b081c
.set CYREG_CRYPTO_MEM_BUFF8, 0x400b0820
.set CYREG_CRYPTO_MEM_BUFF9, 0x400b0824
.set CYREG_CRYPTO_MEM_BUFF10, 0x400b0828
.set CYREG_CRYPTO_MEM_BUFF11, 0x400b082c
.set CYREG_CRYPTO_MEM_BUFF12, 0x400b0830
.set CYREG_CRYPTO_MEM_BUFF13, 0x400b0834
.set CYREG_CRYPTO_MEM_BUFF14, 0x400b0838
.set CYREG_CRYPTO_MEM_BUFF15, 0x400b083c
.set CYREG_CRYPTO_MEM_BUFF16, 0x400b0840
.set CYREG_CRYPTO_MEM_BUFF17, 0x400b0844
.set CYREG_CRYPTO_MEM_BUFF18, 0x400b0848
.set CYREG_CRYPTO_MEM_BUFF19, 0x400b084c
.set CYREG_CRYPTO_MEM_BUFF20, 0x400b0850
.set CYREG_CRYPTO_MEM_BUFF21, 0x400b0854
.set CYREG_CRYPTO_MEM_BUFF22, 0x400b0858
.set CYREG_CRYPTO_MEM_BUFF23, 0x400b085c
.set CYREG_CRYPTO_MEM_BUFF24, 0x400b0860
.set CYREG_CRYPTO_MEM_BUFF25, 0x400b0864
.set CYREG_CRYPTO_MEM_BUFF26, 0x400b0868
.set CYREG_CRYPTO_MEM_BUFF27, 0x400b086c
.set CYREG_CRYPTO_MEM_BUFF28, 0x400b0870
.set CYREG_CRYPTO_MEM_BUFF29, 0x400b0874
.set CYREG_CRYPTO_MEM_BUFF30, 0x400b0878
.set CYREG_CRYPTO_MEM_BUFF31, 0x400b087c
.set CYREG_CRYPTO_MEM_BUFF32, 0x400b0880
.set CYREG_CRYPTO_MEM_BUFF33, 0x400b0884
.set CYREG_CRYPTO_MEM_BUFF34, 0x400b0888
.set CYREG_CRYPTO_MEM_BUFF35, 0x400b088c
.set CYREG_CRYPTO_MEM_BUFF36, 0x400b0890
.set CYREG_CRYPTO_MEM_BUFF37, 0x400b0894
.set CYREG_CRYPTO_MEM_BUFF38, 0x400b0898
.set CYREG_CRYPTO_MEM_BUFF39, 0x400b089c
.set CYREG_CRYPTO_MEM_BUFF40, 0x400b08a0
.set CYREG_CRYPTO_MEM_BUFF41, 0x400b08a4
.set CYREG_CRYPTO_MEM_BUFF42, 0x400b08a8
.set CYREG_CRYPTO_MEM_BUFF43, 0x400b08ac
.set CYREG_CRYPTO_MEM_BUFF44, 0x400b08b0
.set CYREG_CRYPTO_MEM_BUFF45, 0x400b08b4
.set CYREG_CRYPTO_MEM_BUFF46, 0x400b08b8
.set CYREG_CRYPTO_MEM_BUFF47, 0x400b08bc
.set CYREG_CRYPTO_MEM_BUFF48, 0x400b08c0
.set CYREG_CRYPTO_MEM_BUFF49, 0x400b08c4
.set CYREG_CRYPTO_MEM_BUFF50, 0x400b08c8
.set CYREG_CRYPTO_MEM_BUFF51, 0x400b08cc
.set CYREG_CRYPTO_MEM_BUFF52, 0x400b08d0
.set CYREG_CRYPTO_MEM_BUFF53, 0x400b08d4
.set CYREG_CRYPTO_MEM_BUFF54, 0x400b08d8
.set CYREG_CRYPTO_MEM_BUFF55, 0x400b08dc
.set CYREG_CRYPTO_MEM_BUFF56, 0x400b08e0
.set CYREG_CRYPTO_MEM_BUFF57, 0x400b08e4
.set CYREG_CRYPTO_MEM_BUFF58, 0x400b08e8
.set CYREG_CRYPTO_MEM_BUFF59, 0x400b08ec
.set CYREG_CRYPTO_MEM_BUFF60, 0x400b08f0
.set CYREG_CRYPTO_MEM_BUFF61, 0x400b08f4
.set CYREG_CRYPTO_MEM_BUFF62, 0x400b08f8
.set CYREG_CRYPTO_MEM_BUFF63, 0x400b08fc
.set CYREG_CRYPTO_MEM_BUFF64, 0x400b0900
.set CYREG_CRYPTO_MEM_BUFF65, 0x400b0904
.set CYREG_CRYPTO_MEM_BUFF66, 0x400b0908
.set CYREG_CRYPTO_MEM_BUFF67, 0x400b090c
.set CYREG_CRYPTO_MEM_BUFF68, 0x400b0910
.set CYREG_CRYPTO_MEM_BUFF69, 0x400b0914
.set CYREG_CRYPTO_MEM_BUFF70, 0x400b0918
.set CYREG_CRYPTO_MEM_BUFF71, 0x400b091c
.set CYREG_CRYPTO_MEM_BUFF72, 0x400b0920
.set CYREG_CRYPTO_MEM_BUFF73, 0x400b0924
.set CYREG_CRYPTO_MEM_BUFF74, 0x400b0928
.set CYREG_CRYPTO_MEM_BUFF75, 0x400b092c
.set CYREG_CRYPTO_MEM_BUFF76, 0x400b0930
.set CYREG_CRYPTO_MEM_BUFF77, 0x400b0934
.set CYREG_CRYPTO_MEM_BUFF78, 0x400b0938
.set CYREG_CRYPTO_MEM_BUFF79, 0x400b093c
.set CYREG_CRYPTO_MEM_BUFF80, 0x400b0940
.set CYREG_CRYPTO_MEM_BUFF81, 0x400b0944
.set CYREG_CRYPTO_MEM_BUFF82, 0x400b0948
.set CYREG_CRYPTO_MEM_BUFF83, 0x400b094c
.set CYREG_CRYPTO_MEM_BUFF84, 0x400b0950
.set CYREG_CRYPTO_MEM_BUFF85, 0x400b0954
.set CYREG_CRYPTO_MEM_BUFF86, 0x400b0958
.set CYREG_CRYPTO_MEM_BUFF87, 0x400b095c
.set CYREG_CRYPTO_MEM_BUFF88, 0x400b0960
.set CYREG_CRYPTO_MEM_BUFF89, 0x400b0964
.set CYREG_CRYPTO_MEM_BUFF90, 0x400b0968
.set CYREG_CRYPTO_MEM_BUFF91, 0x400b096c
.set CYREG_CRYPTO_MEM_BUFF92, 0x400b0970
.set CYREG_CRYPTO_MEM_BUFF93, 0x400b0974
.set CYREG_CRYPTO_MEM_BUFF94, 0x400b0978
.set CYREG_CRYPTO_MEM_BUFF95, 0x400b097c
.set CYREG_CRYPTO_MEM_BUFF96, 0x400b0980
.set CYREG_CRYPTO_MEM_BUFF97, 0x400b0984
.set CYREG_CRYPTO_MEM_BUFF98, 0x400b0988
.set CYREG_CRYPTO_MEM_BUFF99, 0x400b098c
.set CYREG_CRYPTO_MEM_BUFF100, 0x400b0990
.set CYREG_CRYPTO_MEM_BUFF101, 0x400b0994
.set CYREG_CRYPTO_MEM_BUFF102, 0x400b0998
.set CYREG_CRYPTO_MEM_BUFF103, 0x400b099c
.set CYREG_CRYPTO_MEM_BUFF104, 0x400b09a0
.set CYREG_CRYPTO_MEM_BUFF105, 0x400b09a4
.set CYREG_CRYPTO_MEM_BUFF106, 0x400b09a8
.set CYREG_CRYPTO_MEM_BUFF107, 0x400b09ac
.set CYREG_CRYPTO_MEM_BUFF108, 0x400b09b0
.set CYREG_CRYPTO_MEM_BUFF109, 0x400b09b4
.set CYREG_CRYPTO_MEM_BUFF110, 0x400b09b8
.set CYREG_CRYPTO_MEM_BUFF111, 0x400b09bc
.set CYREG_CRYPTO_MEM_BUFF112, 0x400b09c0
.set CYREG_CRYPTO_MEM_BUFF113, 0x400b09c4
.set CYREG_CRYPTO_MEM_BUFF114, 0x400b09c8
.set CYREG_CRYPTO_MEM_BUFF115, 0x400b09cc
.set CYREG_CRYPTO_MEM_BUFF116, 0x400b09d0
.set CYREG_CRYPTO_MEM_BUFF117, 0x400b09d4
.set CYREG_CRYPTO_MEM_BUFF118, 0x400b09d8
.set CYREG_CRYPTO_MEM_BUFF119, 0x400b09dc
.set CYREG_CRYPTO_MEM_BUFF120, 0x400b09e0
.set CYREG_CRYPTO_MEM_BUFF121, 0x400b09e4
.set CYREG_CRYPTO_MEM_BUFF122, 0x400b09e8
.set CYREG_CRYPTO_MEM_BUFF123, 0x400b09ec
.set CYREG_CRYPTO_MEM_BUFF124, 0x400b09f0
.set CYREG_CRYPTO_MEM_BUFF125, 0x400b09f4
.set CYREG_CRYPTO_MEM_BUFF126, 0x400b09f8
.set CYREG_CRYPTO_MEM_BUFF127, 0x400b09fc
.set CYREG_CRYPTO_MEM_BUFF128, 0x400b0a00
.set CYREG_CRYPTO_MEM_BUFF129, 0x400b0a04
.set CYREG_CRYPTO_MEM_BUFF130, 0x400b0a08
.set CYREG_CRYPTO_MEM_BUFF131, 0x400b0a0c
.set CYREG_CRYPTO_MEM_BUFF132, 0x400b0a10
.set CYREG_CRYPTO_MEM_BUFF133, 0x400b0a14
.set CYREG_CRYPTO_MEM_BUFF134, 0x400b0a18
.set CYREG_CRYPTO_MEM_BUFF135, 0x400b0a1c
.set CYREG_CRYPTO_MEM_BUFF136, 0x400b0a20
.set CYREG_CRYPTO_MEM_BUFF137, 0x400b0a24
.set CYREG_CRYPTO_MEM_BUFF138, 0x400b0a28
.set CYREG_CRYPTO_MEM_BUFF139, 0x400b0a2c
.set CYREG_CRYPTO_MEM_BUFF140, 0x400b0a30
.set CYREG_CRYPTO_MEM_BUFF141, 0x400b0a34
.set CYREG_CRYPTO_MEM_BUFF142, 0x400b0a38
.set CYREG_CRYPTO_MEM_BUFF143, 0x400b0a3c
.set CYREG_CRYPTO_MEM_BUFF144, 0x400b0a40
.set CYREG_CRYPTO_MEM_BUFF145, 0x400b0a44
.set CYREG_CRYPTO_MEM_BUFF146, 0x400b0a48
.set CYREG_CRYPTO_MEM_BUFF147, 0x400b0a4c
.set CYREG_CRYPTO_MEM_BUFF148, 0x400b0a50
.set CYREG_CRYPTO_MEM_BUFF149, 0x400b0a54
.set CYREG_CRYPTO_MEM_BUFF150, 0x400b0a58
.set CYREG_CRYPTO_MEM_BUFF151, 0x400b0a5c
.set CYREG_CRYPTO_MEM_BUFF152, 0x400b0a60
.set CYREG_CRYPTO_MEM_BUFF153, 0x400b0a64
.set CYREG_CRYPTO_MEM_BUFF154, 0x400b0a68
.set CYREG_CRYPTO_MEM_BUFF155, 0x400b0a6c
.set CYREG_CRYPTO_MEM_BUFF156, 0x400b0a70
.set CYREG_CRYPTO_MEM_BUFF157, 0x400b0a74
.set CYREG_CRYPTO_MEM_BUFF158, 0x400b0a78
.set CYREG_CRYPTO_MEM_BUFF159, 0x400b0a7c
.set CYREG_CRYPTO_MEM_BUFF160, 0x400b0a80
.set CYREG_CRYPTO_MEM_BUFF161, 0x400b0a84
.set CYREG_CRYPTO_MEM_BUFF162, 0x400b0a88
.set CYREG_CRYPTO_MEM_BUFF163, 0x400b0a8c
.set CYREG_CRYPTO_MEM_BUFF164, 0x400b0a90
.set CYREG_CRYPTO_MEM_BUFF165, 0x400b0a94
.set CYREG_CRYPTO_MEM_BUFF166, 0x400b0a98
.set CYREG_CRYPTO_MEM_BUFF167, 0x400b0a9c
.set CYREG_CRYPTO_MEM_BUFF168, 0x400b0aa0
.set CYREG_CRYPTO_MEM_BUFF169, 0x400b0aa4
.set CYREG_CRYPTO_MEM_BUFF170, 0x400b0aa8
.set CYREG_CRYPTO_MEM_BUFF171, 0x400b0aac
.set CYREG_CRYPTO_MEM_BUFF172, 0x400b0ab0
.set CYREG_CRYPTO_MEM_BUFF173, 0x400b0ab4
.set CYREG_CRYPTO_MEM_BUFF174, 0x400b0ab8
.set CYREG_CRYPTO_MEM_BUFF175, 0x400b0abc
.set CYREG_CRYPTO_MEM_BUFF176, 0x400b0ac0
.set CYREG_CRYPTO_MEM_BUFF177, 0x400b0ac4
.set CYREG_CRYPTO_MEM_BUFF178, 0x400b0ac8
.set CYREG_CRYPTO_MEM_BUFF179, 0x400b0acc
.set CYREG_CRYPTO_MEM_BUFF180, 0x400b0ad0
.set CYREG_CRYPTO_MEM_BUFF181, 0x400b0ad4
.set CYREG_CRYPTO_MEM_BUFF182, 0x400b0ad8
.set CYREG_CRYPTO_MEM_BUFF183, 0x400b0adc
.set CYREG_CRYPTO_MEM_BUFF184, 0x400b0ae0
.set CYREG_CRYPTO_MEM_BUFF185, 0x400b0ae4
.set CYREG_CRYPTO_MEM_BUFF186, 0x400b0ae8
.set CYREG_CRYPTO_MEM_BUFF187, 0x400b0aec
.set CYREG_CRYPTO_MEM_BUFF188, 0x400b0af0
.set CYREG_CRYPTO_MEM_BUFF189, 0x400b0af4
.set CYREG_CRYPTO_MEM_BUFF190, 0x400b0af8
.set CYREG_CRYPTO_MEM_BUFF191, 0x400b0afc
.set CYREG_CRYPTO_MEM_BUFF192, 0x400b0b00
.set CYREG_CRYPTO_MEM_BUFF193, 0x400b0b04
.set CYREG_CRYPTO_MEM_BUFF194, 0x400b0b08
.set CYREG_CRYPTO_MEM_BUFF195, 0x400b0b0c
.set CYREG_CRYPTO_MEM_BUFF196, 0x400b0b10
.set CYREG_CRYPTO_MEM_BUFF197, 0x400b0b14
.set CYREG_CRYPTO_MEM_BUFF198, 0x400b0b18
.set CYREG_CRYPTO_MEM_BUFF199, 0x400b0b1c
.set CYREG_CRYPTO_MEM_BUFF200, 0x400b0b20
.set CYREG_CRYPTO_MEM_BUFF201, 0x400b0b24
.set CYREG_CRYPTO_MEM_BUFF202, 0x400b0b28
.set CYREG_CRYPTO_MEM_BUFF203, 0x400b0b2c
.set CYREG_CRYPTO_MEM_BUFF204, 0x400b0b30
.set CYREG_CRYPTO_MEM_BUFF205, 0x400b0b34
.set CYREG_CRYPTO_MEM_BUFF206, 0x400b0b38
.set CYREG_CRYPTO_MEM_BUFF207, 0x400b0b3c
.set CYREG_CRYPTO_MEM_BUFF208, 0x400b0b40
.set CYREG_CRYPTO_MEM_BUFF209, 0x400b0b44
.set CYREG_CRYPTO_MEM_BUFF210, 0x400b0b48
.set CYREG_CRYPTO_MEM_BUFF211, 0x400b0b4c
.set CYREG_CRYPTO_MEM_BUFF212, 0x400b0b50
.set CYREG_CRYPTO_MEM_BUFF213, 0x400b0b54
.set CYREG_CRYPTO_MEM_BUFF214, 0x400b0b58
.set CYREG_CRYPTO_MEM_BUFF215, 0x400b0b5c
.set CYREG_CRYPTO_MEM_BUFF216, 0x400b0b60
.set CYREG_CRYPTO_MEM_BUFF217, 0x400b0b64
.set CYREG_CRYPTO_MEM_BUFF218, 0x400b0b68
.set CYREG_CRYPTO_MEM_BUFF219, 0x400b0b6c
.set CYREG_CRYPTO_MEM_BUFF220, 0x400b0b70
.set CYREG_CRYPTO_MEM_BUFF221, 0x400b0b74
.set CYREG_CRYPTO_MEM_BUFF222, 0x400b0b78
.set CYREG_CRYPTO_MEM_BUFF223, 0x400b0b7c
.set CYREG_CRYPTO_MEM_BUFF224, 0x400b0b80
.set CYREG_CRYPTO_MEM_BUFF225, 0x400b0b84
.set CYREG_CRYPTO_MEM_BUFF226, 0x400b0b88
.set CYREG_CRYPTO_MEM_BUFF227, 0x400b0b8c
.set CYREG_CRYPTO_MEM_BUFF228, 0x400b0b90
.set CYREG_CRYPTO_MEM_BUFF229, 0x400b0b94
.set CYREG_CRYPTO_MEM_BUFF230, 0x400b0b98
.set CYREG_CRYPTO_MEM_BUFF231, 0x400b0b9c
.set CYREG_CRYPTO_MEM_BUFF232, 0x400b0ba0
.set CYREG_CRYPTO_MEM_BUFF233, 0x400b0ba4
.set CYREG_CRYPTO_MEM_BUFF234, 0x400b0ba8
.set CYREG_CRYPTO_MEM_BUFF235, 0x400b0bac
.set CYREG_CRYPTO_MEM_BUFF236, 0x400b0bb0
.set CYREG_CRYPTO_MEM_BUFF237, 0x400b0bb4
.set CYREG_CRYPTO_MEM_BUFF238, 0x400b0bb8
.set CYREG_CRYPTO_MEM_BUFF239, 0x400b0bbc
.set CYREG_CRYPTO_MEM_BUFF240, 0x400b0bc0
.set CYREG_CRYPTO_MEM_BUFF241, 0x400b0bc4
.set CYREG_CRYPTO_MEM_BUFF242, 0x400b0bc8
.set CYREG_CRYPTO_MEM_BUFF243, 0x400b0bcc
.set CYREG_CRYPTO_MEM_BUFF244, 0x400b0bd0
.set CYREG_CRYPTO_MEM_BUFF245, 0x400b0bd4
.set CYREG_CRYPTO_MEM_BUFF246, 0x400b0bd8
.set CYREG_CRYPTO_MEM_BUFF247, 0x400b0bdc
.set CYREG_CRYPTO_MEM_BUFF248, 0x400b0be0
.set CYREG_CRYPTO_MEM_BUFF249, 0x400b0be4
.set CYREG_CRYPTO_MEM_BUFF250, 0x400b0be8
.set CYREG_CRYPTO_MEM_BUFF251, 0x400b0bec
.set CYREG_CRYPTO_MEM_BUFF252, 0x400b0bf0
.set CYREG_CRYPTO_MEM_BUFF253, 0x400b0bf4
.set CYREG_CRYPTO_MEM_BUFF254, 0x400b0bf8
.set CYREG_CRYPTO_MEM_BUFF255, 0x400b0bfc
.set CYREG_CRYPTO_MEM_BUFF256, 0x400b0c00
.set CYREG_CRYPTO_MEM_BUFF257, 0x400b0c04
.set CYREG_CRYPTO_MEM_BUFF258, 0x400b0c08
.set CYREG_CRYPTO_MEM_BUFF259, 0x400b0c0c
.set CYREG_CRYPTO_MEM_BUFF260, 0x400b0c10
.set CYREG_CRYPTO_MEM_BUFF261, 0x400b0c14
.set CYREG_CRYPTO_MEM_BUFF262, 0x400b0c18
.set CYREG_CRYPTO_MEM_BUFF263, 0x400b0c1c
.set CYREG_CRYPTO_MEM_BUFF264, 0x400b0c20
.set CYREG_CRYPTO_MEM_BUFF265, 0x400b0c24
.set CYREG_CRYPTO_MEM_BUFF266, 0x400b0c28
.set CYREG_CRYPTO_MEM_BUFF267, 0x400b0c2c
.set CYREG_CRYPTO_MEM_BUFF268, 0x400b0c30
.set CYREG_CRYPTO_MEM_BUFF269, 0x400b0c34
.set CYREG_CRYPTO_MEM_BUFF270, 0x400b0c38
.set CYREG_CRYPTO_MEM_BUFF271, 0x400b0c3c
.set CYREG_CRYPTO_MEM_BUFF272, 0x400b0c40
.set CYREG_CRYPTO_MEM_BUFF273, 0x400b0c44
.set CYREG_CRYPTO_MEM_BUFF274, 0x400b0c48
.set CYREG_CRYPTO_MEM_BUFF275, 0x400b0c4c
.set CYREG_CRYPTO_MEM_BUFF276, 0x400b0c50
.set CYREG_CRYPTO_MEM_BUFF277, 0x400b0c54
.set CYREG_CRYPTO_MEM_BUFF278, 0x400b0c58
.set CYREG_CRYPTO_MEM_BUFF279, 0x400b0c5c
.set CYREG_CRYPTO_MEM_BUFF280, 0x400b0c60
.set CYREG_CRYPTO_MEM_BUFF281, 0x400b0c64
.set CYREG_CRYPTO_MEM_BUFF282, 0x400b0c68
.set CYREG_CRYPTO_MEM_BUFF283, 0x400b0c6c
.set CYREG_CRYPTO_MEM_BUFF284, 0x400b0c70
.set CYREG_CRYPTO_MEM_BUFF285, 0x400b0c74
.set CYREG_CRYPTO_MEM_BUFF286, 0x400b0c78
.set CYREG_CRYPTO_MEM_BUFF287, 0x400b0c7c
.set CYREG_CRYPTO_MEM_BUFF288, 0x400b0c80
.set CYREG_CRYPTO_MEM_BUFF289, 0x400b0c84
.set CYREG_CRYPTO_MEM_BUFF290, 0x400b0c88
.set CYREG_CRYPTO_MEM_BUFF291, 0x400b0c8c
.set CYREG_CRYPTO_MEM_BUFF292, 0x400b0c90
.set CYREG_CRYPTO_MEM_BUFF293, 0x400b0c94
.set CYREG_CRYPTO_MEM_BUFF294, 0x400b0c98
.set CYREG_CRYPTO_MEM_BUFF295, 0x400b0c9c
.set CYREG_CRYPTO_MEM_BUFF296, 0x400b0ca0
.set CYREG_CRYPTO_MEM_BUFF297, 0x400b0ca4
.set CYREG_CRYPTO_MEM_BUFF298, 0x400b0ca8
.set CYREG_CRYPTO_MEM_BUFF299, 0x400b0cac
.set CYREG_CRYPTO_MEM_BUFF300, 0x400b0cb0
.set CYREG_CRYPTO_MEM_BUFF301, 0x400b0cb4
.set CYREG_CRYPTO_MEM_BUFF302, 0x400b0cb8
.set CYREG_CRYPTO_MEM_BUFF303, 0x400b0cbc
.set CYREG_CRYPTO_MEM_BUFF304, 0x400b0cc0
.set CYREG_CRYPTO_MEM_BUFF305, 0x400b0cc4
.set CYREG_CRYPTO_MEM_BUFF306, 0x400b0cc8
.set CYREG_CRYPTO_MEM_BUFF307, 0x400b0ccc
.set CYREG_CRYPTO_MEM_BUFF308, 0x400b0cd0
.set CYREG_CRYPTO_MEM_BUFF309, 0x400b0cd4
.set CYREG_CRYPTO_MEM_BUFF310, 0x400b0cd8
.set CYREG_CRYPTO_MEM_BUFF311, 0x400b0cdc
.set CYREG_CRYPTO_MEM_BUFF312, 0x400b0ce0
.set CYREG_CRYPTO_MEM_BUFF313, 0x400b0ce4
.set CYREG_CRYPTO_MEM_BUFF314, 0x400b0ce8
.set CYREG_CRYPTO_MEM_BUFF315, 0x400b0cec
.set CYREG_CRYPTO_MEM_BUFF316, 0x400b0cf0
.set CYREG_CRYPTO_MEM_BUFF317, 0x400b0cf4
.set CYREG_CRYPTO_MEM_BUFF318, 0x400b0cf8
.set CYREG_CRYPTO_MEM_BUFF319, 0x400b0cfc
.set CYREG_CRYPTO_MEM_BUFF320, 0x400b0d00
.set CYREG_CRYPTO_MEM_BUFF321, 0x400b0d04
.set CYREG_CRYPTO_MEM_BUFF322, 0x400b0d08
.set CYREG_CRYPTO_MEM_BUFF323, 0x400b0d0c
.set CYREG_CRYPTO_MEM_BUFF324, 0x400b0d10
.set CYREG_CRYPTO_MEM_BUFF325, 0x400b0d14
.set CYREG_CRYPTO_MEM_BUFF326, 0x400b0d18
.set CYREG_CRYPTO_MEM_BUFF327, 0x400b0d1c
.set CYREG_CRYPTO_MEM_BUFF328, 0x400b0d20
.set CYREG_CRYPTO_MEM_BUFF329, 0x400b0d24
.set CYREG_CRYPTO_MEM_BUFF330, 0x400b0d28
.set CYREG_CRYPTO_MEM_BUFF331, 0x400b0d2c
.set CYREG_CRYPTO_MEM_BUFF332, 0x400b0d30
.set CYREG_CRYPTO_MEM_BUFF333, 0x400b0d34
.set CYREG_CRYPTO_MEM_BUFF334, 0x400b0d38
.set CYREG_CRYPTO_MEM_BUFF335, 0x400b0d3c
.set CYREG_CRYPTO_MEM_BUFF336, 0x400b0d40
.set CYREG_CRYPTO_MEM_BUFF337, 0x400b0d44
.set CYREG_CRYPTO_MEM_BUFF338, 0x400b0d48
.set CYREG_CRYPTO_MEM_BUFF339, 0x400b0d4c
.set CYREG_CRYPTO_MEM_BUFF340, 0x400b0d50
.set CYREG_CRYPTO_MEM_BUFF341, 0x400b0d54
.set CYREG_CRYPTO_MEM_BUFF342, 0x400b0d58
.set CYREG_CRYPTO_MEM_BUFF343, 0x400b0d5c
.set CYREG_CRYPTO_MEM_BUFF344, 0x400b0d60
.set CYREG_CRYPTO_MEM_BUFF345, 0x400b0d64
.set CYREG_CRYPTO_MEM_BUFF346, 0x400b0d68
.set CYREG_CRYPTO_MEM_BUFF347, 0x400b0d6c
.set CYREG_CRYPTO_MEM_BUFF348, 0x400b0d70
.set CYREG_CRYPTO_MEM_BUFF349, 0x400b0d74
.set CYREG_CRYPTO_MEM_BUFF350, 0x400b0d78
.set CYREG_CRYPTO_MEM_BUFF351, 0x400b0d7c
.set CYREG_CRYPTO_MEM_BUFF352, 0x400b0d80
.set CYREG_CRYPTO_MEM_BUFF353, 0x400b0d84
.set CYREG_CRYPTO_MEM_BUFF354, 0x400b0d88
.set CYREG_CRYPTO_MEM_BUFF355, 0x400b0d8c
.set CYREG_CRYPTO_MEM_BUFF356, 0x400b0d90
.set CYREG_CRYPTO_MEM_BUFF357, 0x400b0d94
.set CYREG_CRYPTO_MEM_BUFF358, 0x400b0d98
.set CYREG_CRYPTO_MEM_BUFF359, 0x400b0d9c
.set CYREG_CRYPTO_MEM_BUFF360, 0x400b0da0
.set CYREG_CRYPTO_MEM_BUFF361, 0x400b0da4
.set CYREG_CRYPTO_MEM_BUFF362, 0x400b0da8
.set CYREG_CRYPTO_MEM_BUFF363, 0x400b0dac
.set CYREG_CRYPTO_MEM_BUFF364, 0x400b0db0
.set CYREG_CRYPTO_MEM_BUFF365, 0x400b0db4
.set CYREG_CRYPTO_MEM_BUFF366, 0x400b0db8
.set CYREG_CRYPTO_MEM_BUFF367, 0x400b0dbc
.set CYREG_CRYPTO_MEM_BUFF368, 0x400b0dc0
.set CYREG_CRYPTO_MEM_BUFF369, 0x400b0dc4
.set CYREG_CRYPTO_MEM_BUFF370, 0x400b0dc8
.set CYREG_CRYPTO_MEM_BUFF371, 0x400b0dcc
.set CYREG_CRYPTO_MEM_BUFF372, 0x400b0dd0
.set CYREG_CRYPTO_MEM_BUFF373, 0x400b0dd4
.set CYREG_CRYPTO_MEM_BUFF374, 0x400b0dd8
.set CYREG_CRYPTO_MEM_BUFF375, 0x400b0ddc
.set CYREG_CRYPTO_MEM_BUFF376, 0x400b0de0
.set CYREG_CRYPTO_MEM_BUFF377, 0x400b0de4
.set CYREG_CRYPTO_MEM_BUFF378, 0x400b0de8
.set CYREG_CRYPTO_MEM_BUFF379, 0x400b0dec
.set CYREG_CRYPTO_MEM_BUFF380, 0x400b0df0
.set CYREG_CRYPTO_MEM_BUFF381, 0x400b0df4
.set CYREG_CRYPTO_MEM_BUFF382, 0x400b0df8
.set CYREG_CRYPTO_MEM_BUFF383, 0x400b0dfc
.set CYREG_CRYPTO_MEM_BUFF384, 0x400b0e00
.set CYREG_CRYPTO_MEM_BUFF385, 0x400b0e04
.set CYREG_CRYPTO_MEM_BUFF386, 0x400b0e08
.set CYREG_CRYPTO_MEM_BUFF387, 0x400b0e0c
.set CYREG_CRYPTO_MEM_BUFF388, 0x400b0e10
.set CYREG_CRYPTO_MEM_BUFF389, 0x400b0e14
.set CYREG_CRYPTO_MEM_BUFF390, 0x400b0e18
.set CYREG_CRYPTO_MEM_BUFF391, 0x400b0e1c
.set CYREG_CRYPTO_MEM_BUFF392, 0x400b0e20
.set CYREG_CRYPTO_MEM_BUFF393, 0x400b0e24
.set CYREG_CRYPTO_MEM_BUFF394, 0x400b0e28
.set CYREG_CRYPTO_MEM_BUFF395, 0x400b0e2c
.set CYREG_CRYPTO_MEM_BUFF396, 0x400b0e30
.set CYREG_CRYPTO_MEM_BUFF397, 0x400b0e34
.set CYREG_CRYPTO_MEM_BUFF398, 0x400b0e38
.set CYREG_CRYPTO_MEM_BUFF399, 0x400b0e3c
.set CYREG_CRYPTO_MEM_BUFF400, 0x400b0e40
.set CYREG_CRYPTO_MEM_BUFF401, 0x400b0e44
.set CYREG_CRYPTO_MEM_BUFF402, 0x400b0e48
.set CYREG_CRYPTO_MEM_BUFF403, 0x400b0e4c
.set CYREG_CRYPTO_MEM_BUFF404, 0x400b0e50
.set CYREG_CRYPTO_MEM_BUFF405, 0x400b0e54
.set CYREG_CRYPTO_MEM_BUFF406, 0x400b0e58
.set CYREG_CRYPTO_MEM_BUFF407, 0x400b0e5c
.set CYREG_CRYPTO_MEM_BUFF408, 0x400b0e60
.set CYREG_CRYPTO_MEM_BUFF409, 0x400b0e64
.set CYREG_CRYPTO_MEM_BUFF410, 0x400b0e68
.set CYREG_CRYPTO_MEM_BUFF411, 0x400b0e6c
.set CYREG_CRYPTO_MEM_BUFF412, 0x400b0e70
.set CYREG_CRYPTO_MEM_BUFF413, 0x400b0e74
.set CYREG_CRYPTO_MEM_BUFF414, 0x400b0e78
.set CYREG_CRYPTO_MEM_BUFF415, 0x400b0e7c
.set CYREG_CRYPTO_MEM_BUFF416, 0x400b0e80
.set CYREG_CRYPTO_MEM_BUFF417, 0x400b0e84
.set CYREG_CRYPTO_MEM_BUFF418, 0x400b0e88
.set CYREG_CRYPTO_MEM_BUFF419, 0x400b0e8c
.set CYREG_CRYPTO_MEM_BUFF420, 0x400b0e90
.set CYREG_CRYPTO_MEM_BUFF421, 0x400b0e94
.set CYREG_CRYPTO_MEM_BUFF422, 0x400b0e98
.set CYREG_CRYPTO_MEM_BUFF423, 0x400b0e9c
.set CYREG_CRYPTO_MEM_BUFF424, 0x400b0ea0
.set CYREG_CRYPTO_MEM_BUFF425, 0x400b0ea4
.set CYREG_CRYPTO_MEM_BUFF426, 0x400b0ea8
.set CYREG_CRYPTO_MEM_BUFF427, 0x400b0eac
.set CYREG_CRYPTO_MEM_BUFF428, 0x400b0eb0
.set CYREG_CRYPTO_MEM_BUFF429, 0x400b0eb4
.set CYREG_CRYPTO_MEM_BUFF430, 0x400b0eb8
.set CYREG_CRYPTO_MEM_BUFF431, 0x400b0ebc
.set CYREG_CRYPTO_MEM_BUFF432, 0x400b0ec0
.set CYREG_CRYPTO_MEM_BUFF433, 0x400b0ec4
.set CYREG_CRYPTO_MEM_BUFF434, 0x400b0ec8
.set CYREG_CRYPTO_MEM_BUFF435, 0x400b0ecc
.set CYREG_CRYPTO_MEM_BUFF436, 0x400b0ed0
.set CYREG_CRYPTO_MEM_BUFF437, 0x400b0ed4
.set CYREG_CRYPTO_MEM_BUFF438, 0x400b0ed8
.set CYREG_CRYPTO_MEM_BUFF439, 0x400b0edc
.set CYREG_CRYPTO_MEM_BUFF440, 0x400b0ee0
.set CYREG_CRYPTO_MEM_BUFF441, 0x400b0ee4
.set CYREG_CRYPTO_MEM_BUFF442, 0x400b0ee8
.set CYREG_CRYPTO_MEM_BUFF443, 0x400b0eec
.set CYREG_CRYPTO_MEM_BUFF444, 0x400b0ef0
.set CYREG_CRYPTO_MEM_BUFF445, 0x400b0ef4
.set CYREG_CRYPTO_MEM_BUFF446, 0x400b0ef8
.set CYREG_CRYPTO_MEM_BUFF447, 0x400b0efc
.set CYREG_CRYPTO_MEM_BUFF448, 0x400b0f00
.set CYREG_CRYPTO_MEM_BUFF449, 0x400b0f04
.set CYREG_CRYPTO_MEM_BUFF450, 0x400b0f08
.set CYREG_CRYPTO_MEM_BUFF451, 0x400b0f0c
.set CYREG_CRYPTO_MEM_BUFF452, 0x400b0f10
.set CYREG_CRYPTO_MEM_BUFF453, 0x400b0f14
.set CYREG_CRYPTO_MEM_BUFF454, 0x400b0f18
.set CYREG_CRYPTO_MEM_BUFF455, 0x400b0f1c
.set CYREG_CRYPTO_MEM_BUFF456, 0x400b0f20
.set CYREG_CRYPTO_MEM_BUFF457, 0x400b0f24
.set CYREG_CRYPTO_MEM_BUFF458, 0x400b0f28
.set CYREG_CRYPTO_MEM_BUFF459, 0x400b0f2c
.set CYREG_CRYPTO_MEM_BUFF460, 0x400b0f30
.set CYREG_CRYPTO_MEM_BUFF461, 0x400b0f34
.set CYREG_CRYPTO_MEM_BUFF462, 0x400b0f38
.set CYREG_CRYPTO_MEM_BUFF463, 0x400b0f3c
.set CYREG_CRYPTO_MEM_BUFF464, 0x400b0f40
.set CYREG_CRYPTO_MEM_BUFF465, 0x400b0f44
.set CYREG_CRYPTO_MEM_BUFF466, 0x400b0f48
.set CYREG_CRYPTO_MEM_BUFF467, 0x400b0f4c
.set CYREG_CRYPTO_MEM_BUFF468, 0x400b0f50
.set CYREG_CRYPTO_MEM_BUFF469, 0x400b0f54
.set CYREG_CRYPTO_MEM_BUFF470, 0x400b0f58
.set CYREG_CRYPTO_MEM_BUFF471, 0x400b0f5c
.set CYREG_CRYPTO_MEM_BUFF472, 0x400b0f60
.set CYREG_CRYPTO_MEM_BUFF473, 0x400b0f64
.set CYREG_CRYPTO_MEM_BUFF474, 0x400b0f68
.set CYREG_CRYPTO_MEM_BUFF475, 0x400b0f6c
.set CYREG_CRYPTO_MEM_BUFF476, 0x400b0f70
.set CYREG_CRYPTO_MEM_BUFF477, 0x400b0f74
.set CYREG_CRYPTO_MEM_BUFF478, 0x400b0f78
.set CYREG_CRYPTO_MEM_BUFF479, 0x400b0f7c
.set CYREG_CRYPTO_MEM_BUFF480, 0x400b0f80
.set CYREG_CRYPTO_MEM_BUFF481, 0x400b0f84
.set CYREG_CRYPTO_MEM_BUFF482, 0x400b0f88
.set CYREG_CRYPTO_MEM_BUFF483, 0x400b0f8c
.set CYREG_CRYPTO_MEM_BUFF484, 0x400b0f90
.set CYREG_CRYPTO_MEM_BUFF485, 0x400b0f94
.set CYREG_CRYPTO_MEM_BUFF486, 0x400b0f98
.set CYREG_CRYPTO_MEM_BUFF487, 0x400b0f9c
.set CYREG_CRYPTO_MEM_BUFF488, 0x400b0fa0
.set CYREG_CRYPTO_MEM_BUFF489, 0x400b0fa4
.set CYREG_CRYPTO_MEM_BUFF490, 0x400b0fa8
.set CYREG_CRYPTO_MEM_BUFF491, 0x400b0fac
.set CYREG_CRYPTO_MEM_BUFF492, 0x400b0fb0
.set CYREG_CRYPTO_MEM_BUFF493, 0x400b0fb4
.set CYREG_CRYPTO_MEM_BUFF494, 0x400b0fb8
.set CYREG_CRYPTO_MEM_BUFF495, 0x400b0fbc
.set CYREG_CRYPTO_MEM_BUFF496, 0x400b0fc0
.set CYREG_CRYPTO_MEM_BUFF497, 0x400b0fc4
.set CYREG_CRYPTO_MEM_BUFF498, 0x400b0fc8
.set CYREG_CRYPTO_MEM_BUFF499, 0x400b0fcc
.set CYREG_CRYPTO_MEM_BUFF500, 0x400b0fd0
.set CYREG_CRYPTO_MEM_BUFF501, 0x400b0fd4
.set CYREG_CRYPTO_MEM_BUFF502, 0x400b0fd8
.set CYREG_CRYPTO_MEM_BUFF503, 0x400b0fdc
.set CYREG_CRYPTO_MEM_BUFF504, 0x400b0fe0
.set CYREG_CRYPTO_MEM_BUFF505, 0x400b0fe4
.set CYREG_CRYPTO_MEM_BUFF506, 0x400b0fe8
.set CYREG_CRYPTO_MEM_BUFF507, 0x400b0fec
.set CYREG_CRYPTO_MEM_BUFF508, 0x400b0ff0
.set CYREG_CRYPTO_MEM_BUFF509, 0x400b0ff4
.set CYREG_CRYPTO_MEM_BUFF510, 0x400b0ff8
.set CYREG_CRYPTO_MEM_BUFF511, 0x400b0ffc
.set CYREG_CRYPTO_PRIV_BUF, 0x400bff00
.set CYFLD_CRYPTO_BUF_PRIV_LIMIT__OFFSET, 0x00000000
.set CYFLD_CRYPTO_BUF_PRIV_LIMIT__SIZE, 0x00000003
.set CYDEV_USBDEVv2_BASE, 0x400c0000
.set CYDEV_USBDEVv2_SIZE, 0x00010000
.set CYREG_USBDEVv2_EP0_DR0, 0x400c0000
.set CYFLD_USBDEVv2_DATA_BYTE__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_DATA_BYTE__SIZE, 0x00000008
.set CYREG_USBDEVv2_EP0_DR1, 0x400c0004
.set CYREG_USBDEVv2_EP0_DR2, 0x400c0008
.set CYREG_USBDEVv2_EP0_DR3, 0x400c000c
.set CYREG_USBDEVv2_EP0_DR4, 0x400c0010
.set CYREG_USBDEVv2_EP0_DR5, 0x400c0014
.set CYREG_USBDEVv2_EP0_DR6, 0x400c0018
.set CYREG_USBDEVv2_EP0_DR7, 0x400c001c
.set CYREG_USBDEVv2_CR0, 0x400c0020
.set CYFLD_USBDEVv2_DEVICE_ADDRESS__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_DEVICE_ADDRESS__SIZE, 0x00000007
.set CYFLD_USBDEVv2_USB_ENABLE__OFFSET, 0x00000007
.set CYFLD_USBDEVv2_USB_ENABLE__SIZE, 0x00000001
.set CYREG_USBDEVv2_CR1, 0x400c0024
.set CYFLD_USBDEVv2_REG_ENABLE__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_REG_ENABLE__SIZE, 0x00000001
.set CYFLD_USBDEVv2_ENABLE_LOCK__OFFSET, 0x00000001
.set CYFLD_USBDEVv2_ENABLE_LOCK__SIZE, 0x00000001
.set CYFLD_USBDEVv2_BUS_ACTIVITY__OFFSET, 0x00000002
.set CYFLD_USBDEVv2_BUS_ACTIVITY__SIZE, 0x00000001
.set CYFLD_USBDEVv2_TRIM_OFFSET_MSB__OFFSET, 0x00000003
.set CYFLD_USBDEVv2_TRIM_OFFSET_MSB__SIZE, 0x00000001
.set CYREG_USBDEVv2_SIE_EP_INT_EN, 0x400c0028
.set CYFLD_USBDEVv2_EP1_INTR_EN__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_EP1_INTR_EN__SIZE, 0x00000001
.set CYFLD_USBDEVv2_EP2_INTR_EN__OFFSET, 0x00000001
.set CYFLD_USBDEVv2_EP2_INTR_EN__SIZE, 0x00000001
.set CYFLD_USBDEVv2_EP3_INTR_EN__OFFSET, 0x00000002
.set CYFLD_USBDEVv2_EP3_INTR_EN__SIZE, 0x00000001
.set CYFLD_USBDEVv2_EP4_INTR_EN__OFFSET, 0x00000003
.set CYFLD_USBDEVv2_EP4_INTR_EN__SIZE, 0x00000001
.set CYFLD_USBDEVv2_EP5_INTR_EN__OFFSET, 0x00000004
.set CYFLD_USBDEVv2_EP5_INTR_EN__SIZE, 0x00000001
.set CYFLD_USBDEVv2_EP6_INTR_EN__OFFSET, 0x00000005
.set CYFLD_USBDEVv2_EP6_INTR_EN__SIZE, 0x00000001
.set CYFLD_USBDEVv2_EP7_INTR_EN__OFFSET, 0x00000006
.set CYFLD_USBDEVv2_EP7_INTR_EN__SIZE, 0x00000001
.set CYFLD_USBDEVv2_EP8_INTR_EN__OFFSET, 0x00000007
.set CYFLD_USBDEVv2_EP8_INTR_EN__SIZE, 0x00000001
.set CYREG_USBDEVv2_SIE_EP_INT_SR, 0x400c002c
.set CYFLD_USBDEVv2_EP1_INTR__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_EP1_INTR__SIZE, 0x00000001
.set CYFLD_USBDEVv2_EP2_INTR__OFFSET, 0x00000001
.set CYFLD_USBDEVv2_EP2_INTR__SIZE, 0x00000001
.set CYFLD_USBDEVv2_EP3_INTR__OFFSET, 0x00000002
.set CYFLD_USBDEVv2_EP3_INTR__SIZE, 0x00000001
.set CYFLD_USBDEVv2_EP4_INTR__OFFSET, 0x00000003
.set CYFLD_USBDEVv2_EP4_INTR__SIZE, 0x00000001
.set CYFLD_USBDEVv2_EP5_INTR__OFFSET, 0x00000004
.set CYFLD_USBDEVv2_EP5_INTR__SIZE, 0x00000001
.set CYFLD_USBDEVv2_EP6_INTR__OFFSET, 0x00000005
.set CYFLD_USBDEVv2_EP6_INTR__SIZE, 0x00000001
.set CYFLD_USBDEVv2_EP7_INTR__OFFSET, 0x00000006
.set CYFLD_USBDEVv2_EP7_INTR__SIZE, 0x00000001
.set CYFLD_USBDEVv2_EP8_INTR__OFFSET, 0x00000007
.set CYFLD_USBDEVv2_EP8_INTR__SIZE, 0x00000001
.set CYREG_USBDEVv2_SIE_EP1_CNT0, 0x400c0030
.set CYFLD_USBDEVv2_DATA_COUNT_MSB__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_DATA_COUNT_MSB__SIZE, 0x00000003
.set CYFLD_USBDEVv2_DATA_VALID__OFFSET, 0x00000006
.set CYFLD_USBDEVv2_DATA_VALID__SIZE, 0x00000001
.set CYVAL_USBDEVv2_DATA_VALID_DATA_ERROR, 0x00000000
.set CYVAL_USBDEVv2_DATA_VALID_DATA_VALID, 0x00000001
.set CYFLD_USBDEVv2_DATA_TOGGLE__OFFSET, 0x00000007
.set CYFLD_USBDEVv2_DATA_TOGGLE__SIZE, 0x00000001
.set CYREG_USBDEVv2_SIE_EP1_CNT1, 0x400c0034
.set CYFLD_USBDEVv2_DATA_COUNT__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_DATA_COUNT__SIZE, 0x00000008
.set CYREG_USBDEVv2_SIE_EP1_CR0, 0x400c0038
.set CYFLD_USBDEVv2_MODE__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_MODE__SIZE, 0x00000004
.set CYVAL_USBDEVv2_MODE_DISABLE, 0x00000000
.set CYVAL_USBDEVv2_MODE_NAK_INOUT, 0x00000001
.set CYVAL_USBDEVv2_MODE_STATUS_OUT_ONLY, 0x00000002
.set CYVAL_USBDEVv2_MODE_STALL_INOUT, 0x00000003
.set CYVAL_USBDEVv2_MODE_ISO_OUT, 0x00000005
.set CYVAL_USBDEVv2_MODE_STATUS_IN_ONLY, 0x00000006
.set CYVAL_USBDEVv2_MODE_ISO_IN, 0x00000007
.set CYVAL_USBDEVv2_MODE_NAK_OUT, 0x00000008
.set CYVAL_USBDEVv2_MODE_ACK_OUT, 0x00000009
.set CYVAL_USBDEVv2_MODE_ACK_OUT_STATUS_IN, 0x0000000b
.set CYVAL_USBDEVv2_MODE_NAK_IN, 0x0000000c
.set CYVAL_USBDEVv2_MODE_ACK_IN, 0x0000000d
.set CYVAL_USBDEVv2_MODE_ACK_IN_STATUS_OUT, 0x0000000f
.set CYFLD_USBDEVv2_ACKED_TXN__OFFSET, 0x00000004
.set CYFLD_USBDEVv2_ACKED_TXN__SIZE, 0x00000001
.set CYVAL_USBDEVv2_ACKED_TXN_ACKED_NO, 0x00000000
.set CYVAL_USBDEVv2_ACKED_TXN_ACKED_YES, 0x00000001
.set CYFLD_USBDEVv2_NAK_INT_EN__OFFSET, 0x00000005
.set CYFLD_USBDEVv2_NAK_INT_EN__SIZE, 0x00000001
.set CYFLD_USBDEVv2_ERR_IN_TXN__OFFSET, 0x00000006
.set CYFLD_USBDEVv2_ERR_IN_TXN__SIZE, 0x00000001
.set CYFLD_USBDEVv2_STALL__OFFSET, 0x00000007
.set CYFLD_USBDEVv2_STALL__SIZE, 0x00000001
.set CYREG_USBDEVv2_USBIO_CR0, 0x400c0040
.set CYFLD_USBDEVv2_RD__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_RD__SIZE, 0x00000001
.set CYVAL_USBDEVv2_RD_DIFF_LOW, 0x00000000
.set CYVAL_USBDEVv2_RD_DIFF_HIGH, 0x00000001
.set CYFLD_USBDEVv2_TD__OFFSET, 0x00000005
.set CYFLD_USBDEVv2_TD__SIZE, 0x00000001
.set CYVAL_USBDEVv2_TD_DIFF_K, 0x00000000
.set CYVAL_USBDEVv2_TD_DIFF_J, 0x00000001
.set CYFLD_USBDEVv2_TSE0__OFFSET, 0x00000006
.set CYFLD_USBDEVv2_TSE0__SIZE, 0x00000001
.set CYFLD_USBDEVv2_TEN__OFFSET, 0x00000007
.set CYFLD_USBDEVv2_TEN__SIZE, 0x00000001
.set CYREG_USBDEVv2_USBIO_CR2, 0x400c0044
.set CYFLD_USBDEVv2_Reserved__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_Reserved__SIZE, 0x00000006
.set CYFLD_USBDEVv2_TEST_PKT__OFFSET, 0x00000006
.set CYFLD_USBDEVv2_TEST_PKT__SIZE, 0x00000001
.set CYFLD_USBDEVv2_TEST_RES__OFFSET, 0x00000007
.set CYFLD_USBDEVv2_TEST_RES__SIZE, 0x00000001
.set CYREG_USBDEVv2_USBIO_CR1, 0x400c0048
.set CYFLD_USBDEVv2_DMO__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_DMO__SIZE, 0x00000001
.set CYFLD_USBDEVv2_DPO__OFFSET, 0x00000001
.set CYFLD_USBDEVv2_DPO__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USBPUEN__OFFSET, 0x00000002
.set CYFLD_USBDEVv2_USBPUEN__SIZE, 0x00000001
.set CYFLD_USBDEVv2_IOMODE__OFFSET, 0x00000005
.set CYFLD_USBDEVv2_IOMODE__SIZE, 0x00000001
.set CYREG_USBDEVv2_DYN_RECONFIG, 0x400c0050
.set CYFLD_USBDEVv2_DYN_CONFIG_EN__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_DYN_CONFIG_EN__SIZE, 0x00000001
.set CYFLD_USBDEVv2_DYN_RECONFIG_EPNO__OFFSET, 0x00000001
.set CYFLD_USBDEVv2_DYN_RECONFIG_EPNO__SIZE, 0x00000003
.set CYFLD_USBDEVv2_DYN_RECONFIG_RDY_STS__OFFSET, 0x00000004
.set CYFLD_USBDEVv2_DYN_RECONFIG_RDY_STS__SIZE, 0x00000001
.set CYREG_USBDEVv2_SOF0, 0x400c0060
.set CYFLD_USBDEVv2_FRAME_NUMBER__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_FRAME_NUMBER__SIZE, 0x00000008
.set CYREG_USBDEVv2_SOF1, 0x400c0064
.set CYFLD_USBDEVv2_FRAME_NUMBER_MSB__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_FRAME_NUMBER_MSB__SIZE, 0x00000003
.set CYREG_USBDEVv2_SIE_EP2_CNT0, 0x400c0070
.set CYREG_USBDEVv2_SIE_EP2_CNT1, 0x400c0074
.set CYREG_USBDEVv2_SIE_EP2_CR0, 0x400c0078
.set CYREG_USBDEVv2_OSCLK_DR0, 0x400c0080
.set CYFLD_USBDEVv2_ADDER__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_ADDER__SIZE, 0x00000008
.set CYREG_USBDEVv2_OSCLK_DR1, 0x400c0084
.set CYFLD_USBDEVv2_ADDER_MSB__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_ADDER_MSB__SIZE, 0x00000007
.set CYREG_USBDEVv2_EP0_CR, 0x400c00a0
.set CYFLD_USBDEVv2_OUT_RCVD__OFFSET, 0x00000005
.set CYFLD_USBDEVv2_OUT_RCVD__SIZE, 0x00000001
.set CYFLD_USBDEVv2_IN_RCVD__OFFSET, 0x00000006
.set CYFLD_USBDEVv2_IN_RCVD__SIZE, 0x00000001
.set CYFLD_USBDEVv2_SETUP_RCVD__OFFSET, 0x00000007
.set CYFLD_USBDEVv2_SETUP_RCVD__SIZE, 0x00000001
.set CYREG_USBDEVv2_EP0_CNT, 0x400c00a4
.set CYFLD_USBDEVv2_BYTE_COUNT__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_BYTE_COUNT__SIZE, 0x00000004
.set CYREG_USBDEVv2_SIE_EP3_CNT0, 0x400c00b0
.set CYREG_USBDEVv2_SIE_EP3_CNT1, 0x400c00b4
.set CYREG_USBDEVv2_SIE_EP3_CR0, 0x400c00b8
.set CYREG_USBDEVv2_SIE_EP4_CNT0, 0x400c00f0
.set CYREG_USBDEVv2_SIE_EP4_CNT1, 0x400c00f4
.set CYREG_USBDEVv2_SIE_EP4_CR0, 0x400c00f8
.set CYREG_USBDEVv2_SIE_EP5_CNT0, 0x400c0130
.set CYREG_USBDEVv2_SIE_EP5_CNT1, 0x400c0134
.set CYREG_USBDEVv2_SIE_EP5_CR0, 0x400c0138
.set CYREG_USBDEVv2_SIE_EP6_CNT0, 0x400c0170
.set CYREG_USBDEVv2_SIE_EP6_CNT1, 0x400c0174
.set CYREG_USBDEVv2_SIE_EP6_CR0, 0x400c0178
.set CYREG_USBDEVv2_SIE_EP7_CNT0, 0x400c01b0
.set CYREG_USBDEVv2_SIE_EP7_CNT1, 0x400c01b4
.set CYREG_USBDEVv2_SIE_EP7_CR0, 0x400c01b8
.set CYREG_USBDEVv2_SIE_EP8_CNT0, 0x400c01f0
.set CYREG_USBDEVv2_SIE_EP8_CNT1, 0x400c01f4
.set CYREG_USBDEVv2_SIE_EP8_CR0, 0x400c01f8
.set CYREG_USBDEVv2_ARB_EP1_CFG, 0x400c0200
.set CYFLD_USBDEVv2_IN_DATA_RDY__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_IN_DATA_RDY__SIZE, 0x00000001
.set CYFLD_USBDEVv2_DMA_REQ__OFFSET, 0x00000001
.set CYFLD_USBDEVv2_DMA_REQ__SIZE, 0x00000001
.set CYFLD_USBDEVv2_CRC_BYPASS__OFFSET, 0x00000002
.set CYFLD_USBDEVv2_CRC_BYPASS__SIZE, 0x00000001
.set CYVAL_USBDEVv2_CRC_BYPASS_CRC_NORMAL, 0x00000000
.set CYVAL_USBDEVv2_CRC_BYPASS_CRC_BYPASS, 0x00000001
.set CYFLD_USBDEVv2_RESET_PTR__OFFSET, 0x00000003
.set CYFLD_USBDEVv2_RESET_PTR__SIZE, 0x00000001
.set CYVAL_USBDEVv2_RESET_PTR_RESET_KRYPTON, 0x00000000
.set CYVAL_USBDEVv2_RESET_PTR_RESET_NORMAL, 0x00000001
.set CYREG_USBDEVv2_ARB_EP1_INT_EN, 0x400c0204
.set CYFLD_USBDEVv2_IN_BUF_FULL_EN__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_IN_BUF_FULL_EN__SIZE, 0x00000001
.set CYFLD_USBDEVv2_DMA_GNT_EN__OFFSET, 0x00000001
.set CYFLD_USBDEVv2_DMA_GNT_EN__SIZE, 0x00000001
.set CYFLD_USBDEVv2_BUF_OVER_EN__OFFSET, 0x00000002
.set CYFLD_USBDEVv2_BUF_OVER_EN__SIZE, 0x00000001
.set CYFLD_USBDEVv2_BUF_UNDER_EN__OFFSET, 0x00000003
.set CYFLD_USBDEVv2_BUF_UNDER_EN__SIZE, 0x00000001
.set CYFLD_USBDEVv2_ERR_INT_EN__OFFSET, 0x00000004
.set CYFLD_USBDEVv2_ERR_INT_EN__SIZE, 0x00000001
.set CYFLD_USBDEVv2_DMA_TERMIN_EN__OFFSET, 0x00000005
.set CYFLD_USBDEVv2_DMA_TERMIN_EN__SIZE, 0x00000001
.set CYREG_USBDEVv2_ARB_EP1_SR, 0x400c0208
.set CYFLD_USBDEVv2_IN_BUF_FULL__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_IN_BUF_FULL__SIZE, 0x00000001
.set CYFLD_USBDEVv2_DMA_GNT__OFFSET, 0x00000001
.set CYFLD_USBDEVv2_DMA_GNT__SIZE, 0x00000001
.set CYFLD_USBDEVv2_BUF_OVER__OFFSET, 0x00000002
.set CYFLD_USBDEVv2_BUF_OVER__SIZE, 0x00000001
.set CYFLD_USBDEVv2_BUF_UNDER__OFFSET, 0x00000003
.set CYFLD_USBDEVv2_BUF_UNDER__SIZE, 0x00000001
.set CYFLD_USBDEVv2_DMA_TERMIN__OFFSET, 0x00000005
.set CYFLD_USBDEVv2_DMA_TERMIN__SIZE, 0x00000001
.set CYREG_USBDEVv2_ARB_RW1_WA, 0x400c0210
.set CYFLD_USBDEVv2_WA__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_WA__SIZE, 0x00000008
.set CYREG_USBDEVv2_ARB_RW1_WA_MSB, 0x400c0214
.set CYFLD_USBDEVv2_WA_MSB__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_WA_MSB__SIZE, 0x00000001
.set CYREG_USBDEVv2_ARB_RW1_RA, 0x400c0218
.set CYFLD_USBDEVv2_RA__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_RA__SIZE, 0x00000008
.set CYREG_USBDEVv2_ARB_RW1_RA_MSB, 0x400c021c
.set CYFLD_USBDEVv2_RA_MSB__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_RA_MSB__SIZE, 0x00000001
.set CYREG_USBDEVv2_ARB_RW1_DR, 0x400c0220
.set CYFLD_USBDEVv2_DR__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_DR__SIZE, 0x00000008
.set CYREG_USBDEVv2_BUF_SIZE, 0x400c0230
.set CYFLD_USBDEVv2_IN_BUF__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_IN_BUF__SIZE, 0x00000004
.set CYFLD_USBDEVv2_OUT_BUF__OFFSET, 0x00000004
.set CYFLD_USBDEVv2_OUT_BUF__SIZE, 0x00000004
.set CYREG_USBDEVv2_EP_ACTIVE, 0x400c0238
.set CYFLD_USBDEVv2_EP1_ACT__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_EP1_ACT__SIZE, 0x00000001
.set CYFLD_USBDEVv2_EP2_ACT__OFFSET, 0x00000001
.set CYFLD_USBDEVv2_EP2_ACT__SIZE, 0x00000001
.set CYFLD_USBDEVv2_EP3_ACT__OFFSET, 0x00000002
.set CYFLD_USBDEVv2_EP3_ACT__SIZE, 0x00000001
.set CYFLD_USBDEVv2_EP4_ACT__OFFSET, 0x00000003
.set CYFLD_USBDEVv2_EP4_ACT__SIZE, 0x00000001
.set CYFLD_USBDEVv2_EP5_ACT__OFFSET, 0x00000004
.set CYFLD_USBDEVv2_EP5_ACT__SIZE, 0x00000001
.set CYFLD_USBDEVv2_EP6_ACT__OFFSET, 0x00000005
.set CYFLD_USBDEVv2_EP6_ACT__SIZE, 0x00000001
.set CYFLD_USBDEVv2_EP7_ACT__OFFSET, 0x00000006
.set CYFLD_USBDEVv2_EP7_ACT__SIZE, 0x00000001
.set CYFLD_USBDEVv2_EP8_ACT__OFFSET, 0x00000007
.set CYFLD_USBDEVv2_EP8_ACT__SIZE, 0x00000001
.set CYREG_USBDEVv2_EP_TYPE, 0x400c023c
.set CYFLD_USBDEVv2_EP1_TYP__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_EP1_TYP__SIZE, 0x00000001
.set CYVAL_USBDEVv2_EP1_TYP_EP_IN, 0x00000000
.set CYVAL_USBDEVv2_EP1_TYP_EP_OUT, 0x00000001
.set CYFLD_USBDEVv2_EP2_TYP__OFFSET, 0x00000001
.set CYFLD_USBDEVv2_EP2_TYP__SIZE, 0x00000001
.set CYVAL_USBDEVv2_EP2_TYP_EP_IN, 0x00000000
.set CYVAL_USBDEVv2_EP2_TYP_EP_OUT, 0x00000001
.set CYFLD_USBDEVv2_EP3_TYP__OFFSET, 0x00000002
.set CYFLD_USBDEVv2_EP3_TYP__SIZE, 0x00000001
.set CYVAL_USBDEVv2_EP3_TYP_EP_IN, 0x00000000
.set CYVAL_USBDEVv2_EP3_TYP_EP_OUT, 0x00000001
.set CYFLD_USBDEVv2_EP4_TYP__OFFSET, 0x00000003
.set CYFLD_USBDEVv2_EP4_TYP__SIZE, 0x00000001
.set CYVAL_USBDEVv2_EP4_TYP_EP_IN, 0x00000000
.set CYVAL_USBDEVv2_EP4_TYP_EP_OUT, 0x00000001
.set CYFLD_USBDEVv2_EP5_TYP__OFFSET, 0x00000004
.set CYFLD_USBDEVv2_EP5_TYP__SIZE, 0x00000001
.set CYVAL_USBDEVv2_EP5_TYP_EP_IN, 0x00000000
.set CYVAL_USBDEVv2_EP5_TYP_EP_OUT, 0x00000001
.set CYFLD_USBDEVv2_EP6_TYP__OFFSET, 0x00000005
.set CYFLD_USBDEVv2_EP6_TYP__SIZE, 0x00000001
.set CYVAL_USBDEVv2_EP6_TYP_EP_IN, 0x00000000
.set CYVAL_USBDEVv2_EP6_TYP_EP_OUT, 0x00000001
.set CYFLD_USBDEVv2_EP7_TYP__OFFSET, 0x00000006
.set CYFLD_USBDEVv2_EP7_TYP__SIZE, 0x00000001
.set CYVAL_USBDEVv2_EP7_TYP_EP_IN, 0x00000000
.set CYVAL_USBDEVv2_EP7_TYP_EP_OUT, 0x00000001
.set CYFLD_USBDEVv2_EP8_TYP__OFFSET, 0x00000007
.set CYFLD_USBDEVv2_EP8_TYP__SIZE, 0x00000001
.set CYVAL_USBDEVv2_EP8_TYP_EP_IN, 0x00000000
.set CYVAL_USBDEVv2_EP8_TYP_EP_OUT, 0x00000001
.set CYREG_USBDEVv2_ARB_EP2_CFG, 0x400c0240
.set CYREG_USBDEVv2_ARB_EP2_INT_EN, 0x400c0244
.set CYREG_USBDEVv2_ARB_EP2_SR, 0x400c0248
.set CYREG_USBDEVv2_ARB_RW2_WA, 0x400c0250
.set CYREG_USBDEVv2_ARB_RW2_WA_MSB, 0x400c0254
.set CYREG_USBDEVv2_ARB_RW2_RA, 0x400c0258
.set CYREG_USBDEVv2_ARB_RW2_RA_MSB, 0x400c025c
.set CYREG_USBDEVv2_ARB_RW2_DR, 0x400c0260
.set CYREG_USBDEVv2_ARB_CFG, 0x400c0270
.set CYFLD_USBDEVv2_AUTO_MEM__OFFSET, 0x00000004
.set CYFLD_USBDEVv2_AUTO_MEM__SIZE, 0x00000001
.set CYFLD_USBDEVv2_DMA_CFG__OFFSET, 0x00000005
.set CYFLD_USBDEVv2_DMA_CFG__SIZE, 0x00000002
.set CYVAL_USBDEVv2_DMA_CFG_DMA_NONE, 0x00000000
.set CYVAL_USBDEVv2_DMA_CFG_DMA_MANUAL, 0x00000001
.set CYVAL_USBDEVv2_DMA_CFG_DMA_AUTO, 0x00000002
.set CYFLD_USBDEVv2_CFG_CMP__OFFSET, 0x00000007
.set CYFLD_USBDEVv2_CFG_CMP__SIZE, 0x00000001
.set CYREG_USBDEVv2_USB_CLK_EN, 0x400c0274
.set CYFLD_USBDEVv2_CSR_CLK_EN__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_CSR_CLK_EN__SIZE, 0x00000001
.set CYREG_USBDEVv2_ARB_INT_EN, 0x400c0278
.set CYREG_USBDEVv2_ARB_INT_SR, 0x400c027c
.set CYREG_USBDEVv2_ARB_EP3_CFG, 0x400c0280
.set CYREG_USBDEVv2_ARB_EP3_INT_EN, 0x400c0284
.set CYREG_USBDEVv2_ARB_EP3_SR, 0x400c0288
.set CYREG_USBDEVv2_ARB_RW3_WA, 0x400c0290
.set CYREG_USBDEVv2_ARB_RW3_WA_MSB, 0x400c0294
.set CYREG_USBDEVv2_ARB_RW3_RA, 0x400c0298
.set CYREG_USBDEVv2_ARB_RW3_RA_MSB, 0x400c029c
.set CYREG_USBDEVv2_ARB_RW3_DR, 0x400c02a0
.set CYREG_USBDEVv2_CWA, 0x400c02b0
.set CYFLD_USBDEVv2_CWA__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_CWA__SIZE, 0x00000008
.set CYREG_USBDEVv2_CWA_MSB, 0x400c02b4
.set CYFLD_USBDEVv2_CWA_MSB__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_CWA_MSB__SIZE, 0x00000001
.set CYREG_USBDEVv2_ARB_EP4_CFG, 0x400c02c0
.set CYREG_USBDEVv2_ARB_EP4_INT_EN, 0x400c02c4
.set CYREG_USBDEVv2_ARB_EP4_SR, 0x400c02c8
.set CYREG_USBDEVv2_ARB_RW4_WA, 0x400c02d0
.set CYREG_USBDEVv2_ARB_RW4_WA_MSB, 0x400c02d4
.set CYREG_USBDEVv2_ARB_RW4_RA, 0x400c02d8
.set CYREG_USBDEVv2_ARB_RW4_RA_MSB, 0x400c02dc
.set CYREG_USBDEVv2_ARB_RW4_DR, 0x400c02e0
.set CYREG_USBDEVv2_DMA_THRES, 0x400c02f0
.set CYFLD_USBDEVv2_DMA_THS__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_DMA_THS__SIZE, 0x00000008
.set CYREG_USBDEVv2_DMA_THRES_MSB, 0x400c02f4
.set CYFLD_USBDEVv2_DMA_THS_MSB__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_DMA_THS_MSB__SIZE, 0x00000001
.set CYREG_USBDEVv2_ARB_EP5_CFG, 0x400c0300
.set CYREG_USBDEVv2_ARB_EP5_INT_EN, 0x400c0304
.set CYREG_USBDEVv2_ARB_EP5_SR, 0x400c0308
.set CYREG_USBDEVv2_ARB_RW5_WA, 0x400c0310
.set CYREG_USBDEVv2_ARB_RW5_WA_MSB, 0x400c0314
.set CYREG_USBDEVv2_ARB_RW5_RA, 0x400c0318
.set CYREG_USBDEVv2_ARB_RW5_RA_MSB, 0x400c031c
.set CYREG_USBDEVv2_ARB_RW5_DR, 0x400c0320
.set CYREG_USBDEVv2_BUS_RST_CNT, 0x400c0330
.set CYFLD_USBDEVv2_bus_rst_cnt__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_bus_rst_cnt__SIZE, 0x00000004
.set CYREG_USBDEVv2_ARB_EP6_CFG, 0x400c0340
.set CYREG_USBDEVv2_ARB_EP6_INT_EN, 0x400c0344
.set CYREG_USBDEVv2_ARB_EP6_SR, 0x400c0348
.set CYREG_USBDEVv2_ARB_RW6_WA, 0x400c0350
.set CYREG_USBDEVv2_ARB_RW6_WA_MSB, 0x400c0354
.set CYREG_USBDEVv2_ARB_RW6_RA, 0x400c0358
.set CYREG_USBDEVv2_ARB_RW6_RA_MSB, 0x400c035c
.set CYREG_USBDEVv2_ARB_RW6_DR, 0x400c0360
.set CYREG_USBDEVv2_ARB_EP7_CFG, 0x400c0380
.set CYREG_USBDEVv2_ARB_EP7_INT_EN, 0x400c0384
.set CYREG_USBDEVv2_ARB_EP7_SR, 0x400c0388
.set CYREG_USBDEVv2_ARB_RW7_WA, 0x400c0390
.set CYREG_USBDEVv2_ARB_RW7_WA_MSB, 0x400c0394
.set CYREG_USBDEVv2_ARB_RW7_RA, 0x400c0398
.set CYREG_USBDEVv2_ARB_RW7_RA_MSB, 0x400c039c
.set CYREG_USBDEVv2_ARB_RW7_DR, 0x400c03a0
.set CYREG_USBDEVv2_ARB_EP8_CFG, 0x400c03c0
.set CYREG_USBDEVv2_ARB_EP8_INT_EN, 0x400c03c4
.set CYREG_USBDEVv2_ARB_EP8_SR, 0x400c03c8
.set CYREG_USBDEVv2_ARB_RW8_WA, 0x400c03d0
.set CYREG_USBDEVv2_ARB_RW8_WA_MSB, 0x400c03d4
.set CYREG_USBDEVv2_ARB_RW8_RA, 0x400c03d8
.set CYREG_USBDEVv2_ARB_RW8_RA_MSB, 0x400c03dc
.set CYREG_USBDEVv2_ARB_RW8_DR, 0x400c03e0
.set CYREG_USBDEVv2_MEM_DATA0, 0x400c0400
.set CYREG_USBDEVv2_MEM_DATA1, 0x400c0404
.set CYREG_USBDEVv2_MEM_DATA2, 0x400c0408
.set CYREG_USBDEVv2_MEM_DATA3, 0x400c040c
.set CYREG_USBDEVv2_MEM_DATA4, 0x400c0410
.set CYREG_USBDEVv2_MEM_DATA5, 0x400c0414
.set CYREG_USBDEVv2_MEM_DATA6, 0x400c0418
.set CYREG_USBDEVv2_MEM_DATA7, 0x400c041c
.set CYREG_USBDEVv2_MEM_DATA8, 0x400c0420
.set CYREG_USBDEVv2_MEM_DATA9, 0x400c0424
.set CYREG_USBDEVv2_MEM_DATA10, 0x400c0428
.set CYREG_USBDEVv2_MEM_DATA11, 0x400c042c
.set CYREG_USBDEVv2_MEM_DATA12, 0x400c0430
.set CYREG_USBDEVv2_MEM_DATA13, 0x400c0434
.set CYREG_USBDEVv2_MEM_DATA14, 0x400c0438
.set CYREG_USBDEVv2_MEM_DATA15, 0x400c043c
.set CYREG_USBDEVv2_MEM_DATA16, 0x400c0440
.set CYREG_USBDEVv2_MEM_DATA17, 0x400c0444
.set CYREG_USBDEVv2_MEM_DATA18, 0x400c0448
.set CYREG_USBDEVv2_MEM_DATA19, 0x400c044c
.set CYREG_USBDEVv2_MEM_DATA20, 0x400c0450
.set CYREG_USBDEVv2_MEM_DATA21, 0x400c0454
.set CYREG_USBDEVv2_MEM_DATA22, 0x400c0458
.set CYREG_USBDEVv2_MEM_DATA23, 0x400c045c
.set CYREG_USBDEVv2_MEM_DATA24, 0x400c0460
.set CYREG_USBDEVv2_MEM_DATA25, 0x400c0464
.set CYREG_USBDEVv2_MEM_DATA26, 0x400c0468
.set CYREG_USBDEVv2_MEM_DATA27, 0x400c046c
.set CYREG_USBDEVv2_MEM_DATA28, 0x400c0470
.set CYREG_USBDEVv2_MEM_DATA29, 0x400c0474
.set CYREG_USBDEVv2_MEM_DATA30, 0x400c0478
.set CYREG_USBDEVv2_MEM_DATA31, 0x400c047c
.set CYREG_USBDEVv2_MEM_DATA32, 0x400c0480
.set CYREG_USBDEVv2_MEM_DATA33, 0x400c0484
.set CYREG_USBDEVv2_MEM_DATA34, 0x400c0488
.set CYREG_USBDEVv2_MEM_DATA35, 0x400c048c
.set CYREG_USBDEVv2_MEM_DATA36, 0x400c0490
.set CYREG_USBDEVv2_MEM_DATA37, 0x400c0494
.set CYREG_USBDEVv2_MEM_DATA38, 0x400c0498
.set CYREG_USBDEVv2_MEM_DATA39, 0x400c049c
.set CYREG_USBDEVv2_MEM_DATA40, 0x400c04a0
.set CYREG_USBDEVv2_MEM_DATA41, 0x400c04a4
.set CYREG_USBDEVv2_MEM_DATA42, 0x400c04a8
.set CYREG_USBDEVv2_MEM_DATA43, 0x400c04ac
.set CYREG_USBDEVv2_MEM_DATA44, 0x400c04b0
.set CYREG_USBDEVv2_MEM_DATA45, 0x400c04b4
.set CYREG_USBDEVv2_MEM_DATA46, 0x400c04b8
.set CYREG_USBDEVv2_MEM_DATA47, 0x400c04bc
.set CYREG_USBDEVv2_MEM_DATA48, 0x400c04c0
.set CYREG_USBDEVv2_MEM_DATA49, 0x400c04c4
.set CYREG_USBDEVv2_MEM_DATA50, 0x400c04c8
.set CYREG_USBDEVv2_MEM_DATA51, 0x400c04cc
.set CYREG_USBDEVv2_MEM_DATA52, 0x400c04d0
.set CYREG_USBDEVv2_MEM_DATA53, 0x400c04d4
.set CYREG_USBDEVv2_MEM_DATA54, 0x400c04d8
.set CYREG_USBDEVv2_MEM_DATA55, 0x400c04dc
.set CYREG_USBDEVv2_MEM_DATA56, 0x400c04e0
.set CYREG_USBDEVv2_MEM_DATA57, 0x400c04e4
.set CYREG_USBDEVv2_MEM_DATA58, 0x400c04e8
.set CYREG_USBDEVv2_MEM_DATA59, 0x400c04ec
.set CYREG_USBDEVv2_MEM_DATA60, 0x400c04f0
.set CYREG_USBDEVv2_MEM_DATA61, 0x400c04f4
.set CYREG_USBDEVv2_MEM_DATA62, 0x400c04f8
.set CYREG_USBDEVv2_MEM_DATA63, 0x400c04fc
.set CYREG_USBDEVv2_MEM_DATA64, 0x400c0500
.set CYREG_USBDEVv2_MEM_DATA65, 0x400c0504
.set CYREG_USBDEVv2_MEM_DATA66, 0x400c0508
.set CYREG_USBDEVv2_MEM_DATA67, 0x400c050c
.set CYREG_USBDEVv2_MEM_DATA68, 0x400c0510
.set CYREG_USBDEVv2_MEM_DATA69, 0x400c0514
.set CYREG_USBDEVv2_MEM_DATA70, 0x400c0518
.set CYREG_USBDEVv2_MEM_DATA71, 0x400c051c
.set CYREG_USBDEVv2_MEM_DATA72, 0x400c0520
.set CYREG_USBDEVv2_MEM_DATA73, 0x400c0524
.set CYREG_USBDEVv2_MEM_DATA74, 0x400c0528
.set CYREG_USBDEVv2_MEM_DATA75, 0x400c052c
.set CYREG_USBDEVv2_MEM_DATA76, 0x400c0530
.set CYREG_USBDEVv2_MEM_DATA77, 0x400c0534
.set CYREG_USBDEVv2_MEM_DATA78, 0x400c0538
.set CYREG_USBDEVv2_MEM_DATA79, 0x400c053c
.set CYREG_USBDEVv2_MEM_DATA80, 0x400c0540
.set CYREG_USBDEVv2_MEM_DATA81, 0x400c0544
.set CYREG_USBDEVv2_MEM_DATA82, 0x400c0548
.set CYREG_USBDEVv2_MEM_DATA83, 0x400c054c
.set CYREG_USBDEVv2_MEM_DATA84, 0x400c0550
.set CYREG_USBDEVv2_MEM_DATA85, 0x400c0554
.set CYREG_USBDEVv2_MEM_DATA86, 0x400c0558
.set CYREG_USBDEVv2_MEM_DATA87, 0x400c055c
.set CYREG_USBDEVv2_MEM_DATA88, 0x400c0560
.set CYREG_USBDEVv2_MEM_DATA89, 0x400c0564
.set CYREG_USBDEVv2_MEM_DATA90, 0x400c0568
.set CYREG_USBDEVv2_MEM_DATA91, 0x400c056c
.set CYREG_USBDEVv2_MEM_DATA92, 0x400c0570
.set CYREG_USBDEVv2_MEM_DATA93, 0x400c0574
.set CYREG_USBDEVv2_MEM_DATA94, 0x400c0578
.set CYREG_USBDEVv2_MEM_DATA95, 0x400c057c
.set CYREG_USBDEVv2_MEM_DATA96, 0x400c0580
.set CYREG_USBDEVv2_MEM_DATA97, 0x400c0584
.set CYREG_USBDEVv2_MEM_DATA98, 0x400c0588
.set CYREG_USBDEVv2_MEM_DATA99, 0x400c058c
.set CYREG_USBDEVv2_MEM_DATA100, 0x400c0590
.set CYREG_USBDEVv2_MEM_DATA101, 0x400c0594
.set CYREG_USBDEVv2_MEM_DATA102, 0x400c0598
.set CYREG_USBDEVv2_MEM_DATA103, 0x400c059c
.set CYREG_USBDEVv2_MEM_DATA104, 0x400c05a0
.set CYREG_USBDEVv2_MEM_DATA105, 0x400c05a4
.set CYREG_USBDEVv2_MEM_DATA106, 0x400c05a8
.set CYREG_USBDEVv2_MEM_DATA107, 0x400c05ac
.set CYREG_USBDEVv2_MEM_DATA108, 0x400c05b0
.set CYREG_USBDEVv2_MEM_DATA109, 0x400c05b4
.set CYREG_USBDEVv2_MEM_DATA110, 0x400c05b8
.set CYREG_USBDEVv2_MEM_DATA111, 0x400c05bc
.set CYREG_USBDEVv2_MEM_DATA112, 0x400c05c0
.set CYREG_USBDEVv2_MEM_DATA113, 0x400c05c4
.set CYREG_USBDEVv2_MEM_DATA114, 0x400c05c8
.set CYREG_USBDEVv2_MEM_DATA115, 0x400c05cc
.set CYREG_USBDEVv2_MEM_DATA116, 0x400c05d0
.set CYREG_USBDEVv2_MEM_DATA117, 0x400c05d4
.set CYREG_USBDEVv2_MEM_DATA118, 0x400c05d8
.set CYREG_USBDEVv2_MEM_DATA119, 0x400c05dc
.set CYREG_USBDEVv2_MEM_DATA120, 0x400c05e0
.set CYREG_USBDEVv2_MEM_DATA121, 0x400c05e4
.set CYREG_USBDEVv2_MEM_DATA122, 0x400c05e8
.set CYREG_USBDEVv2_MEM_DATA123, 0x400c05ec
.set CYREG_USBDEVv2_MEM_DATA124, 0x400c05f0
.set CYREG_USBDEVv2_MEM_DATA125, 0x400c05f4
.set CYREG_USBDEVv2_MEM_DATA126, 0x400c05f8
.set CYREG_USBDEVv2_MEM_DATA127, 0x400c05fc
.set CYREG_USBDEVv2_MEM_DATA128, 0x400c0600
.set CYREG_USBDEVv2_MEM_DATA129, 0x400c0604
.set CYREG_USBDEVv2_MEM_DATA130, 0x400c0608
.set CYREG_USBDEVv2_MEM_DATA131, 0x400c060c
.set CYREG_USBDEVv2_MEM_DATA132, 0x400c0610
.set CYREG_USBDEVv2_MEM_DATA133, 0x400c0614
.set CYREG_USBDEVv2_MEM_DATA134, 0x400c0618
.set CYREG_USBDEVv2_MEM_DATA135, 0x400c061c
.set CYREG_USBDEVv2_MEM_DATA136, 0x400c0620
.set CYREG_USBDEVv2_MEM_DATA137, 0x400c0624
.set CYREG_USBDEVv2_MEM_DATA138, 0x400c0628
.set CYREG_USBDEVv2_MEM_DATA139, 0x400c062c
.set CYREG_USBDEVv2_MEM_DATA140, 0x400c0630
.set CYREG_USBDEVv2_MEM_DATA141, 0x400c0634
.set CYREG_USBDEVv2_MEM_DATA142, 0x400c0638
.set CYREG_USBDEVv2_MEM_DATA143, 0x400c063c
.set CYREG_USBDEVv2_MEM_DATA144, 0x400c0640
.set CYREG_USBDEVv2_MEM_DATA145, 0x400c0644
.set CYREG_USBDEVv2_MEM_DATA146, 0x400c0648
.set CYREG_USBDEVv2_MEM_DATA147, 0x400c064c
.set CYREG_USBDEVv2_MEM_DATA148, 0x400c0650
.set CYREG_USBDEVv2_MEM_DATA149, 0x400c0654
.set CYREG_USBDEVv2_MEM_DATA150, 0x400c0658
.set CYREG_USBDEVv2_MEM_DATA151, 0x400c065c
.set CYREG_USBDEVv2_MEM_DATA152, 0x400c0660
.set CYREG_USBDEVv2_MEM_DATA153, 0x400c0664
.set CYREG_USBDEVv2_MEM_DATA154, 0x400c0668
.set CYREG_USBDEVv2_MEM_DATA155, 0x400c066c
.set CYREG_USBDEVv2_MEM_DATA156, 0x400c0670
.set CYREG_USBDEVv2_MEM_DATA157, 0x400c0674
.set CYREG_USBDEVv2_MEM_DATA158, 0x400c0678
.set CYREG_USBDEVv2_MEM_DATA159, 0x400c067c
.set CYREG_USBDEVv2_MEM_DATA160, 0x400c0680
.set CYREG_USBDEVv2_MEM_DATA161, 0x400c0684
.set CYREG_USBDEVv2_MEM_DATA162, 0x400c0688
.set CYREG_USBDEVv2_MEM_DATA163, 0x400c068c
.set CYREG_USBDEVv2_MEM_DATA164, 0x400c0690
.set CYREG_USBDEVv2_MEM_DATA165, 0x400c0694
.set CYREG_USBDEVv2_MEM_DATA166, 0x400c0698
.set CYREG_USBDEVv2_MEM_DATA167, 0x400c069c
.set CYREG_USBDEVv2_MEM_DATA168, 0x400c06a0
.set CYREG_USBDEVv2_MEM_DATA169, 0x400c06a4
.set CYREG_USBDEVv2_MEM_DATA170, 0x400c06a8
.set CYREG_USBDEVv2_MEM_DATA171, 0x400c06ac
.set CYREG_USBDEVv2_MEM_DATA172, 0x400c06b0
.set CYREG_USBDEVv2_MEM_DATA173, 0x400c06b4
.set CYREG_USBDEVv2_MEM_DATA174, 0x400c06b8
.set CYREG_USBDEVv2_MEM_DATA175, 0x400c06bc
.set CYREG_USBDEVv2_MEM_DATA176, 0x400c06c0
.set CYREG_USBDEVv2_MEM_DATA177, 0x400c06c4
.set CYREG_USBDEVv2_MEM_DATA178, 0x400c06c8
.set CYREG_USBDEVv2_MEM_DATA179, 0x400c06cc
.set CYREG_USBDEVv2_MEM_DATA180, 0x400c06d0
.set CYREG_USBDEVv2_MEM_DATA181, 0x400c06d4
.set CYREG_USBDEVv2_MEM_DATA182, 0x400c06d8
.set CYREG_USBDEVv2_MEM_DATA183, 0x400c06dc
.set CYREG_USBDEVv2_MEM_DATA184, 0x400c06e0
.set CYREG_USBDEVv2_MEM_DATA185, 0x400c06e4
.set CYREG_USBDEVv2_MEM_DATA186, 0x400c06e8
.set CYREG_USBDEVv2_MEM_DATA187, 0x400c06ec
.set CYREG_USBDEVv2_MEM_DATA188, 0x400c06f0
.set CYREG_USBDEVv2_MEM_DATA189, 0x400c06f4
.set CYREG_USBDEVv2_MEM_DATA190, 0x400c06f8
.set CYREG_USBDEVv2_MEM_DATA191, 0x400c06fc
.set CYREG_USBDEVv2_MEM_DATA192, 0x400c0700
.set CYREG_USBDEVv2_MEM_DATA193, 0x400c0704
.set CYREG_USBDEVv2_MEM_DATA194, 0x400c0708
.set CYREG_USBDEVv2_MEM_DATA195, 0x400c070c
.set CYREG_USBDEVv2_MEM_DATA196, 0x400c0710
.set CYREG_USBDEVv2_MEM_DATA197, 0x400c0714
.set CYREG_USBDEVv2_MEM_DATA198, 0x400c0718
.set CYREG_USBDEVv2_MEM_DATA199, 0x400c071c
.set CYREG_USBDEVv2_MEM_DATA200, 0x400c0720
.set CYREG_USBDEVv2_MEM_DATA201, 0x400c0724
.set CYREG_USBDEVv2_MEM_DATA202, 0x400c0728
.set CYREG_USBDEVv2_MEM_DATA203, 0x400c072c
.set CYREG_USBDEVv2_MEM_DATA204, 0x400c0730
.set CYREG_USBDEVv2_MEM_DATA205, 0x400c0734
.set CYREG_USBDEVv2_MEM_DATA206, 0x400c0738
.set CYREG_USBDEVv2_MEM_DATA207, 0x400c073c
.set CYREG_USBDEVv2_MEM_DATA208, 0x400c0740
.set CYREG_USBDEVv2_MEM_DATA209, 0x400c0744
.set CYREG_USBDEVv2_MEM_DATA210, 0x400c0748
.set CYREG_USBDEVv2_MEM_DATA211, 0x400c074c
.set CYREG_USBDEVv2_MEM_DATA212, 0x400c0750
.set CYREG_USBDEVv2_MEM_DATA213, 0x400c0754
.set CYREG_USBDEVv2_MEM_DATA214, 0x400c0758
.set CYREG_USBDEVv2_MEM_DATA215, 0x400c075c
.set CYREG_USBDEVv2_MEM_DATA216, 0x400c0760
.set CYREG_USBDEVv2_MEM_DATA217, 0x400c0764
.set CYREG_USBDEVv2_MEM_DATA218, 0x400c0768
.set CYREG_USBDEVv2_MEM_DATA219, 0x400c076c
.set CYREG_USBDEVv2_MEM_DATA220, 0x400c0770
.set CYREG_USBDEVv2_MEM_DATA221, 0x400c0774
.set CYREG_USBDEVv2_MEM_DATA222, 0x400c0778
.set CYREG_USBDEVv2_MEM_DATA223, 0x400c077c
.set CYREG_USBDEVv2_MEM_DATA224, 0x400c0780
.set CYREG_USBDEVv2_MEM_DATA225, 0x400c0784
.set CYREG_USBDEVv2_MEM_DATA226, 0x400c0788
.set CYREG_USBDEVv2_MEM_DATA227, 0x400c078c
.set CYREG_USBDEVv2_MEM_DATA228, 0x400c0790
.set CYREG_USBDEVv2_MEM_DATA229, 0x400c0794
.set CYREG_USBDEVv2_MEM_DATA230, 0x400c0798
.set CYREG_USBDEVv2_MEM_DATA231, 0x400c079c
.set CYREG_USBDEVv2_MEM_DATA232, 0x400c07a0
.set CYREG_USBDEVv2_MEM_DATA233, 0x400c07a4
.set CYREG_USBDEVv2_MEM_DATA234, 0x400c07a8
.set CYREG_USBDEVv2_MEM_DATA235, 0x400c07ac
.set CYREG_USBDEVv2_MEM_DATA236, 0x400c07b0
.set CYREG_USBDEVv2_MEM_DATA237, 0x400c07b4
.set CYREG_USBDEVv2_MEM_DATA238, 0x400c07b8
.set CYREG_USBDEVv2_MEM_DATA239, 0x400c07bc
.set CYREG_USBDEVv2_MEM_DATA240, 0x400c07c0
.set CYREG_USBDEVv2_MEM_DATA241, 0x400c07c4
.set CYREG_USBDEVv2_MEM_DATA242, 0x400c07c8
.set CYREG_USBDEVv2_MEM_DATA243, 0x400c07cc
.set CYREG_USBDEVv2_MEM_DATA244, 0x400c07d0
.set CYREG_USBDEVv2_MEM_DATA245, 0x400c07d4
.set CYREG_USBDEVv2_MEM_DATA246, 0x400c07d8
.set CYREG_USBDEVv2_MEM_DATA247, 0x400c07dc
.set CYREG_USBDEVv2_MEM_DATA248, 0x400c07e0
.set CYREG_USBDEVv2_MEM_DATA249, 0x400c07e4
.set CYREG_USBDEVv2_MEM_DATA250, 0x400c07e8
.set CYREG_USBDEVv2_MEM_DATA251, 0x400c07ec
.set CYREG_USBDEVv2_MEM_DATA252, 0x400c07f0
.set CYREG_USBDEVv2_MEM_DATA253, 0x400c07f4
.set CYREG_USBDEVv2_MEM_DATA254, 0x400c07f8
.set CYREG_USBDEVv2_MEM_DATA255, 0x400c07fc
.set CYREG_USBDEVv2_MEM_DATA256, 0x400c0800
.set CYREG_USBDEVv2_MEM_DATA257, 0x400c0804
.set CYREG_USBDEVv2_MEM_DATA258, 0x400c0808
.set CYREG_USBDEVv2_MEM_DATA259, 0x400c080c
.set CYREG_USBDEVv2_MEM_DATA260, 0x400c0810
.set CYREG_USBDEVv2_MEM_DATA261, 0x400c0814
.set CYREG_USBDEVv2_MEM_DATA262, 0x400c0818
.set CYREG_USBDEVv2_MEM_DATA263, 0x400c081c
.set CYREG_USBDEVv2_MEM_DATA264, 0x400c0820
.set CYREG_USBDEVv2_MEM_DATA265, 0x400c0824
.set CYREG_USBDEVv2_MEM_DATA266, 0x400c0828
.set CYREG_USBDEVv2_MEM_DATA267, 0x400c082c
.set CYREG_USBDEVv2_MEM_DATA268, 0x400c0830
.set CYREG_USBDEVv2_MEM_DATA269, 0x400c0834
.set CYREG_USBDEVv2_MEM_DATA270, 0x400c0838
.set CYREG_USBDEVv2_MEM_DATA271, 0x400c083c
.set CYREG_USBDEVv2_MEM_DATA272, 0x400c0840
.set CYREG_USBDEVv2_MEM_DATA273, 0x400c0844
.set CYREG_USBDEVv2_MEM_DATA274, 0x400c0848
.set CYREG_USBDEVv2_MEM_DATA275, 0x400c084c
.set CYREG_USBDEVv2_MEM_DATA276, 0x400c0850
.set CYREG_USBDEVv2_MEM_DATA277, 0x400c0854
.set CYREG_USBDEVv2_MEM_DATA278, 0x400c0858
.set CYREG_USBDEVv2_MEM_DATA279, 0x400c085c
.set CYREG_USBDEVv2_MEM_DATA280, 0x400c0860
.set CYREG_USBDEVv2_MEM_DATA281, 0x400c0864
.set CYREG_USBDEVv2_MEM_DATA282, 0x400c0868
.set CYREG_USBDEVv2_MEM_DATA283, 0x400c086c
.set CYREG_USBDEVv2_MEM_DATA284, 0x400c0870
.set CYREG_USBDEVv2_MEM_DATA285, 0x400c0874
.set CYREG_USBDEVv2_MEM_DATA286, 0x400c0878
.set CYREG_USBDEVv2_MEM_DATA287, 0x400c087c
.set CYREG_USBDEVv2_MEM_DATA288, 0x400c0880
.set CYREG_USBDEVv2_MEM_DATA289, 0x400c0884
.set CYREG_USBDEVv2_MEM_DATA290, 0x400c0888
.set CYREG_USBDEVv2_MEM_DATA291, 0x400c088c
.set CYREG_USBDEVv2_MEM_DATA292, 0x400c0890
.set CYREG_USBDEVv2_MEM_DATA293, 0x400c0894
.set CYREG_USBDEVv2_MEM_DATA294, 0x400c0898
.set CYREG_USBDEVv2_MEM_DATA295, 0x400c089c
.set CYREG_USBDEVv2_MEM_DATA296, 0x400c08a0
.set CYREG_USBDEVv2_MEM_DATA297, 0x400c08a4
.set CYREG_USBDEVv2_MEM_DATA298, 0x400c08a8
.set CYREG_USBDEVv2_MEM_DATA299, 0x400c08ac
.set CYREG_USBDEVv2_MEM_DATA300, 0x400c08b0
.set CYREG_USBDEVv2_MEM_DATA301, 0x400c08b4
.set CYREG_USBDEVv2_MEM_DATA302, 0x400c08b8
.set CYREG_USBDEVv2_MEM_DATA303, 0x400c08bc
.set CYREG_USBDEVv2_MEM_DATA304, 0x400c08c0
.set CYREG_USBDEVv2_MEM_DATA305, 0x400c08c4
.set CYREG_USBDEVv2_MEM_DATA306, 0x400c08c8
.set CYREG_USBDEVv2_MEM_DATA307, 0x400c08cc
.set CYREG_USBDEVv2_MEM_DATA308, 0x400c08d0
.set CYREG_USBDEVv2_MEM_DATA309, 0x400c08d4
.set CYREG_USBDEVv2_MEM_DATA310, 0x400c08d8
.set CYREG_USBDEVv2_MEM_DATA311, 0x400c08dc
.set CYREG_USBDEVv2_MEM_DATA312, 0x400c08e0
.set CYREG_USBDEVv2_MEM_DATA313, 0x400c08e4
.set CYREG_USBDEVv2_MEM_DATA314, 0x400c08e8
.set CYREG_USBDEVv2_MEM_DATA315, 0x400c08ec
.set CYREG_USBDEVv2_MEM_DATA316, 0x400c08f0
.set CYREG_USBDEVv2_MEM_DATA317, 0x400c08f4
.set CYREG_USBDEVv2_MEM_DATA318, 0x400c08f8
.set CYREG_USBDEVv2_MEM_DATA319, 0x400c08fc
.set CYREG_USBDEVv2_MEM_DATA320, 0x400c0900
.set CYREG_USBDEVv2_MEM_DATA321, 0x400c0904
.set CYREG_USBDEVv2_MEM_DATA322, 0x400c0908
.set CYREG_USBDEVv2_MEM_DATA323, 0x400c090c
.set CYREG_USBDEVv2_MEM_DATA324, 0x400c0910
.set CYREG_USBDEVv2_MEM_DATA325, 0x400c0914
.set CYREG_USBDEVv2_MEM_DATA326, 0x400c0918
.set CYREG_USBDEVv2_MEM_DATA327, 0x400c091c
.set CYREG_USBDEVv2_MEM_DATA328, 0x400c0920
.set CYREG_USBDEVv2_MEM_DATA329, 0x400c0924
.set CYREG_USBDEVv2_MEM_DATA330, 0x400c0928
.set CYREG_USBDEVv2_MEM_DATA331, 0x400c092c
.set CYREG_USBDEVv2_MEM_DATA332, 0x400c0930
.set CYREG_USBDEVv2_MEM_DATA333, 0x400c0934
.set CYREG_USBDEVv2_MEM_DATA334, 0x400c0938
.set CYREG_USBDEVv2_MEM_DATA335, 0x400c093c
.set CYREG_USBDEVv2_MEM_DATA336, 0x400c0940
.set CYREG_USBDEVv2_MEM_DATA337, 0x400c0944
.set CYREG_USBDEVv2_MEM_DATA338, 0x400c0948
.set CYREG_USBDEVv2_MEM_DATA339, 0x400c094c
.set CYREG_USBDEVv2_MEM_DATA340, 0x400c0950
.set CYREG_USBDEVv2_MEM_DATA341, 0x400c0954
.set CYREG_USBDEVv2_MEM_DATA342, 0x400c0958
.set CYREG_USBDEVv2_MEM_DATA343, 0x400c095c
.set CYREG_USBDEVv2_MEM_DATA344, 0x400c0960
.set CYREG_USBDEVv2_MEM_DATA345, 0x400c0964
.set CYREG_USBDEVv2_MEM_DATA346, 0x400c0968
.set CYREG_USBDEVv2_MEM_DATA347, 0x400c096c
.set CYREG_USBDEVv2_MEM_DATA348, 0x400c0970
.set CYREG_USBDEVv2_MEM_DATA349, 0x400c0974
.set CYREG_USBDEVv2_MEM_DATA350, 0x400c0978
.set CYREG_USBDEVv2_MEM_DATA351, 0x400c097c
.set CYREG_USBDEVv2_MEM_DATA352, 0x400c0980
.set CYREG_USBDEVv2_MEM_DATA353, 0x400c0984
.set CYREG_USBDEVv2_MEM_DATA354, 0x400c0988
.set CYREG_USBDEVv2_MEM_DATA355, 0x400c098c
.set CYREG_USBDEVv2_MEM_DATA356, 0x400c0990
.set CYREG_USBDEVv2_MEM_DATA357, 0x400c0994
.set CYREG_USBDEVv2_MEM_DATA358, 0x400c0998
.set CYREG_USBDEVv2_MEM_DATA359, 0x400c099c
.set CYREG_USBDEVv2_MEM_DATA360, 0x400c09a0
.set CYREG_USBDEVv2_MEM_DATA361, 0x400c09a4
.set CYREG_USBDEVv2_MEM_DATA362, 0x400c09a8
.set CYREG_USBDEVv2_MEM_DATA363, 0x400c09ac
.set CYREG_USBDEVv2_MEM_DATA364, 0x400c09b0
.set CYREG_USBDEVv2_MEM_DATA365, 0x400c09b4
.set CYREG_USBDEVv2_MEM_DATA366, 0x400c09b8
.set CYREG_USBDEVv2_MEM_DATA367, 0x400c09bc
.set CYREG_USBDEVv2_MEM_DATA368, 0x400c09c0
.set CYREG_USBDEVv2_MEM_DATA369, 0x400c09c4
.set CYREG_USBDEVv2_MEM_DATA370, 0x400c09c8
.set CYREG_USBDEVv2_MEM_DATA371, 0x400c09cc
.set CYREG_USBDEVv2_MEM_DATA372, 0x400c09d0
.set CYREG_USBDEVv2_MEM_DATA373, 0x400c09d4
.set CYREG_USBDEVv2_MEM_DATA374, 0x400c09d8
.set CYREG_USBDEVv2_MEM_DATA375, 0x400c09dc
.set CYREG_USBDEVv2_MEM_DATA376, 0x400c09e0
.set CYREG_USBDEVv2_MEM_DATA377, 0x400c09e4
.set CYREG_USBDEVv2_MEM_DATA378, 0x400c09e8
.set CYREG_USBDEVv2_MEM_DATA379, 0x400c09ec
.set CYREG_USBDEVv2_MEM_DATA380, 0x400c09f0
.set CYREG_USBDEVv2_MEM_DATA381, 0x400c09f4
.set CYREG_USBDEVv2_MEM_DATA382, 0x400c09f8
.set CYREG_USBDEVv2_MEM_DATA383, 0x400c09fc
.set CYREG_USBDEVv2_MEM_DATA384, 0x400c0a00
.set CYREG_USBDEVv2_MEM_DATA385, 0x400c0a04
.set CYREG_USBDEVv2_MEM_DATA386, 0x400c0a08
.set CYREG_USBDEVv2_MEM_DATA387, 0x400c0a0c
.set CYREG_USBDEVv2_MEM_DATA388, 0x400c0a10
.set CYREG_USBDEVv2_MEM_DATA389, 0x400c0a14
.set CYREG_USBDEVv2_MEM_DATA390, 0x400c0a18
.set CYREG_USBDEVv2_MEM_DATA391, 0x400c0a1c
.set CYREG_USBDEVv2_MEM_DATA392, 0x400c0a20
.set CYREG_USBDEVv2_MEM_DATA393, 0x400c0a24
.set CYREG_USBDEVv2_MEM_DATA394, 0x400c0a28
.set CYREG_USBDEVv2_MEM_DATA395, 0x400c0a2c
.set CYREG_USBDEVv2_MEM_DATA396, 0x400c0a30
.set CYREG_USBDEVv2_MEM_DATA397, 0x400c0a34
.set CYREG_USBDEVv2_MEM_DATA398, 0x400c0a38
.set CYREG_USBDEVv2_MEM_DATA399, 0x400c0a3c
.set CYREG_USBDEVv2_MEM_DATA400, 0x400c0a40
.set CYREG_USBDEVv2_MEM_DATA401, 0x400c0a44
.set CYREG_USBDEVv2_MEM_DATA402, 0x400c0a48
.set CYREG_USBDEVv2_MEM_DATA403, 0x400c0a4c
.set CYREG_USBDEVv2_MEM_DATA404, 0x400c0a50
.set CYREG_USBDEVv2_MEM_DATA405, 0x400c0a54
.set CYREG_USBDEVv2_MEM_DATA406, 0x400c0a58
.set CYREG_USBDEVv2_MEM_DATA407, 0x400c0a5c
.set CYREG_USBDEVv2_MEM_DATA408, 0x400c0a60
.set CYREG_USBDEVv2_MEM_DATA409, 0x400c0a64
.set CYREG_USBDEVv2_MEM_DATA410, 0x400c0a68
.set CYREG_USBDEVv2_MEM_DATA411, 0x400c0a6c
.set CYREG_USBDEVv2_MEM_DATA412, 0x400c0a70
.set CYREG_USBDEVv2_MEM_DATA413, 0x400c0a74
.set CYREG_USBDEVv2_MEM_DATA414, 0x400c0a78
.set CYREG_USBDEVv2_MEM_DATA415, 0x400c0a7c
.set CYREG_USBDEVv2_MEM_DATA416, 0x400c0a80
.set CYREG_USBDEVv2_MEM_DATA417, 0x400c0a84
.set CYREG_USBDEVv2_MEM_DATA418, 0x400c0a88
.set CYREG_USBDEVv2_MEM_DATA419, 0x400c0a8c
.set CYREG_USBDEVv2_MEM_DATA420, 0x400c0a90
.set CYREG_USBDEVv2_MEM_DATA421, 0x400c0a94
.set CYREG_USBDEVv2_MEM_DATA422, 0x400c0a98
.set CYREG_USBDEVv2_MEM_DATA423, 0x400c0a9c
.set CYREG_USBDEVv2_MEM_DATA424, 0x400c0aa0
.set CYREG_USBDEVv2_MEM_DATA425, 0x400c0aa4
.set CYREG_USBDEVv2_MEM_DATA426, 0x400c0aa8
.set CYREG_USBDEVv2_MEM_DATA427, 0x400c0aac
.set CYREG_USBDEVv2_MEM_DATA428, 0x400c0ab0
.set CYREG_USBDEVv2_MEM_DATA429, 0x400c0ab4
.set CYREG_USBDEVv2_MEM_DATA430, 0x400c0ab8
.set CYREG_USBDEVv2_MEM_DATA431, 0x400c0abc
.set CYREG_USBDEVv2_MEM_DATA432, 0x400c0ac0
.set CYREG_USBDEVv2_MEM_DATA433, 0x400c0ac4
.set CYREG_USBDEVv2_MEM_DATA434, 0x400c0ac8
.set CYREG_USBDEVv2_MEM_DATA435, 0x400c0acc
.set CYREG_USBDEVv2_MEM_DATA436, 0x400c0ad0
.set CYREG_USBDEVv2_MEM_DATA437, 0x400c0ad4
.set CYREG_USBDEVv2_MEM_DATA438, 0x400c0ad8
.set CYREG_USBDEVv2_MEM_DATA439, 0x400c0adc
.set CYREG_USBDEVv2_MEM_DATA440, 0x400c0ae0
.set CYREG_USBDEVv2_MEM_DATA441, 0x400c0ae4
.set CYREG_USBDEVv2_MEM_DATA442, 0x400c0ae8
.set CYREG_USBDEVv2_MEM_DATA443, 0x400c0aec
.set CYREG_USBDEVv2_MEM_DATA444, 0x400c0af0
.set CYREG_USBDEVv2_MEM_DATA445, 0x400c0af4
.set CYREG_USBDEVv2_MEM_DATA446, 0x400c0af8
.set CYREG_USBDEVv2_MEM_DATA447, 0x400c0afc
.set CYREG_USBDEVv2_MEM_DATA448, 0x400c0b00
.set CYREG_USBDEVv2_MEM_DATA449, 0x400c0b04
.set CYREG_USBDEVv2_MEM_DATA450, 0x400c0b08
.set CYREG_USBDEVv2_MEM_DATA451, 0x400c0b0c
.set CYREG_USBDEVv2_MEM_DATA452, 0x400c0b10
.set CYREG_USBDEVv2_MEM_DATA453, 0x400c0b14
.set CYREG_USBDEVv2_MEM_DATA454, 0x400c0b18
.set CYREG_USBDEVv2_MEM_DATA455, 0x400c0b1c
.set CYREG_USBDEVv2_MEM_DATA456, 0x400c0b20
.set CYREG_USBDEVv2_MEM_DATA457, 0x400c0b24
.set CYREG_USBDEVv2_MEM_DATA458, 0x400c0b28
.set CYREG_USBDEVv2_MEM_DATA459, 0x400c0b2c
.set CYREG_USBDEVv2_MEM_DATA460, 0x400c0b30
.set CYREG_USBDEVv2_MEM_DATA461, 0x400c0b34
.set CYREG_USBDEVv2_MEM_DATA462, 0x400c0b38
.set CYREG_USBDEVv2_MEM_DATA463, 0x400c0b3c
.set CYREG_USBDEVv2_MEM_DATA464, 0x400c0b40
.set CYREG_USBDEVv2_MEM_DATA465, 0x400c0b44
.set CYREG_USBDEVv2_MEM_DATA466, 0x400c0b48
.set CYREG_USBDEVv2_MEM_DATA467, 0x400c0b4c
.set CYREG_USBDEVv2_MEM_DATA468, 0x400c0b50
.set CYREG_USBDEVv2_MEM_DATA469, 0x400c0b54
.set CYREG_USBDEVv2_MEM_DATA470, 0x400c0b58
.set CYREG_USBDEVv2_MEM_DATA471, 0x400c0b5c
.set CYREG_USBDEVv2_MEM_DATA472, 0x400c0b60
.set CYREG_USBDEVv2_MEM_DATA473, 0x400c0b64
.set CYREG_USBDEVv2_MEM_DATA474, 0x400c0b68
.set CYREG_USBDEVv2_MEM_DATA475, 0x400c0b6c
.set CYREG_USBDEVv2_MEM_DATA476, 0x400c0b70
.set CYREG_USBDEVv2_MEM_DATA477, 0x400c0b74
.set CYREG_USBDEVv2_MEM_DATA478, 0x400c0b78
.set CYREG_USBDEVv2_MEM_DATA479, 0x400c0b7c
.set CYREG_USBDEVv2_MEM_DATA480, 0x400c0b80
.set CYREG_USBDEVv2_MEM_DATA481, 0x400c0b84
.set CYREG_USBDEVv2_MEM_DATA482, 0x400c0b88
.set CYREG_USBDEVv2_MEM_DATA483, 0x400c0b8c
.set CYREG_USBDEVv2_MEM_DATA484, 0x400c0b90
.set CYREG_USBDEVv2_MEM_DATA485, 0x400c0b94
.set CYREG_USBDEVv2_MEM_DATA486, 0x400c0b98
.set CYREG_USBDEVv2_MEM_DATA487, 0x400c0b9c
.set CYREG_USBDEVv2_MEM_DATA488, 0x400c0ba0
.set CYREG_USBDEVv2_MEM_DATA489, 0x400c0ba4
.set CYREG_USBDEVv2_MEM_DATA490, 0x400c0ba8
.set CYREG_USBDEVv2_MEM_DATA491, 0x400c0bac
.set CYREG_USBDEVv2_MEM_DATA492, 0x400c0bb0
.set CYREG_USBDEVv2_MEM_DATA493, 0x400c0bb4
.set CYREG_USBDEVv2_MEM_DATA494, 0x400c0bb8
.set CYREG_USBDEVv2_MEM_DATA495, 0x400c0bbc
.set CYREG_USBDEVv2_MEM_DATA496, 0x400c0bc0
.set CYREG_USBDEVv2_MEM_DATA497, 0x400c0bc4
.set CYREG_USBDEVv2_MEM_DATA498, 0x400c0bc8
.set CYREG_USBDEVv2_MEM_DATA499, 0x400c0bcc
.set CYREG_USBDEVv2_MEM_DATA500, 0x400c0bd0
.set CYREG_USBDEVv2_MEM_DATA501, 0x400c0bd4
.set CYREG_USBDEVv2_MEM_DATA502, 0x400c0bd8
.set CYREG_USBDEVv2_MEM_DATA503, 0x400c0bdc
.set CYREG_USBDEVv2_MEM_DATA504, 0x400c0be0
.set CYREG_USBDEVv2_MEM_DATA505, 0x400c0be4
.set CYREG_USBDEVv2_MEM_DATA506, 0x400c0be8
.set CYREG_USBDEVv2_MEM_DATA507, 0x400c0bec
.set CYREG_USBDEVv2_MEM_DATA508, 0x400c0bf0
.set CYREG_USBDEVv2_MEM_DATA509, 0x400c0bf4
.set CYREG_USBDEVv2_MEM_DATA510, 0x400c0bf8
.set CYREG_USBDEVv2_MEM_DATA511, 0x400c0bfc
.set CYREG_USBDEVv2_SOF16, 0x400c1060
.set CYFLD_USBDEVv2_FRAME_NUMBER16__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_FRAME_NUMBER16__SIZE, 0x0000000b
.set CYREG_USBDEVv2_OSCLK_DR16, 0x400c1080
.set CYFLD_USBDEVv2_ADDER16__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_ADDER16__SIZE, 0x0000000f
.set CYREG_USBDEVv2_ARB_RW1_WA16, 0x400c1210
.set CYFLD_USBDEVv2_WA16__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_WA16__SIZE, 0x00000009
.set CYREG_USBDEVv2_ARB_RW1_RA16, 0x400c1218
.set CYFLD_USBDEVv2_RA16__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_RA16__SIZE, 0x00000009
.set CYREG_USBDEVv2_ARB_RW1_DR16, 0x400c1220
.set CYFLD_USBDEVv2_DR16__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_DR16__SIZE, 0x00000010
.set CYREG_USBDEVv2_ARB_RW2_WA16, 0x400c1250
.set CYREG_USBDEVv2_ARB_RW2_RA16, 0x400c1258
.set CYREG_USBDEVv2_ARB_RW2_DR16, 0x400c1260
.set CYREG_USBDEVv2_ARB_RW3_WA16, 0x400c1290
.set CYREG_USBDEVv2_ARB_RW3_RA16, 0x400c1298
.set CYREG_USBDEVv2_ARB_RW3_DR16, 0x400c12a0
.set CYREG_USBDEVv2_CWA16, 0x400c12b0
.set CYFLD_USBDEVv2_CWA16__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_CWA16__SIZE, 0x00000009
.set CYREG_USBDEVv2_ARB_RW4_WA16, 0x400c12d0
.set CYREG_USBDEVv2_ARB_RW4_RA16, 0x400c12d8
.set CYREG_USBDEVv2_ARB_RW4_DR16, 0x400c12e0
.set CYREG_USBDEVv2_DMA_THRES16, 0x400c12f0
.set CYFLD_USBDEVv2_DMA_THS16__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_DMA_THS16__SIZE, 0x00000009
.set CYREG_USBDEVv2_ARB_RW5_WA16, 0x400c1310
.set CYREG_USBDEVv2_ARB_RW5_RA16, 0x400c1318
.set CYREG_USBDEVv2_ARB_RW5_DR16, 0x400c1320
.set CYREG_USBDEVv2_ARB_RW6_WA16, 0x400c1350
.set CYREG_USBDEVv2_ARB_RW6_RA16, 0x400c1358
.set CYREG_USBDEVv2_ARB_RW6_DR16, 0x400c1360
.set CYREG_USBDEVv2_ARB_RW7_WA16, 0x400c1390
.set CYREG_USBDEVv2_ARB_RW7_RA16, 0x400c1398
.set CYREG_USBDEVv2_ARB_RW7_DR16, 0x400c13a0
.set CYREG_USBDEVv2_ARB_RW8_WA16, 0x400c13d0
.set CYREG_USBDEVv2_ARB_RW8_RA16, 0x400c13d8
.set CYREG_USBDEVv2_ARB_RW8_DR16, 0x400c13e0
.set CYDEV_USBDEVv2_USB_BASE, 0x400c2000
.set CYDEV_USBDEVv2_USB_SIZE, 0x00001000
.set CYREG_USBDEVv2_USB_POWER_CTRL, 0x400c2000
.set CYFLD_USBDEVv2_USB_VBUS_VALID_OVR__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_USB_VBUS_VALID_OVR__SIZE, 0x00000002
.set CYFLD_USBDEVv2_USB_SUSPEND__OFFSET, 0x00000002
.set CYFLD_USBDEVv2_USB_SUSPEND__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_SUSPEND_DEL__OFFSET, 0x00000003
.set CYFLD_USBDEVv2_USB_SUSPEND_DEL__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_ISOLATE__OFFSET, 0x00000004
.set CYFLD_USBDEVv2_USB_ISOLATE__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_ENABLE_RCVR__OFFSET, 0x0000001b
.set CYFLD_USBDEVv2_USB_ENABLE_RCVR__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_ENABLE_DPO__OFFSET, 0x0000001c
.set CYFLD_USBDEVv2_USB_ENABLE_DPO__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_ENABLE_DMO__OFFSET, 0x0000001d
.set CYFLD_USBDEVv2_USB_ENABLE_DMO__SIZE, 0x00000001
.set CYREG_USBDEVv2_USB_USBIO_CTRL, 0x400c2008
.set CYFLD_USBDEVv2_USB_DM_P__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_USB_DM_P__SIZE, 0x00000003
.set CYVAL_USBDEVv2_USB_DM_P_OFF, 0x00000000
.set CYVAL_USBDEVv2_USB_DM_P_INPUT, 0x00000001
.set CYVAL_USBDEVv2_USB_DM_P_0_PU, 0x00000002
.set CYVAL_USBDEVv2_USB_DM_P_0_Z, 0x00000004
.set CYVAL_USBDEVv2_USB_DM_P_0_1, 0x00000006
.set CYFLD_USBDEVv2_USB_DM_M__OFFSET, 0x00000003
.set CYFLD_USBDEVv2_USB_DM_M__SIZE, 0x00000003
.set CYREG_USBDEVv2_USB_FLOW_CTRL, 0x400c200c
.set CYFLD_USBDEVv2_USB_EP1_ERR_RESP__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_USB_EP1_ERR_RESP__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_EP2_ERR_RESP__OFFSET, 0x00000001
.set CYFLD_USBDEVv2_USB_EP2_ERR_RESP__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_EP3_ERR_RESP__OFFSET, 0x00000002
.set CYFLD_USBDEVv2_USB_EP3_ERR_RESP__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_EP4_ERR_RESP__OFFSET, 0x00000003
.set CYFLD_USBDEVv2_USB_EP4_ERR_RESP__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_EP5_ERR_RESP__OFFSET, 0x00000004
.set CYFLD_USBDEVv2_USB_EP5_ERR_RESP__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_EP6_ERR_RESP__OFFSET, 0x00000005
.set CYFLD_USBDEVv2_USB_EP6_ERR_RESP__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_EP7_ERR_RESP__OFFSET, 0x00000006
.set CYFLD_USBDEVv2_USB_EP7_ERR_RESP__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_EP8_ERR_RESP__OFFSET, 0x00000007
.set CYFLD_USBDEVv2_USB_EP8_ERR_RESP__SIZE, 0x00000001
.set CYREG_USBDEVv2_USB_LPM_CTRL, 0x400c2010
.set CYFLD_USBDEVv2_USB_LPM_EN__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_USB_LPM_EN__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_LPM_ACK_RESP__OFFSET, 0x00000001
.set CYFLD_USBDEVv2_USB_LPM_ACK_RESP__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_NYET_EN__OFFSET, 0x00000002
.set CYFLD_USBDEVv2_USB_NYET_EN__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_SUB_RESP__OFFSET, 0x00000004
.set CYFLD_USBDEVv2_USB_SUB_RESP__SIZE, 0x00000001
.set CYREG_USBDEVv2_USB_LPM_STAT, 0x400c2014
.set CYFLD_USBDEVv2_USB_LPM_BESL__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_USB_LPM_BESL__SIZE, 0x00000004
.set CYFLD_USBDEVv2_USB_LPM_REMOTEWAKE__OFFSET, 0x00000004
.set CYFLD_USBDEVv2_USB_LPM_REMOTEWAKE__SIZE, 0x00000001
.set CYREG_USBDEVv2_USB_INTR_SIE, 0x400c2020
.set CYFLD_USBDEVv2_USB_SOF_INTR__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_USB_SOF_INTR__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_BUS_RESET_INTR__OFFSET, 0x00000001
.set CYFLD_USBDEVv2_USB_BUS_RESET_INTR__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_EP0_INTR__OFFSET, 0x00000002
.set CYFLD_USBDEVv2_USB_EP0_INTR__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_LPM_INTR__OFFSET, 0x00000003
.set CYFLD_USBDEVv2_USB_LPM_INTR__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_RESUME_INTR__OFFSET, 0x00000004
.set CYFLD_USBDEVv2_USB_RESUME_INTR__SIZE, 0x00000001
.set CYREG_USBDEVv2_USB_INTR_SIE_SET, 0x400c2024
.set CYFLD_USBDEVv2_USB_SOF_INTR_SET__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_USB_SOF_INTR_SET__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_BUS_RESET_INTR_SET__OFFSET, 0x00000001
.set CYFLD_USBDEVv2_USB_BUS_RESET_INTR_SET__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_EP0_INTR_SET__OFFSET, 0x00000002
.set CYFLD_USBDEVv2_USB_EP0_INTR_SET__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_LPM_INTR_SET__OFFSET, 0x00000003
.set CYFLD_USBDEVv2_USB_LPM_INTR_SET__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_RESUME_INTR_SET__OFFSET, 0x00000004
.set CYFLD_USBDEVv2_USB_RESUME_INTR_SET__SIZE, 0x00000001
.set CYREG_USBDEVv2_USB_INTR_SIE_MASK, 0x400c2028
.set CYFLD_USBDEVv2_USB_SOF_INTR_MASK__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_USB_SOF_INTR_MASK__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_BUS_RESET_INTR_MASK__OFFSET, 0x00000001
.set CYFLD_USBDEVv2_USB_BUS_RESET_INTR_MASK__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_EP0_INTR_MASK__OFFSET, 0x00000002
.set CYFLD_USBDEVv2_USB_EP0_INTR_MASK__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_LPM_INTR_MASK__OFFSET, 0x00000003
.set CYFLD_USBDEVv2_USB_LPM_INTR_MASK__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_RESUME_INTR_MASK__OFFSET, 0x00000004
.set CYFLD_USBDEVv2_USB_RESUME_INTR_MASK__SIZE, 0x00000001
.set CYREG_USBDEVv2_USB_INTR_SIE_MASKED, 0x400c202c
.set CYFLD_USBDEVv2_USB_SOF_INTR_MASKED__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_USB_SOF_INTR_MASKED__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_BUS_RESET_INTR_MASKED__OFFSET, 0x00000001
.set CYFLD_USBDEVv2_USB_BUS_RESET_INTR_MASKED__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_EP0_INTR_MASKED__OFFSET, 0x00000002
.set CYFLD_USBDEVv2_USB_EP0_INTR_MASKED__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_LPM_INTR_MASKED__OFFSET, 0x00000003
.set CYFLD_USBDEVv2_USB_LPM_INTR_MASKED__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_RESUME_INTR_MASKED__OFFSET, 0x00000004
.set CYFLD_USBDEVv2_USB_RESUME_INTR_MASKED__SIZE, 0x00000001
.set CYREG_USBDEVv2_USB_INTR_LVL_SEL, 0x400c2030
.set CYFLD_USBDEVv2_USB_SOF_LVL_SEL__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_USB_SOF_LVL_SEL__SIZE, 0x00000002
.set CYVAL_USBDEVv2_USB_SOF_LVL_SEL_HI, 0x00000000
.set CYVAL_USBDEVv2_USB_SOF_LVL_SEL_MED, 0x00000001
.set CYVAL_USBDEVv2_USB_SOF_LVL_SEL_LO, 0x00000002
.set CYVAL_USBDEVv2_USB_SOF_LVL_SEL_RESERVED, 0x00000003
.set CYFLD_USBDEVv2_USB_BUS_RESET_LVL_SEL__OFFSET, 0x00000002
.set CYFLD_USBDEVv2_USB_BUS_RESET_LVL_SEL__SIZE, 0x00000002
.set CYFLD_USBDEVv2_USB_EP0_LVL_SEL__OFFSET, 0x00000004
.set CYFLD_USBDEVv2_USB_EP0_LVL_SEL__SIZE, 0x00000002
.set CYFLD_USBDEVv2_USB_LPM_LVL_SEL__OFFSET, 0x00000006
.set CYFLD_USBDEVv2_USB_LPM_LVL_SEL__SIZE, 0x00000002
.set CYFLD_USBDEVv2_USB_RESUME_LVL_SEL__OFFSET, 0x00000008
.set CYFLD_USBDEVv2_USB_RESUME_LVL_SEL__SIZE, 0x00000002
.set CYFLD_USBDEVv2_USB_ARB_EP_LVL_SEL__OFFSET, 0x0000000e
.set CYFLD_USBDEVv2_USB_ARB_EP_LVL_SEL__SIZE, 0x00000002
.set CYFLD_USBDEVv2_USB_EP1_LVL_SEL__OFFSET, 0x00000010
.set CYFLD_USBDEVv2_USB_EP1_LVL_SEL__SIZE, 0x00000002
.set CYFLD_USBDEVv2_USB_EP2_LVL_SEL__OFFSET, 0x00000012
.set CYFLD_USBDEVv2_USB_EP2_LVL_SEL__SIZE, 0x00000002
.set CYFLD_USBDEVv2_USB_EP3_LVL_SEL__OFFSET, 0x00000014
.set CYFLD_USBDEVv2_USB_EP3_LVL_SEL__SIZE, 0x00000002
.set CYFLD_USBDEVv2_USB_EP4_LVL_SEL__OFFSET, 0x00000016
.set CYFLD_USBDEVv2_USB_EP4_LVL_SEL__SIZE, 0x00000002
.set CYFLD_USBDEVv2_USB_EP5_LVL_SEL__OFFSET, 0x00000018
.set CYFLD_USBDEVv2_USB_EP5_LVL_SEL__SIZE, 0x00000002
.set CYFLD_USBDEVv2_USB_EP6_LVL_SEL__OFFSET, 0x0000001a
.set CYFLD_USBDEVv2_USB_EP6_LVL_SEL__SIZE, 0x00000002
.set CYFLD_USBDEVv2_USB_EP7_LVL_SEL__OFFSET, 0x0000001c
.set CYFLD_USBDEVv2_USB_EP7_LVL_SEL__SIZE, 0x00000002
.set CYFLD_USBDEVv2_USB_EP8_LVL_SEL__OFFSET, 0x0000001e
.set CYFLD_USBDEVv2_USB_EP8_LVL_SEL__SIZE, 0x00000002
.set CYREG_USBDEVv2_USB_INTR_CAUSE_HI, 0x400c2034
.set CYFLD_USBDEVv2_USB_ARB_EP_INTR__OFFSET, 0x00000007
.set CYFLD_USBDEVv2_USB_ARB_EP_INTR__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_EP1_INTR__OFFSET, 0x00000008
.set CYFLD_USBDEVv2_USB_EP1_INTR__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_EP2_INTR__OFFSET, 0x00000009
.set CYFLD_USBDEVv2_USB_EP2_INTR__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_EP3_INTR__OFFSET, 0x0000000a
.set CYFLD_USBDEVv2_USB_EP3_INTR__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_EP4_INTR__OFFSET, 0x0000000b
.set CYFLD_USBDEVv2_USB_EP4_INTR__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_EP5_INTR__OFFSET, 0x0000000c
.set CYFLD_USBDEVv2_USB_EP5_INTR__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_EP6_INTR__OFFSET, 0x0000000d
.set CYFLD_USBDEVv2_USB_EP6_INTR__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_EP7_INTR__OFFSET, 0x0000000e
.set CYFLD_USBDEVv2_USB_EP7_INTR__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_EP8_INTR__OFFSET, 0x0000000f
.set CYFLD_USBDEVv2_USB_EP8_INTR__SIZE, 0x00000001
.set CYREG_USBDEVv2_USB_INTR_CAUSE_MED, 0x400c2038
.set CYREG_USBDEVv2_USB_INTR_CAUSE_LO, 0x400c203c
.set CYREG_USBDEVv2_USB_DFT_CTRL, 0x400c2070
.set CYFLD_USBDEVv2_USB_DDFT_SEL__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_USB_DDFT_SEL__SIZE, 0x00000003
.set CYVAL_USBDEVv2_USB_DDFT_SEL_OFF, 0x00000000
.set CYVAL_USBDEVv2_USB_DDFT_SEL_DP_SE, 0x00000001
.set CYVAL_USBDEVv2_USB_DDFT_SEL_DM_SE, 0x00000002
.set CYVAL_USBDEVv2_USB_DDFT_SEL_RCV_DF, 0x00000003
.set CYVAL_USBDEVv2_USB_DDFT_SEL_CHRG_DET, 0x00000004
.set CYVAL_USBDEVv2_USB_DDFT_SEL_VBUS_DET, 0x00000005
.set CYFLD_USBDEVv2_USB_ADFT_VREFOUT_SEL__OFFSET, 0x00000008
.set CYFLD_USBDEVv2_USB_ADFT_VREFOUT_SEL__SIZE, 0x00000002
.set CYVAL_USBDEVv2_USB_ADFT_VREFOUT_SEL_OPEN, 0x00000000
.set CYVAL_USBDEVv2_USB_ADFT_VREFOUT_SEL_AMUXA, 0x00000001
.set CYVAL_USBDEVv2_USB_ADFT_VREFOUT_SEL_AMUXB, 0x00000002
.set CYVAL_USBDEVv2_USB_ADFT_VREFOUT_SEL_RSVD, 0x00000003
.set CYREG_USBDEVv2_USB_PHY_TRIM0, 0x400c2f00
.set CYFLD_USBDEVv2_USB_TRIM_DP_R_REG__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_USB_TRIM_DP_R_REG__SIZE, 0x00000006
.set CYREG_USBDEVv2_USB_PHY_TRIM1, 0x400c2f04
.set CYFLD_USBDEVv2_USB_TRIM_DM_R_REG__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_USB_TRIM_DM_R_REG__SIZE, 0x00000006
.set CYREG_USBDEVv2_USB_PHY_TRIM2, 0x400c2f08
.set CYFLD_USBDEVv2_USB_TRIM_DP_R_BYPASS__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_USB_TRIM_DP_R_BYPASS__SIZE, 0x00000006
.set CYREG_USBDEVv2_USB_PHY_TRIM3, 0x400c2f0c
.set CYFLD_USBDEVv2_USB_TRIM_DM_R_BYPASS__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_USB_TRIM_DM_R_BYPASS__SIZE, 0x00000006
.set CYREG_USBDEVv2_USB_CHGDET_TRIM, 0x400c2f10
.set CYFLD_USBDEVv2_USB_V325M_TRIM__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_USB_V325M_TRIM__SIZE, 0x00000002
.set CYFLD_USBDEVv2_USB_V600M_TRIM__OFFSET, 0x00000004
.set CYFLD_USBDEVv2_USB_V600M_TRIM__SIZE, 0x00000003
.set CYREG_USBDEVv2_USB_TRIM, 0x400c2f14
.set CYFLD_USBDEVv2_USB_DM_PD_VAL__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_USB_DM_PD_VAL__SIZE, 0x00000002
.set CYREG_USBDEVv2_USB_USBIO_TRIM, 0x400c2f18
.set CYFLD_USBDEVv2_USB_TRIM__OFFSET, 0x00000000
.set CYFLD_USBDEVv2_USB_TRIM__SIZE, 0x00000002
.set CYVAL_USBDEVv2_USB_TRIM_TRIM_NO, 0x00000000
.set CYVAL_USBDEVv2_USB_TRIM_TRIM_LOWER, 0x00000001
.set CYVAL_USBDEVv2_USB_TRIM_TRIM_HIGHER, 0x00000002
.set CYVAL_USBDEVv2_USB_TRIM_TRIM_DONT_USE, 0x00000003
.set CYFLD_USBDEVv2_USB_MDEC__OFFSET, 0x00000002
.set CYFLD_USBDEVv2_USB_MDEC__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_MINC__OFFSET, 0x00000003
.set CYFLD_USBDEVv2_USB_MINC__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_X_INC__OFFSET, 0x00000004
.set CYFLD_USBDEVv2_USB_X_INC__SIZE, 0x00000001
.set CYFLD_USBDEVv2_USB_X_DEC__OFFSET, 0x00000005
.set CYFLD_USBDEVv2_USB_X_DEC__SIZE, 0x00000001
.set CYDEV_CPUSS_BASE, 0x40100000
.set CYDEV_CPUSS_SIZE, 0x00001000
.set CYREG_CPUSS_CONFIG, 0x40100000
.set CYFLD_CPUSS_VECT_IN_RAM__OFFSET, 0x00000000
.set CYFLD_CPUSS_VECT_IN_RAM__SIZE, 0x00000001
.set CYREG_CPUSS_SYSREQ, 0x40100004
.set CYFLD_CPUSS_SYSCALL_COMMAND__OFFSET, 0x00000000
.set CYFLD_CPUSS_SYSCALL_COMMAND__SIZE, 0x00000010
.set CYFLD_CPUSS_DIS_RESET_VECT_REL__OFFSET, 0x0000001b
.set CYFLD_CPUSS_DIS_RESET_VECT_REL__SIZE, 0x00000001
.set CYFLD_CPUSS_PRIVILEGED__OFFSET, 0x0000001c
.set CYFLD_CPUSS_PRIVILEGED__SIZE, 0x00000001
.set CYFLD_CPUSS_ROM_ACCESS_EN__OFFSET, 0x0000001d
.set CYFLD_CPUSS_ROM_ACCESS_EN__SIZE, 0x00000001
.set CYFLD_CPUSS_HMASTER_0__OFFSET, 0x0000001e
.set CYFLD_CPUSS_HMASTER_0__SIZE, 0x00000001
.set CYFLD_CPUSS_SYSCALL_REQ__OFFSET, 0x0000001f
.set CYFLD_CPUSS_SYSCALL_REQ__SIZE, 0x00000001
.set CYREG_CPUSS_SYSARG, 0x40100008
.set CYFLD_CPUSS_SYSCALL_ARG__OFFSET, 0x00000000
.set CYFLD_CPUSS_SYSCALL_ARG__SIZE, 0x00000020
.set CYREG_CPUSS_PROTECTION, 0x4010000c
.set CYFLD_CPUSS_PROTECTION_MODE__OFFSET, 0x00000000
.set CYFLD_CPUSS_PROTECTION_MODE__SIZE, 0x00000004
.set CYFLD_CPUSS_FLASH_LOCK__OFFSET, 0x0000001e
.set CYFLD_CPUSS_FLASH_LOCK__SIZE, 0x00000001
.set CYFLD_CPUSS_PROTECTION_LOCK__OFFSET, 0x0000001f
.set CYFLD_CPUSS_PROTECTION_LOCK__SIZE, 0x00000001
.set CYREG_CPUSS_PRIV_ROM, 0x40100010
.set CYFLD_CPUSS_BROM_PROT_LIMIT__OFFSET, 0x00000000
.set CYFLD_CPUSS_BROM_PROT_LIMIT__SIZE, 0x00000008
.set CYREG_CPUSS_PRIV_RAM, 0x40100014
.set CYFLD_CPUSS_RAM_PROT_LIMIT__OFFSET, 0x00000000
.set CYFLD_CPUSS_RAM_PROT_LIMIT__SIZE, 0x00000009
.set CYREG_CPUSS_PRIV_FLASH, 0x40100018
.set CYFLD_CPUSS_FLASH_PROT_LIMIT__OFFSET, 0x00000000
.set CYFLD_CPUSS_FLASH_PROT_LIMIT__SIZE, 0x0000000c
.set CYREG_CPUSS_WOUNDING, 0x4010001c
.set CYFLD_CPUSS_RAM_WOUND__OFFSET, 0x00000010
.set CYFLD_CPUSS_RAM_WOUND__SIZE, 0x00000003
.set CYFLD_CPUSS_FLASH_WOUND__OFFSET, 0x00000014
.set CYFLD_CPUSS_FLASH_WOUND__SIZE, 0x00000003
.set CYREG_CPUSS_FLASH_CTL, 0x40100030
.set CYFLD_CPUSS_FLASH_WS__OFFSET, 0x00000000
.set CYFLD_CPUSS_FLASH_WS__SIZE, 0x00000002
.set CYFLD_CPUSS_PREF_EN__OFFSET, 0x00000004
.set CYFLD_CPUSS_PREF_EN__SIZE, 0x00000001
.set CYFLD_CPUSS_FLASH_INVALIDATE__OFFSET, 0x00000008
.set CYFLD_CPUSS_FLASH_INVALIDATE__SIZE, 0x00000001
.set CYREG_CPUSS_ROM_CTL, 0x40100034
.set CYFLD_CPUSS_ROM_WS__OFFSET, 0x00000000
.set CYFLD_CPUSS_ROM_WS__SIZE, 0x00000001
.set CYDEV_SPCIF_BASE, 0x40110000
.set CYDEV_SPCIF_SIZE, 0x00010000
.set CYREG_SPCIF_GEOMETRY, 0x40110000
.set CYFLD_SPCIF_FLASH__OFFSET, 0x00000000
.set CYFLD_SPCIF_FLASH__SIZE, 0x0000000e
.set CYFLD_SPCIF_SFLASH__OFFSET, 0x0000000e
.set CYFLD_SPCIF_SFLASH__SIZE, 0x00000006
.set CYFLD_SPCIF_NUM_FLASH__OFFSET, 0x00000014
.set CYFLD_SPCIF_NUM_FLASH__SIZE, 0x00000002
.set CYFLD_SPCIF_FLASH_ROW__OFFSET, 0x00000016
.set CYFLD_SPCIF_FLASH_ROW__SIZE, 0x00000002
.set CYFLD_SPCIF_DE_CPD_LP__OFFSET, 0x0000001f
.set CYFLD_SPCIF_DE_CPD_LP__SIZE, 0x00000001
.set CYREG_SPCIF_INTR, 0x401107f0
.set CYFLD_SPCIF_TIMER__OFFSET, 0x00000000
.set CYFLD_SPCIF_TIMER__SIZE, 0x00000001
.set CYREG_SPCIF_INTR_SET, 0x401107f4
.set CYREG_SPCIF_INTR_MASK, 0x401107f8
.set CYREG_SPCIF_INTR_MASKED, 0x401107fc
.set CYDEV_CM0_BASE, 0xe0000000
.set CYDEV_CM0_SIZE, 0x00100000
.set CYREG_CM0_DWT_PID4, 0xe0001fd0
.set CYFLD_CM0_VALUE__OFFSET, 0x00000000
.set CYFLD_CM0_VALUE__SIZE, 0x00000020
.set CYREG_CM0_DWT_PID0, 0xe0001fe0
.set CYREG_CM0_DWT_PID1, 0xe0001fe4
.set CYREG_CM0_DWT_PID2, 0xe0001fe8
.set CYREG_CM0_DWT_PID3, 0xe0001fec
.set CYREG_CM0_DWT_CID0, 0xe0001ff0
.set CYREG_CM0_DWT_CID1, 0xe0001ff4
.set CYREG_CM0_DWT_CID2, 0xe0001ff8
.set CYREG_CM0_DWT_CID3, 0xe0001ffc
.set CYREG_CM0_BP_PID4, 0xe0002fd0
.set CYREG_CM0_BP_PID0, 0xe0002fe0
.set CYREG_CM0_BP_PID1, 0xe0002fe4
.set CYREG_CM0_BP_PID2, 0xe0002fe8
.set CYREG_CM0_BP_PID3, 0xe0002fec
.set CYREG_CM0_BP_CID0, 0xe0002ff0
.set CYREG_CM0_BP_CID1, 0xe0002ff4
.set CYREG_CM0_BP_CID2, 0xe0002ff8
.set CYREG_CM0_BP_CID3, 0xe0002ffc
.set CYREG_CM0_SYST_CSR, 0xe000e010
.set CYFLD_CM0_ENABLE__OFFSET, 0x00000000
.set CYFLD_CM0_ENABLE__SIZE, 0x00000001
.set CYFLD_CM0_TICKINT__OFFSET, 0x00000001
.set CYFLD_CM0_TICKINT__SIZE, 0x00000001
.set CYFLD_CM0_CLKSOURCE__OFFSET, 0x00000002
.set CYFLD_CM0_CLKSOURCE__SIZE, 0x00000001
.set CYFLD_CM0_COUNTFLAG__OFFSET, 0x00000010
.set CYFLD_CM0_COUNTFLAG__SIZE, 0x00000001
.set CYREG_CM0_SYST_RVR, 0xe000e014
.set CYFLD_CM0_RELOAD__OFFSET, 0x00000000
.set CYFLD_CM0_RELOAD__SIZE, 0x00000018
.set CYREG_CM0_SYST_CVR, 0xe000e018
.set CYFLD_CM0_CURRENT__OFFSET, 0x00000000
.set CYFLD_CM0_CURRENT__SIZE, 0x00000018
.set CYREG_CM0_SYST_CALIB, 0xe000e01c
.set CYFLD_CM0_TENMS__OFFSET, 0x00000000
.set CYFLD_CM0_TENMS__SIZE, 0x00000018
.set CYFLD_CM0_SKEW__OFFSET, 0x0000001e
.set CYFLD_CM0_SKEW__SIZE, 0x00000001
.set CYFLD_CM0_NOREF__OFFSET, 0x0000001f
.set CYFLD_CM0_NOREF__SIZE, 0x00000001
.set CYREG_CM0_ISER, 0xe000e100
.set CYFLD_CM0_SETENA__OFFSET, 0x00000000
.set CYFLD_CM0_SETENA__SIZE, 0x00000020
.set CYREG_CM0_ICER, 0xe000e180
.set CYFLD_CM0_CLRENA__OFFSET, 0x00000000
.set CYFLD_CM0_CLRENA__SIZE, 0x00000020
.set CYREG_CM0_ISPR, 0xe000e200
.set CYFLD_CM0_SETPEND__OFFSET, 0x00000000
.set CYFLD_CM0_SETPEND__SIZE, 0x00000020
.set CYREG_CM0_ICPR, 0xe000e280
.set CYFLD_CM0_CLRPEND__OFFSET, 0x00000000
.set CYFLD_CM0_CLRPEND__SIZE, 0x00000020
.set CYREG_CM0_IPR0, 0xe000e400
.set CYFLD_CM0_PRI_N0__OFFSET, 0x00000006
.set CYFLD_CM0_PRI_N0__SIZE, 0x00000002
.set CYFLD_CM0_PRI_N1__OFFSET, 0x0000000e
.set CYFLD_CM0_PRI_N1__SIZE, 0x00000002
.set CYFLD_CM0_PRI_N2__OFFSET, 0x00000016
.set CYFLD_CM0_PRI_N2__SIZE, 0x00000002
.set CYFLD_CM0_PRI_N3__OFFSET, 0x0000001e
.set CYFLD_CM0_PRI_N3__SIZE, 0x00000002
.set CYREG_CM0_IPR1, 0xe000e404
.set CYREG_CM0_IPR2, 0xe000e408
.set CYREG_CM0_IPR3, 0xe000e40c
.set CYREG_CM0_IPR4, 0xe000e410
.set CYREG_CM0_IPR5, 0xe000e414
.set CYREG_CM0_IPR6, 0xe000e418
.set CYREG_CM0_IPR7, 0xe000e41c
.set CYREG_CM0_CPUID, 0xe000ed00
.set CYFLD_CM0_REVISION__OFFSET, 0x00000000
.set CYFLD_CM0_REVISION__SIZE, 0x00000004
.set CYFLD_CM0_PARTNO__OFFSET, 0x00000004
.set CYFLD_CM0_PARTNO__SIZE, 0x0000000c
.set CYFLD_CM0_CONSTANT__OFFSET, 0x00000010
.set CYFLD_CM0_CONSTANT__SIZE, 0x00000004
.set CYFLD_CM0_VARIANT__OFFSET, 0x00000014
.set CYFLD_CM0_VARIANT__SIZE, 0x00000004
.set CYFLD_CM0_IMPLEMENTER__OFFSET, 0x00000018
.set CYFLD_CM0_IMPLEMENTER__SIZE, 0x00000008
.set CYREG_CM0_ICSR, 0xe000ed04
.set CYFLD_CM0_VECTACTIVE__OFFSET, 0x00000000
.set CYFLD_CM0_VECTACTIVE__SIZE, 0x00000009
.set CYFLD_CM0_VECTPENDING__OFFSET, 0x0000000c
.set CYFLD_CM0_VECTPENDING__SIZE, 0x00000009
.set CYFLD_CM0_ISRPENDING__OFFSET, 0x00000016
.set CYFLD_CM0_ISRPENDING__SIZE, 0x00000001
.set CYFLD_CM0_ISRPREEMPT__OFFSET, 0x00000017
.set CYFLD_CM0_ISRPREEMPT__SIZE, 0x00000001
.set CYFLD_CM0_PENDSTCLR__OFFSET, 0x00000019
.set CYFLD_CM0_PENDSTCLR__SIZE, 0x00000001
.set CYFLD_CM0_PENDSTSETb__OFFSET, 0x0000001a
.set CYFLD_CM0_PENDSTSETb__SIZE, 0x00000001
.set CYFLD_CM0_PENDSVCLR__OFFSET, 0x0000001b
.set CYFLD_CM0_PENDSVCLR__SIZE, 0x00000001
.set CYFLD_CM0_PENDSVSET__OFFSET, 0x0000001c
.set CYFLD_CM0_PENDSVSET__SIZE, 0x00000001
.set CYFLD_CM0_NMIPENDSET__OFFSET, 0x0000001f
.set CYFLD_CM0_NMIPENDSET__SIZE, 0x00000001
.set CYREG_CM0_AIRCR, 0xe000ed0c
.set CYFLD_CM0_VECTCLRACTIVE__OFFSET, 0x00000001
.set CYFLD_CM0_VECTCLRACTIVE__SIZE, 0x00000001
.set CYFLD_CM0_SYSRESETREQ__OFFSET, 0x00000002
.set CYFLD_CM0_SYSRESETREQ__SIZE, 0x00000001
.set CYFLD_CM0_ENDIANNESS__OFFSET, 0x0000000f
.set CYFLD_CM0_ENDIANNESS__SIZE, 0x00000001
.set CYFLD_CM0_VECTKEY__OFFSET, 0x00000010
.set CYFLD_CM0_VECTKEY__SIZE, 0x00000010
.set CYREG_CM0_SCR, 0xe000ed10
.set CYFLD_CM0_SLEEPONEXIT__OFFSET, 0x00000001
.set CYFLD_CM0_SLEEPONEXIT__SIZE, 0x00000001
.set CYFLD_CM0_SLEEPDEEP__OFFSET, 0x00000002
.set CYFLD_CM0_SLEEPDEEP__SIZE, 0x00000001
.set CYFLD_CM0_SEVONPEND__OFFSET, 0x00000004
.set CYFLD_CM0_SEVONPEND__SIZE, 0x00000001
.set CYREG_CM0_CCR, 0xe000ed14
.set CYFLD_CM0_UNALIGN_TRP__OFFSET, 0x00000003
.set CYFLD_CM0_UNALIGN_TRP__SIZE, 0x00000001
.set CYFLD_CM0_STKALIGN__OFFSET, 0x00000009
.set CYFLD_CM0_STKALIGN__SIZE, 0x00000001
.set CYREG_CM0_SHPR2, 0xe000ed1c
.set CYFLD_CM0_PRI_11__OFFSET, 0x0000001e
.set CYFLD_CM0_PRI_11__SIZE, 0x00000002
.set CYREG_CM0_SHPR3, 0xe000ed20
.set CYFLD_CM0_PRI_14__OFFSET, 0x00000016
.set CYFLD_CM0_PRI_14__SIZE, 0x00000002
.set CYFLD_CM0_PRI_15__OFFSET, 0x0000001e
.set CYFLD_CM0_PRI_15__SIZE, 0x00000002
.set CYREG_CM0_SHCSR, 0xe000ed24
.set CYFLD_CM0_SVCALLPENDED__OFFSET, 0x0000000f
.set CYFLD_CM0_SVCALLPENDED__SIZE, 0x00000001
.set CYREG_CM0_SCS_PID4, 0xe000efd0
.set CYREG_CM0_SCS_PID0, 0xe000efe0
.set CYREG_CM0_SCS_PID1, 0xe000efe4
.set CYREG_CM0_SCS_PID2, 0xe000efe8
.set CYREG_CM0_SCS_PID3, 0xe000efec
.set CYREG_CM0_SCS_CID0, 0xe000eff0
.set CYREG_CM0_SCS_CID1, 0xe000eff4
.set CYREG_CM0_SCS_CID2, 0xe000eff8
.set CYREG_CM0_SCS_CID3, 0xe000effc
.set CYREG_CM0_ROM_SCS, 0xe00ff000
.set CYREG_CM0_ROM_DWT, 0xe00ff004
.set CYREG_CM0_ROM_BPU, 0xe00ff008
.set CYREG_CM0_ROM_END, 0xe00ff00c
.set CYREG_CM0_ROM_CSMT, 0xe00fffcc
.set CYREG_CM0_ROM_PID4, 0xe00fffd0
.set CYREG_CM0_ROM_PID0, 0xe00fffe0
.set CYREG_CM0_ROM_PID1, 0xe00fffe4
.set CYREG_CM0_ROM_PID2, 0xe00fffe8
.set CYREG_CM0_ROM_PID3, 0xe00fffec
.set CYREG_CM0_ROM_CID0, 0xe00ffff0
.set CYREG_CM0_ROM_CID1, 0xe00ffff4
.set CYREG_CM0_ROM_CID2, 0xe00ffff8
.set CYREG_CM0_ROM_CID3, 0xe00ffffc
.set CYDEV_ROMTABLE_BASE, 0xf0000000
.set CYDEV_ROMTABLE_SIZE, 0x00001000
.set CYREG_ROMTABLE_ADDR, 0xf0000000
.set CYFLD_ROMTABLE_PRESENT__OFFSET, 0x00000000
.set CYFLD_ROMTABLE_PRESENT__SIZE, 0x00000001
.set CYFLD_ROMTABLE_FORMAT_32BIT__OFFSET, 0x00000001
.set CYFLD_ROMTABLE_FORMAT_32BIT__SIZE, 0x00000001
.set CYFLD_ROMTABLE_ADDR_OFFSET__OFFSET, 0x0000000c
.set CYFLD_ROMTABLE_ADDR_OFFSET__SIZE, 0x00000014
.set CYREG_ROMTABLE_DID, 0xf0000fcc
.set CYFLD_ROMTABLE_VALUE__OFFSET, 0x00000000
.set CYFLD_ROMTABLE_VALUE__SIZE, 0x00000020
.set CYREG_ROMTABLE_PID4, 0xf0000fd0
.set CYFLD_ROMTABLE_JEP_CONTINUATION__OFFSET, 0x00000000
.set CYFLD_ROMTABLE_JEP_CONTINUATION__SIZE, 0x00000004
.set CYFLD_ROMTABLE_COUNT__OFFSET, 0x00000004
.set CYFLD_ROMTABLE_COUNT__SIZE, 0x00000004
.set CYREG_ROMTABLE_PID5, 0xf0000fd4
.set CYREG_ROMTABLE_PID6, 0xf0000fd8
.set CYREG_ROMTABLE_PID7, 0xf0000fdc
.set CYREG_ROMTABLE_PID0, 0xf0000fe0
.set CYFLD_ROMTABLE_PN_MIN__OFFSET, 0x00000000
.set CYFLD_ROMTABLE_PN_MIN__SIZE, 0x00000008
.set CYREG_ROMTABLE_PID1, 0xf0000fe4
.set CYFLD_ROMTABLE_PN_MAJ__OFFSET, 0x00000000
.set CYFLD_ROMTABLE_PN_MAJ__SIZE, 0x00000004
.set CYFLD_ROMTABLE_JEPID_MIN__OFFSET, 0x00000004
.set CYFLD_ROMTABLE_JEPID_MIN__SIZE, 0x00000004
.set CYREG_ROMTABLE_PID2, 0xf0000fe8
.set CYFLD_ROMTABLE_JEPID_MAJ__OFFSET, 0x00000000
.set CYFLD_ROMTABLE_JEPID_MAJ__SIZE, 0x00000003
.set CYFLD_ROMTABLE_REV__OFFSET, 0x00000004
.set CYFLD_ROMTABLE_REV__SIZE, 0x00000004
.set CYREG_ROMTABLE_PID3, 0xf0000fec
.set CYFLD_ROMTABLE_CM__OFFSET, 0x00000000
.set CYFLD_ROMTABLE_CM__SIZE, 0x00000004
.set CYFLD_ROMTABLE_REV_AND__OFFSET, 0x00000004
.set CYFLD_ROMTABLE_REV_AND__SIZE, 0x00000004
.set CYREG_ROMTABLE_CID0, 0xf0000ff0
.set CYREG_ROMTABLE_CID1, 0xf0000ff4
.set CYREG_ROMTABLE_CID2, 0xf0000ff8
.set CYREG_ROMTABLE_CID3, 0xf0000ffc
.set CYDEV_FLS_SECTOR_SIZE, 0x00020000
.set CYDEV_FLS_ROW_SIZE, 0x00000080
