| Linduino 1.3.0 Linear Technology Arduino-Compatible Demonstration Board

LTC2874.h
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1 /*!
2 LTC2874: Quad IO-Link Master Hot Swap Power Controller and PHY
3
4
5 @verbatim
6
7 The LTC2874 provides a rugged, 4-port IO-Link power and communications
8 interface to remote devices connected by cables up to 20m in length.
9
10 Output supply voltage and inrush current are ramped up in a controlled
11 manner using external N-channel MOSFETs, providing improved robustness
12 compared to fully integrated solutions.
13
14 Wake-up pulse generation, line noise suppression, connection sensing and
15 automatic restart after fault conditions are supported, along with
16 signaling at rates up to 4.8kb/s, 38.4kb/s, and 230.4kb/s.
17
18 Configuration and fault reporting are exchanged using a SPI-compatible
19 4-wire interface that operates at clock rates up to 20MHz.
20
21 SPI DATA FORMAT (MSB First):
22
23 Byte #1 Byte #2
24 C2 C1 C0 A3 A2 A1 A0 X D7 D6 D5 D4 D3 D2 D1 D0
25
26 Cx : Command (0-Read Reg, 1-Write (no update), 2-Update all Reg,
27 3-Write one Reg and Update, 7-Reset)
28 Ax : REG Address (0-Reg0, 1-Reg1, 2-Reg2, ..., E-RegE)
29 Dx : REG Data
30 X : Don't care
31
32 @endverbatim
33
34 http://www.linear.com/product/LTC2874
35
36 http://www.linear.com/product/LTC2874#demoboards
37
38
39 Copyright 2018(c) Analog Devices, Inc.
40
41 All rights reserved.
42
43 Redistribution and use in source and binary forms, with or without
44 modification, are permitted provided that the following conditions are met:
45 - Redistributions of source code must retain the above copyright
46 notice, this list of conditions and the following disclaimer.
47 - Redistributions in binary form must reproduce the above copyright
48 notice, this list of conditions and the following disclaimer in
49 the documentation and/or other materials provided with the
50 distribution.
51 - Neither the name of Analog Devices, Inc. nor the names of its
52 contributors may be used to endorse or promote products derived
53 from this software without specific prior written permission.
54 - The use of this software may or may not infringe the patent rights
55 of one or more patent holders. This license does not release you
56 from the requirement that you obtain separate licenses from these
57 patent holders to use this software.
58 - Use of the software either in source or binary form, must be run
59 on or directly connected to an Analog Devices Inc. component.
60
61 THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
62 IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
63 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
64 IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
65 INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
66 LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
67 SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
68 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
69 OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
70 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
71
72 IO-Link is a registered trademark of PROFIBUS User Organization (PNO).
73 */
74
75 /*! @file
76 @ingroup LTC2874
77 */
78
79 #ifndef LTC2874_H
80 #define LTC2874_H
81
82 // Define the CS pin
83 #ifndef LTC2874_CS
84 #define LTC2874_CS QUIKEVAL_CS
85 #endif
86
87 /*!
88 OR'd together with the register address to form the command byte
89 | LTC2874 Command String | Value |
90 | :------------------------| :---: |
91 | LTC2874_READ | 0x00 |
92 | LTC2874_WRITE_NO_UPDATE | 0x20 |
93 | LTC2874_UPDATE_ALL | 0x40 |
94 | LTC2874_WRITE_UPDATE_ALL | 0x60 |
95 | LTC2874_RESET | 0xE0 |
96 */
97 /*! @name Command Codes
98 @{ */
99
100 // Command Codes
101 #define LTC2874_READ 0x00 //! READ REGISTER
102 #define LTC2874_WRITE_NO_UPDATE 0x20 //! WRITE REGISTER (NO UPDATE)
103 #define LTC2874_UPDATE_ALL 0x40 //! UPDATE ALL REGISTERS
104 #define LTC2874_WRITE_UPDATE_ALL 0x60 //! WRITE ONE REGISTER AND UPDATE
105 #define LTC2874_RESET 0xE0 //! RESET
106 //! @}
107
108
109 /*!
110 | Register | Address |
111 | :--------------------| :-----: |
112 | LTC2874_IRQREG_REG0 | 0x00 |
113 | LTC2874_IRQMASK_REG1 | 0x01 |
114 | LTC2874_EVENT1_REG2 | 0x02 |
115 | LTC2874_EVENT2_REG3 | 0x03 |
116 | LTC2874_EVENT3_REG4 | 0x04 |
117 | LTC2874_EVENT4_REG5 | 0x05 |
118 | LTC2874_STATUS1_REG6 | 0x06 |
119 | LTC2874_STATUS2_REG7 | 0x07 |
120 | LTC2874_MODE1_REG8 | 0x08 |
121 | LTC2874_MODE2_REG9 | 0x09 |
122 | LTC2874_NSF_REGA | 0x0A |
123 | LTC2874_ILLM_REGB | 0x0B |
124 | LTC2874_TMRCTRL_REGC | 0x0C |
125 | LTC2874_CTRL1_REGD | 0x0D |
126 | LTC2874_CTRL2_REGE | 0x0E |
127 */
128 /*! @name Register Addresses
129 @{ */
130
131 // Register Addresses
132 #define LTC2874_IRQREG_REG0 0x00
133 #define LTC2874_IRQMASK_REG1 0x01
134 #define LTC2874_EVENT1_REG2 0x02
135 #define LTC2874_EVENT2_REG3 0x03
136 #define LTC2874_EVENT3_REG4 0x04
137 #define LTC2874_EVENT4_REG5 0x05
138 #define LTC2874_STATUS1_REG6 0x06
139 #define LTC2874_STATUS2_REG7 0x07
140 #define LTC2874_MODE1_REG8 0x08
141 #define LTC2874_MODE2_REG9 0x09
142 #define LTC2874_NSF_REGA 0x0A
143 #define LTC2874_ILLM_REGB 0x0B
144 #define LTC2874_TMRCTRL_REGC 0x0C
145 #define LTC2874_CTRL1_REGD 0x0D
146 #define LTC2874_CTRL2_REGE 0x0E
147 //! @}
148
149 /*! @name Register Bit and Mask Definitions
150 @{ */
151
152 // register bit definitions / masks
153 #define LTC2874_OT (0x1<<7) // REGISTER IRQREG
154 #define LTC2874_SUPPLY (0x1<<6) // REGISTER IRQREG
155 #define LTC2874_WU (0x1<<5) // REGISTER IRQREG
156 #define LTC2874_TOC_LP (0x1<<4) // REGISTER IRQREG
157 #define LTC2874_PWRCHNG (0x1<<3) // REGISTER IRQREG
158 #define LTC2874_TOC_CQ (0x1<<2) // REGISTER IRQREG
159 #define LTC2874_CSENSE (0x1<<1) // REGISTER IRQREG
160
161 #define LTC2874_OT_MASK (0x1<<7) // REGISTER IRQMASK
162 #define LTC2874_SUPPLY_MASK (0x1<<6) // REGISTER IRQMASK
163 #define LTC2874_WU_MASK (0x1<<5) // REGISTER IRQMASK
164 #define LTC2874_TOC_LP_MASK (0x1<<4) // REGISTER IRQMASK
165 #define LTC2874_PWRCHNG_MASK (0x1<<3) // REGISTER IRQMASK
166 #define LTC2874_TOC_CQ_MASK (0x1<<2) // REGISTER IRQMASK
167 #define LTC2874_CSENSE_MASK (0x1<<1) // REGISTER IRQMASK
168
169 #define LTC2874_OT_SD (0x1<<7) // REGISTER EVENT1
170 #define LTC2874_OT_WARN (0x1<<6) // REGISTER EVENT1
171 #define LTC2874_UVLO_VL (0x1<<4) // REGISTER EVENT1
172 #define LTC2874_UVLO_VDD (0x1<<3) // REGISTER EVENT1
173 #define LTC2874_UV_VDD (0x1<<2) // REGISTER EVENT1
174 #define LTC2874_OV_VDD (0x1<<1) // REGISTER EVENT1
175
176 #define LTC2874_WU4 (0x1<<7) // REGISTER EVENT2
177 #define LTC2874_WU3 (0x1<<6) // REGISTER EVENT2
178 #define LTC2874_WU2 (0x1<<5) // REGISTER EVENT2
179 #define LTC2874_WU1 (0x1<<4) // REGISTER EVENT2
180 #define LTC2874_TOC_LP4 (0x1<<3) // REGISTER EVENT2
181 #define LTC2874_TOC_LP3 (0x1<<2) // REGISTER EVENT2
182 #define LTC2874_TOC_LP2 (0x1<<1) // REGISTER EVENT2
183 #define LTC2874_TOC_LP1 0x1 // REGISTER EVENT2
184
185 #define LTC2874_PWRCHNG4 (0x1<<7) // REGISTER EVENT3
186 #define LTC2874_PWRCHNG3 (0x1<<6) // REGISTER EVENT3
187 #define LTC2874_PWRCHNG2 (0x1<<5) // REGISTER EVENT3
188 #define LTC2874_PWRCHNG1 (0x1<<4) // REGISTER EVENT3
189 #define LTC2874_TOC_CQ4 (0x1<<3) // REGISTER EVENT3
190 #define LTC2874_TOC_CQ3 (0x1<<2) // REGISTER EVENT3
191 #define LTC2874_TOC_CQ2 (0x1<<1) // REGISTER EVENT3
192 #define LTC2874_TOC_CQ1 0x1 // REGISTER EVENT3
193
194 #define LTC2874_CQ_SNS4 (0x1<<7) // REGISTER EVENT4
195 #define LTC2874_CQ_SNS3 (0x1<<6) // REGISTER EVENT4
196 #define LTC2874_CQ_SNS2 (0x1<<5) // REGISTER EVENT4
197 #define LTC2874_CQ_SNS1 (0x1<<4) // REGISTER EVENT4
198 #define LTC2874_CSENSE4 (0x1<<3) // REGISTER EVENT4
199 #define LTC2874_CSENSE3 (0x1<<2) // REGISTER EVENT4
200 #define LTC2874_CSENSE2 (0x1<<1) // REGISTER EVENT4
201 #define LTC2874_CSENSE1 0x1 // REGISTER EVENT4
202
203 #define LTC2874_OT_STAT (0x1<<7) // REGISTER STATUS1
204 #define LTC2874_WU_COOL_STAT (0x1<<6) // REGISTER STATUS1
205 #define LTC2874_UVLO_VDD_STAT (0x1<<5) // REGISTER STATUS1
206 #define LTC2874_OV_VDD_STAT (0x1<<4) // REGISTER STATUS1
207 #define LTC2874_OC_LP4_STAT (0x1<<3) // REGISTER STATUS1
208 #define LTC2874_OC_LP3_STAT (0x1<<2) // REGISTER STATUS1
209 #define LTC2874_OC_LP2_STAT (0x1<<1) // REGISTER STATUS1
210 #define LTC2874_OC_LP1_STAT 0x1 // REGISTER STATUS1
211
212 #define LTC2874_PWRGD4 (0x1<<7) // REGISTER STATUS2
213 #define LTC2874_PWRGD3 (0x1<<6) // REGISTER STATUS2
214 #define LTC2874_PWRGD2 (0x1<<5) // REGISTER STATUS2
215 #define LTC2874_PWRGD1 (0x1<<4) // REGISTER STATUS2
216 #define LTC2874_OC_CQ4 (0x1<<3) // REGISTER STATUS2
217 #define LTC2874_OC_CQ3 (0x1<<2) // REGISTER STATUS2
218 #define LTC2874_OC_CQ2 (0x1<<1) // REGISTER STATUS2
219 #define LTC2874_OC_OQ1 0x1 // REGISTER STATUS2
220
221 #define LTC2874_24VMODE (0x1<<7) // REGISTER MODE1
222 #define LTC2874_CSENSE_MODE (0x1<<6) // REGISTER MODE1
223 // multibit definition
224 #define LTC2874_2XPTC_pos 4 // REGISTER MODE1
225 #define LTC2874_2XPTC_msk (0x3<<4) // REGISTER MODE1
226 #define LTC2874_2XPTC(value) (LTC2874_2XPTC_msk & ((value) << LTC2874_2XPTC_pos))
227
228 #define LTC2874_FLDBK_MODE (0x1<<3) // REGISTER MODE1
229 #define LTC2874_RETRY_OV (0x1<<2) // REGISTER MODE1
230 #define LTC2874_RETRY_LP (0x1<<1) // REGISTER MODE1
231 #define LTC2874_RETRY_CQ 0x1 // REGISTER MODE1
232
233 #define LTC2874_SLEW4 (0x1<<7) // REGISTER MODE2
234 #define LTC2874_SLEW3 (0x1<<6) // REGISTER MODE2
235 #define LTC2874_SLEW2 (0x1<<5) // REGISTER MODE2
236 #define LTC2874_SLEW1 (0x1<<4) // REGISTER MODE2
237 // multibit definition
238 #define LTC2874_OV_TH_pos 2 // REGISTER MODE2
239 #define LTC2874_OV_TH_msk (0x3<<2) // REGISTER MODE2
240 #define LTC2874_OV_TH(value) (LTC2874_OV_TH_msk & ((value) << LTC2874_OV_TH_pos))
241
242 #define LTC2874_OV_ALLOW (0x1<<1) // REGISTER MODE2
243 #define LTC2874_CQ_SNS_MODE 0x1 // REGISTER MODE2
244
245 // multibit definitions
246 #define LTC2874_NSF4_pos 6 // REGISTER NSF
247 #define LTC2874_NSF4_msk (0x3<<6) // REGISTER NSF
248 #define LTC2874_NSF4(value) (LTC2874_NSF4_msk & ((value) << LTC2874_NSF4_pos))
249 #define LTC2874_NSF3_pos 4 // REGISTER NSF
250 #define LTC2874_NSF3_msk (0x3<<4) // REGISTER NSF
251 #define LTC2874_NSF3(value) LTC2874_NSF3_msk & ((value) << LTC2874_NSF3_pos))
252 #define LTC2874_NSF2_pos 2 // REGISTER NSF
253 #define LTC2874_NSF2_msk (0x3<<2) // REGISTER NSF
254 #define LTC2874_NSF2(value) (LTC2874_NSF2_msk & ((value) << LTC2874_NSF2_pos))
255 #define LTC2874_NSF1_pos 0 // REGISTER NSF
256 #define LTC2874_NSF1_msk 0x3 // REGISTER NSF
257 #define LTC2874_NSF1(value) (LTC2874_NSF1_msk & ((value) << LTC2874_NSF1_pos))
258
259 #define LTC2874_ILLM4_pos 6 // REGISTER ILLM
260 #define LTC2874_ILLM4_msk (0x3<<6) // REGISTER ILLM
261 #define LTC2874_ILLM4(value) (LTC2874_ILLM4_msk & ((value) << LTC2874_ILLM4_pos))
262 #define LTC2874_ILLM3_pos 4 // REGISTER ILLM
263 #define LTC2874_ILLM3_msk (0x3<<4) // REGISTER ILLM
264 #define LTC2874_ILLM3(value) (LTC2874_ILLM3_msk & ((value) << LTC2874_ILLM3_pos))
265 #define LTC2874_ILLM2_pos 2 // REGISTER ILLM
266 #define LTC2874_ILLM2_msk (0x3<<2) // REGISTER ILLM
267 #define LTC2874_ILLM2(value) (LTC2874_ILLM2_msk & ((value) << LTC2874_ILLM2_pos))
268 #define LTC2874_ILLM1_pos 0 // REGISTER ILLM
269 #define LTC2874_ILLM1_msk 0x3 // REGISTER ILLM
270 #define LTC2874_ILLM1(value) (LTC2874_ILLM1_msk & ((value) << LTC2874_ILLM1_pos))
271
272 #define LTC2874_LPTC_pos 4 // REGISTER TMRCTRL
273 #define LTC2874_LPTC_msk (0xF<<4) // REGISTER TMRCTRL
274 #define LTC2874_LPTC(value) (LTC2874_LPTC_msk & ((value) << LTC2874_LPTC_pos))
275
276 #define LTC2874_RETRYTC_pos 0 // REGISTER TMRCTRL
277 #define LTC2874_RETRYTC_msk 0x07 // REGISTER TMRCTRL
278 #define LTC2874_RETRYTC(value) (LTC2874_RETRYTC_msk & (value))
279
280 #define LTC2874_WKUP4 (0x1<<7) // REGISTER CTRL1
281 #define LTC2874_WKUP3 (0x1<<6) // REGISTER CTRL1
282 #define LTC2874_WKUP2 (0x1<<5) // REGISTER CTRL1
283 #define LTC2874_WKUP1 (0x1<<4) // REGISTER CTRL1
284 #define LTC2874_DRVEN4 (0x1<<3) // REGISTER CTRL1
285 #define LTC2874_DRVEN3 (0x1<<2) // REGISTER CTRL1
286 #define LTC2874_DRVEN2 (0x1<<1) // REGISTER CTRL1
287 #define LTC2874_DRVEN1 0x1 // REGISTER CTRL1
288
289 #define LTC2874_ENLP4 (0x1<<7) // REGISTER CTRL2
290 #define LTC2874_ENLP3 (0x1<<6) // REGISTER CTRL2
291 #define LTC2874_ENLP2 (0x1<<5) // REGISTER CTRL2
292 #define LTC2874_ENLP1 (0x1<<4) // REGISTER CTRL2
293 #define LTC2874_SIO_MODE4 (0x1<<3) // REGISTER CTRL2
294 #define LTC2874_SIO_MODE3 (0x1<<2) // REGISTER CTRL2
295 #define LTC2874_SIO_MODE2 (0x1<<1) // REGISTER CTRL2
296 #define LTC2874_SIO_MODE1 0x1 // REGISTER CTRL2
297
298 #define LTC2874_CQ1 0x01
299 #define LTC2874_CQ2 0x02
300 #define LTC2874_CQ3 0x04
301 #define LTC2874_CQ4 0x08
302 #define LTC2874_CQ_ALL 0x0F
303
304 #define LTC2874_LP1 0x10
305 #define LTC2874_LP2 0x20
306 #define LTC2874_LP3 0x40
307 #define LTC2874_LP4 0x80
308 #define LTC2874_LP_ALL 0xF0
309
310 //! @}
311
312 //************************************************************************************
313 //! Enables or Disables CQ output for specified port, then Updates.
314 //! @return void
315 //************************************************************************************
316 void LTC2874_cq_output(uint8_t port, //!< Port number (1-4 or 5=ALL)
317 uint8_t value //!< Enable (=1) or Disable (=0)
318 );
319
320 //************************************************************************************
321 //! Enables or Disables L+ output for specified port, then Updates.
322 //! @return void
323 //************************************************************************************
324 void LTC2874_lplus_output(uint8_t port, //!< Port number (1-4 or 5=ALL)
325 uint8_t value //!< Enable (=1) or Disable (=0)
326 );
327
328 //************************************************************************************
329 //! Sets SIO_MODE bit (and also Clears SLEW bit) for specified port, then Updates.
330 //! @return void
331 //************************************************************************************
332 void LTC2874_sio_mode(uint8_t port //!< Port number (1-4 or 5=ALL)
333 );
334
335 //************************************************************************************
336 //! Changes value of the 24VMODE bit, then Updates.
337 //! @return void
338 //************************************************************************************
339 void LTC2874_24v_mode(uint8_t value //!< 24VMODE setting (0 or 1)
340 );
341
342 //************************************************************************************
343 //! Changes NSF (Noise Suppression Filter) setting for specified port
344 //! without Updating.
345 //! value definitions: 0x0=disabled, 0x1=20.3us, 0x2=2.8us, 0x3=0.6us (default)
346 //! @return void
347 //************************************************************************************
348 void LTC2874_write_NSF_value(uint8_t port, //!< Port number (1-4)
349 uint8_t value //!< NSF setting (0x0-0x3)
350 );
351
352 //************************************************************************************
353 //! Changes ILLM (Sinking current) setting for specified port without Updating.
354 //! value definitions: 0x0=500kohm, 0x1=2.5mA, 0x2=3.7mA, 0x3=6.2mA (default)
355 //! @return void
356 //************************************************************************************
357 void LTC2874_write_ILLM_value(uint8_t port, //!< Port number (1-4 or 5=ALL)
358 uint8_t value //!< ILLM setting (0x0-0x3)
359 );
360
361 //************************************************************************************
362 //! Change L+ Overcurrent Timer Control (LPTC) setting without Updating.
363 //! value definitions: 0x0=17us, 0x1=30us, 0x2=60us, 0x3=120us, 0x4=0.25ms, 0x5=0.5ms,
364 //! 0x6=1ms, 0x7=2ms, 0x8=3.9ms, 0x9=7.8ms, 0xA=16ms, 0xB=30ms,
365 //! 0xC=0.60ms, 0xD=0.13s, 0xE=0.25s, 0xF=0.25s
366 //! @return void
367 //************************************************************************************
368 void LTC2874_write_LPTC_value(uint8_t value //!< LPTC setting (0x0-0xF)
369 );
370
371 //************************************************************************************
372 //! Changes Auto-Retry Timer Control (RETRYTC) setting without Updating.
373 //! value definitions: 0x0=0.12s, 0x1=0.24s, 0x2=0.49s, 0x3=0.98s, 0x4=2.0s,
374 //! 0x5=3.9s, 0x6=7.9s, 0x7=15.7s
375 //! @return void
376 //************************************************************************************
377 void LTC2874_write_RETRYTC_value(uint8_t value //!< RETRYTC setting (0x0-0x7)
378 );
379
380 //************************************************************************************
381 //! Changes 2X Current Pulse Timer Control (2XPTC) setting without Updating.
382 //! value definitions: 0x0=60ms (default), 0x1=disabled, 0x2=30ms, 0x3=120ms
383 //! @return void
384 //************************************************************************************
385 void LTC2874_write_2XPTC_value(uint8_t value //!< 2XPTC setting (0x0-0x3)
386 );
387
388 //************************************************************************************
389 //! Changes VDD Overvoltage Threshold (OV_TH) setting without Updating.
390 //! value definitions: 0x0=18V, 0x1=32V (default), 0x2=34V, 0x3=36V
391 //! @return void
392 //************************************************************************************
393 void LTC2874_write_OV_TH_value(uint8_t value //!< OV_TH setting (0x0-0x3)
394 );
395
396 //************************************************************************************
397 //! Sends WURQ (Wake-up Request) on specified port.
398 //! @return void
399 //************************************************************************************
400 void LTC2874_wakeup_request(uint8_t port //!< Port number (1-4)
401 );
402
403 //************************************************************************************
404 //! Updates all registers.
405 //! @return void
406 //************************************************************************************
407 void LTC2874_update_all(void //!< void
408 );
409
410 //************************************************************************************
411 //! Writes byte of data to a register, then Updates.
412 //! @return void
413 //************************************************************************************
414 void LTC2874_write_register_update_all(uint8_t LTC2874_register, //!< Register address (0x0-0xE)
415 uint8_t value //!< Data to be written into register
416 );
417
418 //************************************************************************************
419 //! Changes value of a register bit, then Updates.
420 //! @return void
421 //************************************************************************************
422 void LTC2874_write_bit_value_update_all(uint8_t LTC2874_register, //!< Register address (0x0-0xE)
423 uint8_t LTC2874_bit, //!< Mask of bit to be written (e.g. 0x40)
424 uint8_t value //!< Bit value to be written (0 or 1)
425 );
426
427 //************************************************************************************
428 //! Sets a register bit, then Updates.
429 //! @return void
430 //************************************************************************************
431 void LTC2874_write_bit_set_update_all(uint8_t LTC2874_register, //!< Register address (0x0-0xE)
432 uint8_t LTC2874_bit //!< Mask of bit to be set (e.g. 0x40)
433 );
434
435 //************************************************************************************
436 //! Clears a register bit, then Updates.
437 //! @return void
438 //************************************************************************************
439 void LTC2874_write_bit_clr_update_all(uint8_t LTC2874_register, //!< Register address (0x0-0xE)
440 uint8_t LTC2874_bit //!< Mask of bit to be cleared (e.g. 0x40)
441 );
442
443 //************************************************************************************
444 //! Resets LTC2874, returning default values to registers.
445 //! @return void
446 //************************************************************************************
447 void LTC2874_reset(void //!< void
448 );
449
450 //************************************************************************************
451 //! Reads data byte from specified register.
452 //! @return value of byte read
453 //************************************************************************************
454 uint8_t LTC2874_read_reg(uint8_t LTC2874_register //!< Register address (0x0-0xE)
455 );
456
457 //************************************************************************************
458 //! Reads a data BIT from specified register.
459 //! @return value of bit read
460 //************************************************************************************
461 uint8_t LTC2874_read_bit(uint8_t LTC2874_register, //!< Register address (0x0-0xE)
462 uint8_t LTC2874_bit //!< Mask of bit to be read (e.g. 0x40)
463 );
464
465 //************************************************************************************
466 //! Writes byte of data to a register without Updating.
467 //! @return void
468 //************************************************************************************
469 void LTC2874_write_register(uint8_t LTC2874_register, //!< Register address (0x0-0xE)
470 uint8_t value //!< Data to be written into register
471 );
472
473 //************************************************************************************
474 //! Sets a register bit without Updating.
475 //! @return void
476 //************************************************************************************
477 void LTC2874_write_bit_set(uint8_t LTC2874_register, //!< Register address (0x0-0xE)
478 uint8_t LTC2874_bit //!< Mask of bit to be set (e.g. 0x40)
479 );
480
481 //************************************************************************************
482 //! Clears a register bit without Updating.
483 //! @return void
484 //************************************************************************************
485 void LTC2874_write_bit_clr(uint8_t LTC2874_register, //!< Register address (0x0-0xE)
486 uint8_t LTC2874_bit //!< Mask of bit to be set (e.g. 0x40)
487 );
488
489 //************************************************************************************
490 //! Changes value of a register bit without Updating.
491 //! @return void
492 //************************************************************************************
493 void LTC2874_write_bit_value(uint8_t LTC2874_register, //!< Register address (0x0-0xE)
494 uint8_t LTC2874_bit, //!< Mask of bit to be written (e.g. 0x40)
495 uint8_t value //!< Bit value to be written (0 or 1)
496 );
497
498 #endif // LTC2874_H
LTC2874_write_LPTC_value
void LTC2874_write_LPTC_value(uint8_t value)
Change L+ Overcurrent Timer Control (LPTC) setting without Updating.
Definition: LTC2874.cpp:321
LTC2874_sio_mode
void LTC2874_sio_mode(uint8_t port)
Sets SIO_MODE bit (and also Clears SLEW bit) for specified port, then Updates.
Definition: LTC2874.cpp:174
LTC2874_write_bit_value
void LTC2874_write_bit_value(uint8_t LTC2874_register, uint8_t LTC2874_bit, uint8_t value)
Changes value of a register bit without Updating.
Definition: LTC2874.cpp:711
LTC2874_update_all
void LTC2874_update_all(void)
Updates all registers.
Definition: LTC2874.cpp:461
LTC2874_write_NSF_value
void LTC2874_write_NSF_value(uint8_t port, uint8_t value)
Changes NSF (Noise Suppression Filter) setting for specified port without Updating.
Definition: LTC2874.cpp:253
LTC2874_write_bit_value_update_all
void LTC2874_write_bit_value_update_all(uint8_t LTC2874_register, uint8_t LTC2874_bit, uint8_t value)
Changes value of a register bit, then Updates.
Definition: LTC2874.cpp:497
LTC2874_write_bit_clr_update_all
void LTC2874_write_bit_clr_update_all(uint8_t LTC2874_register, uint8_t LTC2874_bit)
Clears a register bit, then Updates.
Definition: LTC2874.cpp:556
LTC2874_write_register_update_all
void LTC2874_write_register_update_all(uint8_t LTC2874_register, uint8_t value)
Writes byte of data to a register, then Updates.
Definition: LTC2874.cpp:478
LTC2874_write_register
void LTC2874_write_register(uint8_t LTC2874_register, uint8_t value)
Writes byte of data to a register without Updating.
Definition: LTC2874.cpp:641
LTC2874_write_bit_clr
void LTC2874_write_bit_clr(uint8_t LTC2874_register, uint8_t LTC2874_bit)
Clears a register bit without Updating.
Definition: LTC2874.cpp:683
LTC2874_write_bit_set_update_all
void LTC2874_write_bit_set_update_all(uint8_t LTC2874_register, uint8_t LTC2874_bit)
Sets a register bit, then Updates.
Definition: LTC2874.cpp:530
LTC2874_lplus_output
void LTC2874_lplus_output(uint8_t port, uint8_t value)
Enables or Disables L+ output for specified port, then Updates.
Definition: LTC2874.cpp:131
LTC2874_cq_output
void LTC2874_cq_output(uint8_t port, uint8_t value)
Enables or Disables CQ output for specified port, then Updates.
Definition: LTC2874.cpp:88
LTC2874_write_bit_set
void LTC2874_write_bit_set(uint8_t LTC2874_register, uint8_t LTC2874_bit)
Sets a register bit without Updating.
Definition: LTC2874.cpp:658
LTC2874_write_ILLM_value
void LTC2874_write_ILLM_value(uint8_t port, uint8_t value)
Changes ILLM (Sinking current) setting for specified port without Updating.
Definition: LTC2874.cpp:283
LTC2874_24v_mode
void LTC2874_24v_mode(uint8_t value)
Changes value of the 24VMODE bit, then Updates.
Definition: LTC2874.cpp:218
LTC2874_write_OV_TH_value
void LTC2874_write_OV_TH_value(uint8_t value)
Changes VDD Overvoltage Threshold (OV_TH) setting without Updating.
Definition: LTC2874.cpp:405
LTC2874_reset
void LTC2874_reset(void)
Resets LTC2874, returning default values to registers.
Definition: LTC2874.cpp:582
LTC2874_read_reg
uint8_t LTC2874_read_reg(uint8_t LTC2874_register)
Reads data byte from specified register.
Definition: LTC2874.cpp:598
LTC2874_write_RETRYTC_value
void LTC2874_write_RETRYTC_value(uint8_t value)
Changes Auto-Retry Timer Control (RETRYTC) setting without Updating.
Definition: LTC2874.cpp:349
LTC2874_read_bit
uint8_t LTC2874_read_bit(uint8_t LTC2874_register, uint8_t LTC2874_bit)
Reads a data BIT from specified register.
Definition: LTC2874.cpp:618
LTC2874_wakeup_request
void LTC2874_wakeup_request(uint8_t port)
Sends WURQ (Wake-up Request) on specified port.
Definition: LTC2874.cpp:433
LTC2874_write_2XPTC_value
void LTC2874_write_2XPTC_value(uint8_t value)
Changes 2X Current Pulse Timer Control (2XPTC) setting without Updating.
Definition: LTC2874.cpp:377