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LTC3676.h
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1 /*!
2 LTC3676: Power management solution for application processors
3
4 @verbatim
5
6 The LTC3676 is a complete power management solution for advanced portable
7 application processor-based systems. The device contains four synchronous
8 step-down DC/DC converters for core, memory, I/O, and system on-chip (SoC)
9 rails and three 300mA LDO regulators for low noise analog supplies. The
10 LTC3676-1 has a 1.5A buck regulator configured to support DDR termination
11 plus a VTTR reference output. An I2C serial port is used to control regulator
12 enables, power-down sequencing, output voltage levels, dynamic voltage
13 scaling, operating modes and status reporting.
14 Regulator start-up is sequenced by connecting outputs to enable pins in the
15 desired order or via the I2C port. System power-on, power-off and reset
16 functions are controlled by pushbutton interface, pin inputs, or I2C.
17 The LTC3676 supports i.MX, PXA and OMAP processors with eight independent
18 rails at appropriate power levels. Other features include interface signals
19 such as the VSTB pin that toggles between programmed run and standby output
20 voltages on up to four rails simultaneously. The device is available in a
21 40-lead 6mm x 6mm QFN package.
22
23 I2C DATA FORMAT (MSB FIRST);
24
25 @endverbatim
26
27 http://www.linear.com/product/LTC3676
28
29 http://www.linear.com/product/LTC3676#demoboards
30
31
32 Copyright 2018(c) Analog Devices, Inc.
33
34 All rights reserved.
35
36 Redistribution and use in source and binary forms, with or without
37 modification, are permitted provided that the following conditions are met:
38 - Redistributions of source code must retain the above copyright
39 notice, this list of conditions and the following disclaimer.
40 - Redistributions in binary form must reproduce the above copyright
41 notice, this list of conditions and the following disclaimer in
42 the documentation and/or other materials provided with the
43 distribution.
44 - Neither the name of Analog Devices, Inc. nor the names of its
45 contributors may be used to endorse or promote products derived
46 from this software without specific prior written permission.
47 - The use of this software may or may not infringe the patent rights
48 of one or more patent holders. This license does not release you
49 from the requirement that you obtain separate licenses from these
50 patent holders to use this software.
51 - Use of the software either in source or binary form, must be run
52 on or directly connected to an Analog Devices Inc. component.
53
54 THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
55 IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
56 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
57 IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
58 INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
59 LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
60 SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
61 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
62 OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
63 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
64 */
65
66 /*! @file
67 @ingroup LTC3676
68 Library Header File for LTC3676: Power management solution for application processors
69 */
70
71 #ifndef LTC3676_H
72 #define LTC3676_H
73 #endif
74
75 /*! @name I2C_ADDRESSES
76 I2C address of the LTC3676 and LTC3676-1.
77 @{ */
78 /* LTC3676 I2C Addresses */
79 #define LTC3676_I2C_ADDRESS 0x3C
80 #define LTC3676_1_I2C_ADDRESS 0x3D
81 /*! @} */
82
83 /*! @name FEEDBACK RESISTORS
84 Feedback resistor values for the DC1976A-A in kOhm.
85 @{ */
86 /* LTC3676 Registers */
87 #define LTC3676_RES_BUCK1_RTOP 1000.
88 #define LTC3676_RES_BUCK1_RBOT 280.
89 #define LTC3676_RES_BUCK2_RTOP 1000.
90 #define LTC3676_RES_BUCK2_RBOT 1100.
91 #define LTC3676_RES_BUCK3_RTOP 1000.
92 #define LTC3676_RES_BUCK3_RBOT 1100.
93 #define LTC3676_RES_BUCK4_RTOP 1000.
94 #define LTC3676_RES_BUCK4_RBOT 931.
95 /*! @} */
96
97 /*! @name REGISTERS
98 @{ */
99 /* LTC3676 Registers */
100 #define LTC3676_REG_BUCK1 0x01
101 #define LTC3676_REG_BUCK2 0x02
102 #define LTC3676_REG_BUCK3 0x03
103 #define LTC3676_REG_BUCK4 0x04
104 #define LTC3676_REG_LDOA 0x05
105 #define LTC3676_REG_LDOB 0x06
106 #define LTC3676_REG_SQD1 0x07
107 #define LTC3676_REG_SQD2 0x08
108 #define LTC3676_REG_CNTRL 0x09
109 #define LTC3676_REG_DVB1A 0x0A
110 #define LTC3676_REG_DVB1B 0x0B
111 #define LTC3676_REG_DVB2A 0x0C
112 #define LTC3676_REG_DVB2B 0x0D
113 #define LTC3676_REG_DVB3A 0x0E
114 #define LTC3676_REG_DVB3B 0x0F
115 #define LTC3676_REG_DVB4A 0x10
116 #define LTC3676_REG_DVB4B 0x11
117 #define LTC3676_REG_MSKIRQ 0x12
118 #define LTC3676_REG_MSKPG 0x13
119 #define LTC3676_REG_USER 0x14
120 #define LTC3676_REG_IRQSTAT 0x15
121 #define LTC3676_REG_PGSTATL 0x16
122 #define LTC3676_REG_PGSTATRT 0x17
123 #define LTC3676_REG_HRST 0x1E
124 #define LTC3676_REG_CLIRQ 0x1F
125 /*! @} */
126
127 /*! @name LTC3676_REG_BUCKx SETTINGS
128 Bit position of single bit settings in the LTC3676_REG_BUCKx registers.
129 @{ */
130 #define LTC3676_BUCK_ENABLE 7
131 #define LTC3676_BUCK_STARTUP 4
132 #define LTC3676_BUCK_PHASE_SEL 3
133 #define LTC3676_BUCK_CLOCK_RATE 2
134 #define LTC3676_BUCK_KEEP_ALIVE 1
135 #define LTC3676_BUCK_SLEW 0
136 /*! @} */
137
138 /*! @name LTC3676_REG_LDOA SETTINGS
139 Bit position of single bit settings in the LTC3676_REG_LDOA register.
140 @{ */
141 #define LTC3676_LDO3_ENABLE 5
142 #define LTC3676_LDO3_STARTUP 4
143 #define LTC3676_LDO3_KEEP_ALIVE 3
144 #define LTC3676_LDO2_ENABLE 2
145 #define LTC3676_LDO2_STARTUP 1
146 #define LTC3676_LDO2_KEEP_ALIVE 0
147 /*! @} */
148
149 /*! @name LTC3676_REG_LDOB SETTINGS
150 Bit position of single bit settings in the LTC3676_REG_LDOB register.
151 @{ */
152 #define LTC3676_LDO4_ENABLE 2
153 #define LTC3676_LDO4_STARTUP 1
154 #define LTC3676_LDO4_KEEP_ALIVE 0
155 /*! @} */
156
157 /*! @name LTC3676_REG_CNTRL SETTINGS
158 Bit position of single bit settings in the LTC3676_REG_CNTRL register.
159 @{ */
160 #define LTC3676_PWR_ON 7
161 #define LTC3676_PB_RESET_TMR 6
162 #define LTC3676_SOFTWARE_CNTRL 5
163 /*! @} */
164
165 /*! @name LTC3676_REG_DVBxA SETTINGS
166 Bit position of single bit settings in the LTC3676_REG_DVBxA registers.
167 @{ */
168 #define LTC3676_BUCK_REF_SELECT 5
169 /*! @} */
170
171 /*! @name LTC3676_REG_DVBxB SETTINGS
172 Bit position of single bit settings in the LTC3676_REG_DVBxB register.
173 @{ */
174 #define LTC3676_BUCK_PG_MASK 5
175 /*! @} */
176
177 /*! @name LTC3676_REG_MSKIRQ SETTINGS
178 Bit position of single bit settings in the LTC3676_REG_MSKIRQ register.
179 @{ */
180 #define LTC3676_MASK_OT_SHUTDOWN 6
181 #define LTC3676_MASK_OT_WARNING 5
182 #define LTC3676_MASK_UV_SHUTDOWN 4
183 #define LTC3676_MASK_UV_WARNING 3
184 #define LTC3676_MASK_PG_TIMEOUT 2
185 #define LTC3676_MASK_PB_STATUS 0
186 /*! @} */
187
188 /*! @name LTC3676_REG_MSKPG SETTINGS
189 Bit position of single bit settings in the LTC3676_REG_MSKPG register.
190 @{ */
191 #define LTC3676_ENABLE_PG_LDO4 7
192 #define LTC3676_ENABLE_PG_LDO3 6
193 #define LTC3676_ENABLE_PG_LDO2 5
194 #define LTC3676_ENABLE_PG_BUCK4 3
195 #define LTC3676_ENABLE_PG_BUCK3 2
196 #define LTC3676_ENABLE_PG_BUCK2 1
197 #define LTC3676_ENABLE_PG_BUCK1 0
198 /*! @} */
199
200 /*! @name LTC3676_REG_USER SETTINGS
201 Bit position of single bit settings in the LTC3676_REG_USER register.
202 @{ */
203 #define LTC3676_USER_7 7
204 #define LTC3676_USER_6 6
205 #define LTC3676_USER_5 5
206 #define LTC3676_USER_4 4
207 #define LTC3676_USER_3 3
208 #define LTC3676_USER_2 2
209 #define LTC3676_USER_1 1
210 #define LTC3676_USER_0 0
211 /*! @} */
212
213 /*! @name LTC3676_REG_IRQSTAT SETTINGS
214 Bit position of status bits in the LTC3676_REG_IRQSTAT register.
215 @{ */
216 #define LTC3676_IRQ_OT_SHUTDOWN 6
217 #define LTC3676_IRQ_OT_WARNING 5
218 #define LTC3676_IRQ_UV_SHUTDOWN 4
219 #define LTC3676_IRQ_UV_WARNING 3
220 #define LTC3676_IRQ_PG_TIMEOUT 2
221 #define LTC3676_IRQ_HARD_RESET 1
222 #define LTC3676_IRQ_PB_STATUS 0
223 /*! @} */
224
225 /*! @name LTC3676_REG_PGSTATL SETTINGS
226 Bit position of status bits in the LTC3676_REG_PGSTATL register.
227 @{ */
228 #define LTC3676_PGL_LDO4 7
229 #define LTC3676_PGL_LDO3 6
230 #define LTC3676_PGL_LDO2 5
231 #define LTC3676_PGL_LDO1 4
232 #define LTC3676_PGL_BUCK4 3
233 #define LTC3676_PGL_BUCK3 2
234 #define LTC3676_PGL_BUCK2 1
235 #define LTC3676_PGL_BUCK1 0
236 /*! @} */
237
238 /*! @name LTC3676_REG_PGSTATRT SETTINGS
239 Bit position of status bits in the LTC3676_REG_PGSTATRT register.
240 @{ */
241 #define LTC3676_PGRT_LDO4 7
242 #define LTC3676_PGRT_LDO3 6
243 #define LTC3676_PGRT_LDO2 5
244 #define LTC3676_PGRT_LDO1 4
245 #define LTC3676_PGRT_BUCK4 3
246 #define LTC3676_PGRT_BUCK3 2
247 #define LTC3676_PGRT_BUCK2 1
248 #define LTC3676_PGRT_BUCK1 0
249 /*! @} */
250
251 /*! @name LTC3676 MASK SETTINGS
252 Bitwise AND with register data to determine present setting.
253 @{ */
254 #define LTC3676_BUCK_SEQ_MASK(num) (0x03<<((num)*2)-2)
255 #define LTC3676_LDO_SEQ_MASK(num) (0x03<<((num-2)*2))
256 #define LTC3676_BUCK_MODE_MASK 0x60
257 #define LTC3676_BUCK4_SEQ_MASK 0xC0
258 #define LTC3676_BUCK3_SEQ_MASK 0x30
259 #define LTC3676_BUCK2_SEQ_MASK 0x0C
260 #define LTC3676_BUCK1_SEQ_MASK 0x03
261 #define LTC3676_LDO4_SEQ_MASK 0x30
262 #define LTC3676_LDO3_SEQ_MASK 0x0C
263 #define LTC3676_LDO2_SEQ_MASK 0x03
264 #define LTC3676_UV_WARN_THRESH_MASK 0x1C
265 #define LTC3676_OT_WARN_LEVEL_MASK 0x03
266 #define LTC3676_FB_REF_MASK 0x1F
267 /*! @} */
268
269 /*! @name LTC3676-1 ONLY MASK SETTINGS
270 Bitwise AND with register data to determine present setting.
271 @{ */
272 #define LTC3676_1_LDO4_VOLTAGE_MASK 0x18
273 /*! @} */
274
275 //! Reads an 8-bit register from the LTC3676 using the standard repeated start format.
276 //! @return Returns the state of the acknowledge bit after the I2C address write. 0=acknowledge, 1=no acknowledge.
277 int8_t LTC3676_register_read(uint8_t i2c_address, //!< I2C address of the LTC3676.
278 uint8_t register_address, //!< Address of the LTC3676 register to be read. This is also known as the "command byte".
279 uint8_t *register_data //!< returns 8-bit value read from the LTC3676 register.
280 );
281
282 //! Writes to an 8-bit register inside the LTC3676 using the standard I2C repeated start format.
283 //! @return Returns the state of the acknowledge bit after the I2C address write. 0=acknowledge, 1=no acknowledge.
284 int8_t LTC3676_register_write(uint8_t i2c_address, //!< I2C address of the LTC3676.
285 uint8_t register_address, //!< Address of the LTC3676 register to be overwritten. This is also known as the "command byte".
286 uint8_t register_data //!< Value that will be written to the register.
287 );
288
289
290 //! Sets any bit inside the LTC3676 using the standard I2C repeated start format.
291 //! @return Returns the state of the acknowledge bit after the I2C address write. 0=acknowledge, 1=no acknowledge.
292 int8_t LTC3676_bit_set(uint8_t i2c_address, //!< I2C address of the LTC3676.
293 uint8_t register_address, //!< Address of the LTC3676 register to be overwritten. This is also known as the "command byte".
294 uint8_t bit_number //!< Bit location (0-7) to be written.
295 );
296
297 //! Clears any bit inside the LTC3676 using the standard I2C repeated start format.
298 //! @return Returns the state of the acknowledge bit after the I2C address write. 0=acknowledge, 1=no acknowledge.
299 int8_t LTC3676_bit_clear(uint8_t i2c_address, //!< I2C address of the LTC3676.
300 uint8_t register_address, //!< Address of the LTC3676 register to be overwritten. This is also known as the "command byte".
301 uint8_t bit_number //!< Address of the bit to set within the register.
302 );
303
304 //! Writes any bit inside the LTC3676 using the standard I2C repeated start format.
305 //! @return Returns the state of the acknowledge bit after the I2C address write. 0=acknowledge, 1=no acknowledge.
306 int8_t LTC3676_bit_write(uint8_t i2c_address, //!< I2C address of the LTC3676.
307 uint8_t register_address, //!< Address of the LTC3676 register to be written.
308 uint8_t bit_number, //!< Bit location (0-7) to be written.
309 uint8_t bit_data //!< Bit data (0 or 1) to be written.
310 );
311
312 //! Reads the value of any bit in any register or the LTC3676.
313 //! @return Returns the bit value at the passed register subaddress and bit location.
314 uint8_t LTC3676_bit_is_set(uint8_t i2c_address, //!< I2C address of the LTC3676.
315 uint8_t register_address, //!< Address of the LTC3676 register to be read. This is also known as the "command byte".
316 uint8_t bit_number //!< Bit location (0-7) to be read.
317 );
318
319 //! Sets the output voltage of any buck.
320 //! @return Returns the new buck output voltage, the closest allowable voltage to the user's chosen voltage.
321 float LTC3676_set_buck_output_voltage(uint8_t i2c_address, //!< I2C address of the LTC3676.
322 uint8_t register_address, //!< Address of the LTC3676 Buck FB reference register to be written.
323 float output_voltage //!< New output voltage to set, in mV. Assumes a valid voltage for the feedback resistors.
324 );
325
326 //! Writes the Feedback Reference Voltage of any buck.
327 //! @return Returns the new Feedback Reference Input Voltage, the closest allowable voltage to the user's chosen voltage.
328 float LTC3676_set_buck_fb_ref(uint8_t i2c_address, //!< I2C address of the LTC3676.
329 uint8_t register_address, //!< Address of the LTC3676 Buck FB reference register to be written.
330 float fb_ref_voltage //!< New Feedback Reference voltage to set in mV. Values between 412.5 and 800 are allowed.
331 );
332
333 //! Calculates the maximum output voltage of any buck in mV based on the feedback resistors.
334 //! @return Returns the maximum possible output voltage for the selected buck.
335 float LTC3676_buck_vout_max(uint8_t buck_number //!< Number (1-4) of buck.
336 );
337
338 //! Calculates the minimum output voltage of any buck in mV based on the feedback resistors.
339 //! @return Returns the minimum possible output voltage for the selected buck.
340 float LTC3676_buck_vout_min(uint8_t buck_number //!< Number (1-4) of buck.
341 );
342
343 //! Selects the reference for the specified buck regulator(s).
344 //! @return Returns the state of the acknowledge bit after the I2C addresss write. 0=acknowledge, 1=no acknowledge.
345 int8_t LTC3676_select_buck_reference(uint8_t i2c_address, //!< I2C address of the LTC3676.
346 uint8_t buck_number, //!< Number (1-4) of the buck whose reference will be selected. Enter 0xFF for all bucks.
347 int8_t ref_char //!< Reference to select (A or B).
348 );
349
350 //! Sets the switching mode for the specified Buck regulator.
351 //! @return Returns the state of the acknowledge bit after the I2C addresss write. 0=acknowledge, 1=no acknowledge.
352 int8_t LTC3676_set_buck_mode(uint8_t i2c_address, //!< I2C address of the LTC3676.
353 uint8_t buck_number, //!< Number (1-4) of the buck to set. Enter 0xFF for all bucks.
354 uint8_t mode //!< Switching mode to be set (0=pulse skipping, 1=burst, 2=forced continuous)
355 );
356
357 //! Sets the start-up mode for all bucks.
358 //! @return Returns the state of the acknowledge bit after the I2C addresss write. 0=acknowledge, 1=no acknowledge.
359 int8_t LTC3676_set_startup_mode(uint8_t i2c_address, //!< I2C address of the LTC3676.
360 uint8_t buck_number, //!< Number (1-4) of the buck to set. Enter 0xFF for all bucks.
361 uint8_t startup_bit //!< Data to write to start-up bit (0=enable at any output, 1=enable only if output <300mV)
362 );
363
364 //! Sets the PGOOD mask bit in the DVBxB register for all bucks.
365 //! @return Returns the state of the acknowledge bit after the I2C addresss write. 0=acknowledge, 1=no acknowledge.
366 int8_t LTC3676_set_buck_pgood_mask(uint8_t i2c_address, //!< I2C address of the LTC3676.
367 uint8_t buck_number, //!< Number (1-4) of the buck to set.
368 uint8_t pgood_bit //!< Data to write to PGOOD bit (0=PGOOD low when slewing, 1=PGOOD not forced low when slewing)
369 );
370
371 //! Writes a new UV warning threshold voltage in the CTRL register.
372 //! @return Returns the state of the acknowledge bit after the I2C addresss write. 0=acknowledge, 1=no acknowledge.
373 int8_t LTC3676_set_uv_warning_threshold(uint8_t i2c_address, //!< I2C address of the LTC3676.
374 float uv_warning_threshold //!< New UV warning threshold to set, in volts. Values between 2.7 and 3.4 are allowed.
375 );
376
377 //! Writes the UV warning threshold of any buck.
378 //! @return Returns the state of the acknowledge bit after the I2C addresss write. 0=acknowledge, 1=no acknowledge.
379 int8_t LTC3676_set_overtemp_warning_level(uint8_t i2c_address, //!< I2C address of the LTC3676.
380 uint8_t ot_warning_level //!< New overtemp warning level to set, degrees C below Overtemperature fault level. Values 10, 20, 30, and 40 are allowed.
381 );
382
383 //! Sets LDO4 output voltage on the LTC3676-1.
384 //! @return Returns the state of the acknowledge bit after the I2C addresss write. 0=acknowledge, 1=no acknowledge.
385 int8_t LTC3676_1_set_ldo4_voltage(uint8_t i2c_address, //!< I2C address of the LTC3676-1.
386 uint8_t ldo4_output_voltage_code //!< Voltage code for new LDO4 output voltage: 0=1.2V, 1=2.5V, 2=2.8V, 3=3.0V
387 );
388
389 //! Sets the Sequence Down bits for any buck in the SQD1 register.
390 //! @return Returns the state of the acknowledge bit after the I2C address write. 0=acknowledge, 1=no acknowledge.
391 int8_t LTC3676_set_buck_sequence_down(uint8_t i2c_address, //!< I2C address of the LTC3676.
392 uint8_t buck_number, //!< Number (1-4) of the buck to sequence.
393 uint8_t sequence_phase //!< Sequence down phase: 0=with WAKE, 1=WAKE+100ms, 2=WAKE+200ms, 3=WAKE+300ms.
394 );
395
396 //! Sets the Sequence Down bits for any buck in the SQD1 register.
397 //! @return Returns the state of the acknowledge bit after the I2C address write. 0=acknowledge, 1=no acknowledge.
398 int8_t LTC3676_set_ldo_sequence_down(uint8_t i2c_address, //!< I2C address of the LTC3676.
399 uint8_t ldo_number, //!< Number (2-4) of the LDO to sequence.
400 uint8_t sequence_phase //!< Sequence down phase: 0=with WAKE, 1=WAKE+100ms, 2=WAKE+200ms, 3=WAKE+300ms.
401 );
i2c_address
uint8_t i2c_address
LTC3676_bit_clear
int8_t LTC3676_bit_clear(uint8_t i2c_address, uint8_t register_address, uint8_t bit_number)
Clears any bit inside the LTC3676 using the standard I2C repeated start format.
Definition: LTC3676.cpp:108
LTC3676_buck_vout_min
float LTC3676_buck_vout_min(uint8_t buck_number)
Calculates the minimum output voltage of any buck in mV based on the feedback resistors.
Definition: LTC3676.cpp:212
LTC3676_set_buck_output_voltage
float LTC3676_set_buck_output_voltage(uint8_t i2c_address, uint8_t register_address, float output_voltage)
Sets the output voltage of any buck.
Definition: LTC3676.cpp:147
LTC3676_set_ldo_sequence_down
int8_t LTC3676_set_ldo_sequence_down(uint8_t i2c_address, uint8_t ldo_number, uint8_t sequence_phase)
Sets the Sequence Down bits for any buck in the SQD1 register.
Definition: LTC3676.cpp:368
LTC3676_bit_set
int8_t LTC3676_bit_set(uint8_t i2c_address, uint8_t register_address, uint8_t bit_number)
Sets any bit inside the LTC3676 using the standard I2C repeated start format.
Definition: LTC3676.cpp:95
LTC3676_bit_is_set
uint8_t LTC3676_bit_is_set(uint8_t i2c_address, uint8_t register_address, uint8_t bit_number)
Reads the value of any bit in any register or the LTC3676.
Definition: LTC3676.cpp:137
LTC3676_set_buck_sequence_down
int8_t LTC3676_set_buck_sequence_down(uint8_t i2c_address, uint8_t buck_number, uint8_t sequence_phase)
Sets the Sequence Down bits for any buck in the SQD1 register.
Definition: LTC3676.cpp:354
LTC3676_register_write
int8_t LTC3676_register_write(uint8_t i2c_address, uint8_t register_address, uint8_t register_data)
Writes to an 8-bit register inside the LTC3676 using the standard I2C repeated start format...
Definition: LTC3676.cpp:86
LTC3676_set_overtemp_warning_level
int8_t LTC3676_set_overtemp_warning_level(uint8_t i2c_address, uint8_t ot_warning_level)
Writes the UV warning threshold of any buck.
Definition: LTC3676.cpp:326
LTC3676_bit_write
int8_t LTC3676_bit_write(uint8_t i2c_address, uint8_t register_address, uint8_t bit_number, uint8_t bit_data)
Writes any bit inside the LTC3676 using the standard I2C repeated start format.
Definition: LTC3676.cpp:122
LTC3676_set_startup_mode
int8_t LTC3676_set_startup_mode(uint8_t i2c_address, uint8_t buck_number, uint8_t startup_bit)
Sets the start-up mode for all bucks.
Definition: LTC3676.cpp:276
LTC3676_1_set_ldo4_voltage
int8_t LTC3676_1_set_ldo4_voltage(uint8_t i2c_address, uint8_t ldo4_output_voltage_code)
Sets LDO4 output voltage on the LTC3676-1.
Definition: LTC3676.cpp:341
LTC3676_set_buck_fb_ref
float LTC3676_set_buck_fb_ref(uint8_t i2c_address, uint8_t register_address, float fb_ref_voltage)
Writes the Feedback Reference Voltage of any buck.
Definition: LTC3676.cpp:176
LTC3676_buck_vout_max
float LTC3676_buck_vout_max(uint8_t buck_number)
Calculates the maximum output voltage of any buck in mV based on the feedback resistors.
Definition: LTC3676.cpp:191
LTC3676_set_buck_pgood_mask
int8_t LTC3676_set_buck_pgood_mask(uint8_t i2c_address, uint8_t buck_number, uint8_t pgood_bit)
Sets the PGOOD mask bit in the DVBxB register for all bucks.
Definition: LTC3676.cpp:293
LTC3676_register_read
int8_t LTC3676_register_read(uint8_t i2c_address, uint8_t register_address, uint8_t *register_data)
Reads an 8-bit register from the LTC3676 using the standard repeated start format.
Definition: LTC3676.cpp:78
LTC3676_select_buck_reference
int8_t LTC3676_select_buck_reference(uint8_t i2c_address, uint8_t buck_number, int8_t ref_char)
Selects the reference for the specified buck regulator(s).
Definition: LTC3676.cpp:233
LTC3676_set_buck_mode
int8_t LTC3676_set_buck_mode(uint8_t i2c_address, uint8_t buck_number, uint8_t mode)
Sets the switching mode for the specified Buck regulator.
Definition: LTC3676.cpp:255
LTC3676_set_uv_warning_threshold
int8_t LTC3676_set_uv_warning_threshold(uint8_t i2c_address, float uv_warning_threshold)
Writes a new UV warning threshold voltage in the CTRL register.
Definition: LTC3676.cpp:311