| Linduino 1.3.0 Linear Technology Arduino-Compatible Demonstration Board

LT_PMBusDeviceController.h
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1 /*!
2 LTC PSM Controller Device
3
4 @verbatim
5
6 Representation of a device and its capabilities.
7
8 @endverbatim
9
10
11 Copyright 2018(c) Analog Devices, Inc.
12
13 All rights reserved.
14
15 Redistribution and use in source and binary forms, with or without
16 modification, are permitted provided that the following conditions are met:
17 - Redistributions of source code must retain the above copyright
18 notice, this list of conditions and the following disclaimer.
19 - Redistributions in binary form must reproduce the above copyright
20 notice, this list of conditions and the following disclaimer in
21 the documentation and/or other materials provided with the
22 distribution.
23 - Neither the name of Analog Devices, Inc. nor the names of its
24 contributors may be used to endorse or promote products derived
25 from this software without specific prior written permission.
26 - The use of this software may or may not infringe the patent rights
27 of one or more patent holders. This license does not release you
28 from the requirement that you obtain separate licenses from these
29 patent holders to use this software.
30 - Use of the software either in source or binary form, must be run
31 on or directly connected to an Analog Devices Inc. component.
32
33 THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
34 IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
35 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
36 IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
37 INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
38 LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
39 SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
40 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
41 OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
42 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43 */
44
45 /*! @file
46 @ingroup LT_PMBusDevice
47 Library Header File for LT_PMBusDeviceController
48 */
49
50 #ifndef LT_PMBusDeviceController_H_
51 #define LT_PMBusDeviceController_H_
52
53 #include "LT_PMBusDevice.h"
54 #include "LT_PMBusRail.h"
55
56 class LT_PMBusDeviceController : public LT_PMBusDevice
57 {
58 private:
59 uint8_t no_pages_;
60
61 public:
62
63 LT_PMBusDeviceController(LT_PMBus *pmbus, uint8_t address, uint8_t no_pages) : LT_PMBusDevice(pmbus, address), no_pages_(no_pages) {}
64
65 LT_PMBusRail **getRails()
66 {
67 LT_PMBusRail **rails = NULL;
68 tRailDef **railDef = NULL;
69 void *m;
70 uint8_t rail_address, last_rail_address;
71 uint8_t no_rails = 0;
72 // Serial.println("controller get rails ");
73
74 no_rails = 0;
75 pmbus_->setPage(address_, 0);
76 last_rail_address = (rail_address = pmbus_->getRailAddress(address_));
77 if (rail_address == 0x80)
78 {
79 railDef = (tRailDef **)malloc(2*sizeof(tRailDef *));
80 railDef[1] = NULL;
81 railDef[0] = new tRailDef;
82 railDef[0]->address = address_;
83 railDef[0]->pages = (uint8_t *) malloc(1);
84 railDef[0]->pages[0] = 0;
85 railDef[0]->noOfPages = 1;
86 railDef[0]->controller = true;
87 railDef[0]->multiphase = false;
88 railDef[0]->capabilities = getCapabilities();
89 last_rail_address = address_;
90 no_rails++;
91 }
92 else
93 {
94 m = malloc(2*sizeof(tRailDef *));
95 if (m == NULL)
96 free(m);
97 else
98 {
99 railDef = (tRailDef **)m;
100 railDef[1] = NULL;
101 railDef[0] = new tRailDef;
102 railDef[0]->address = address_;
103 railDef[0]->pages = (uint8_t *) malloc(1);
104 railDef[0]->pages[0] = 0;
105 railDef[0]->noOfPages = 1;
106 railDef[0]->controller = true;
107 railDef[0]->multiphase = true;
108 railDef[0]->capabilities = getCapabilities();
109 }
110 no_rails++;
111 }
112
113 if (no_pages_ > 0) // Only handes 1/2 channel controllers
114 {
115 pmbus_->setPage(address_, 1);
116 rail_address = pmbus_->getRailAddress(address_);
117 if (rail_address == 0x80)
118 {
119 m = realloc(railDef, 4*sizeof(tRailDef *));
120 if (m == NULL)
121 free(m);
122 else
123 {
124 railDef = (tRailDef **)m;
125 railDef[3] = NULL;
126 railDef[2] = new tRailDef;
127 railDef[2]->address = address_;
128 railDef[2]->pages = (uint8_t *) malloc(1);
129 railDef[2]->pages[0] = 1;
130 railDef[2]->noOfPages = 1;
131 railDef[2]->controller = true;
132 railDef[2]->multiphase = false;
133 railDef[2]->capabilities = getCapabilities();
134 rail_address = address_;
135 }
136 no_rails++;
137 }
138 else
139 {
140 if (last_rail_address == rail_address) // Both pages in same rail.
141 {
142 railDef[0]->pages = (uint8_t *) realloc(railDef[0]->pages, 2);
143 railDef[0]->pages[1] = 1;
144 railDef[0]->noOfPages = 2;
145 }
146 else
147 {
148 m = realloc(railDef,4 *sizeof(tRailDef *));
149 if (m == NULL)
150 free(m);
151 else
152 {
153 railDef = (tRailDef **)m;
154 railDef[3] = NULL;
155 railDef[2] = new tRailDef;
156 railDef[2]->address = address_;
157 railDef[2]->pages = (uint8_t *) malloc(1);
158 railDef[2]->pages[0] = 1;
159 railDef[2]->noOfPages = 1;
160 railDef[2]->controller = true;
161 railDef[2]->multiphase = true;
162 railDef[2]->capabilities = getCapabilities();
163 }
164 no_rails++;
165 }
166 }
167 }
168
169 if (no_rails > 0)
170 {
171 rails = (LT_PMBusRail **) malloc((no_rails + 1) * sizeof(LT_PMBusRail *));
172 rails[0] = new LT_PMBusRail(pmbus_, last_rail_address, railDef);
173 if (no_rails > 1)
174 rails[1] = new LT_PMBusRail(pmbus_, rail_address, railDef + 2);
175 }
176
177 rails[no_rails] = NULL;
178 return rails;
179 }
180
181 };
182
183 #endif /* LT_PMBusDeviceController_H_ */
tRailDef::noOfPages
uint8_t noOfPages
Definition: LT_PMBusRail.h:65
LT_PMBusDevice::address_
uint8_t address_
Definition: LT_PMBusDevice.h:79
tRailDef::controller
bool controller
Definition: LT_PMBusRail.h:66
LT_PMBusDevice
Definition: LT_PMBusDevice.h:75
rails
static LT_PMBusRail ** rails
Definition: rail_logger.ino:97
LT_PMBusDevice::pmbus_
LT_PMBus * pmbus_
Definition: LT_PMBusDevice.h:78
tRailDef::capabilities
uint32_t capabilities
Definition: LT_PMBusRail.h:68
LT_PMBusRail.h
LTC PMBus Support.
pages
static uint8_t pages[2]
Definition: DC1989A.ino:87
tRailDef::multiphase
bool multiphase
Definition: LT_PMBusRail.h:67
address
static uint8_t address
Definition: DC2091A.ino:83
LT_PMBusDevice::pmbus
LT_PMBus * pmbus()
Definition: LT_PMBusDevice.cpp:70
LT_PMBusDevice::getCapabilities
virtual uint32_t getCapabilities()=0
Get the supported capabilities.
LT_PMBus::setPage
void setPage(uint8_t address, uint8_t page)
Set the page.
Definition: LT_PMBus.cpp:3156
tRailDef
Definition: LT_PMBusRail.h:61
LT_PMBusDeviceController
Definition: LT_PMBusDeviceController.h:56
LT_PMBusDeviceController::LT_PMBusDeviceController
LT_PMBusDeviceController(LT_PMBus *pmbus, uint8_t address, uint8_t no_pages)
Definition: LT_PMBusDeviceController.h:63
LT_PMBusDevice.h
Library Header File for LT_PMBusDevice.
tRailDef::address
uint8_t address
Definition: LT_PMBusRail.h:63
tRailDef::pages
uint8_t * pages
Definition: LT_PMBusRail.h:64
LT_PMBusRail
PMBusRail communication. For Multiphase Rails.
Definition: LT_PMBusRail.h:72
LT_PMBus::getRailAddress
uint8_t getRailAddress(uint8_t address)
Get the rail address of a Controller.
Definition: LT_PMBus.cpp:3131
LT_PMBusDeviceController::getRails
LT_PMBusRail ** getRails()
Return a list of rails if any page is part of a rail.
Definition: LT_PMBusDeviceController.h:65
LT_PMBus
PMBus communication.
Definition: LT_PMBus.h:370