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LTM9100.h
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1 /*!
2 LTM9100: Anyside™ High Voltage Isolated Switch Controller with I²C Command and Telemetry
3
4 @verbatim
5
6 The LTM9100 μModule controller is a complete, galvanically isolated switch controller
7 with I2C interface, for use as a load switch or hot swap controller. The load is soft
8 started and controlled by an external N-channel MOSFET switch.
9
10 @endverbatim
11
12 http://www.linear.com/product/LTM9100
13
14 http://www.linear.com/product/LTC9100#demoboards
15
16
17 Copyright 2018(c) Analog Devices, Inc.
18
19 All rights reserved.
20
21 Redistribution and use in source and binary forms, with or without
22 modification, are permitted provided that the following conditions are met:
23 - Redistributions of source code must retain the above copyright
24 notice, this list of conditions and the following disclaimer.
25 - Redistributions in binary form must reproduce the above copyright
26 notice, this list of conditions and the following disclaimer in
27 the documentation and/or other materials provided with the
28 distribution.
29 - Neither the name of Analog Devices, Inc. nor the names of its
30 contributors may be used to endorse or promote products derived
31 from this software without specific prior written permission.
32 - The use of this software may or may not infringe the patent rights
33 of one or more patent holders. This license does not release you
34 from the requirement that you obtain separate licenses from these
35 patent holders to use this software.
36 - Use of the software either in source or binary form, must be run
37 on or directly connected to an Analog Devices Inc. component.
38
39 THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
40 IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
41 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
42 IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
43 INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
44 LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
45 SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
46 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
47 OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
48 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
49 */
50
51 /*! @file
52 @ingroup LTM9100
53 Header for LTM9100 Anyside™ High Voltage Isolated Switch Controller with I²C Command and Telemetry.
54 */
55
56 #ifndef LTM9100_H
57 #define LTM9100_H
58
59 #define LTM_9100_STATUS_A_REG 0x00
60 #define LTM_9100_FAULT_B_REG 0x01
61 #define LTM_9100_ALERT_C_REG 0x02
62 #define LTM_9100_CTRL_D_REG 0x03
63 #define LTM_9100_SENSE_E_REG 0x04
64 #define LTM_9100_SENSE_F_REG 0x05
65 #define LTM_9100_ADIN2_G_REG 0x06
66 #define LTM_9100_ADIN2_H_REG 0x07
67 #define LTM_9100_ADIN_I_REG 0x08
68 #define LTM_9100_ADIN_J_REG 0x09
69
70 #define LTM_9100_STATUS_GATE 0x07
71 #define LTM_9100_STATUS_PGI 0x06
72 #define LTM_9100_STATUS_FET 0x05
73 #define LTM_9100_STATUS_OC 0x02
74 #define LTM_9100_STATUS_UV 0x01
75 #define LTM_9100_STATUS_OV 0x00
76
77 #define LTM_9100_FAULT_PGI 0x06
78 #define LTM_9100_FAULT_FET 0x05
79 #define LTM_9100_FAULT_OC 0x02
80 #define LTM_9100_FAULT_UV 0x01
81 #define LTM_9100_FAULT_OV 0x00
82
83 #define LTM_9100_ALERT_PGO LTM_9100_FAULT_PGI
84 #define LTM_9100_ALERT_FET LTM_9100_FAULT_FET
85 #define LTM_9100_ALERT_OC LTM_9100_FAULT_OC
86 #define LTM_9100_ALERT_UV LTM_9100_FAULT_UV
87 #define LTM_9100_ALERT_OV LTM_9100_FAULT_OV
88
89 #define LTM_9100_CTRL_PGIO_CFG 0x06
90 #define LTM_9100_CTRL_PGIO_CFG_MASK 0xC0
91 #define LTM_9100_CTRL_ADC_WRITE 0x05
92 #define LTM_9100_CTRL_GATE_CTRL 0x03
93 #define LTM_9100_CTRL_OC 0x02
94 #define LTM_9100_CTRL_UV 0x01
95 #define LTM_9100_CTRL_OV 0x00
96
97 #define LTM_9100_SENSE_mV_PER_TICK 0.0625
98 #define LTM_9100_ADIN_V_PER_TICK 0.0025
99 #define LTM_9100_ADIN2_V_PER_TICK 0.0025
100
101 extern uint8_t i2c_address; //7-bit version of LTM9100 I2C device addr determined by ADR0 & ADR1 (divide datasheet address by 2). ADR0/1 low: 0x20 -> 0x10
102 extern uint8_t reg_read_list[10];
103 extern uint8_t reg_write_list[9];
104
105 extern float sense_resistor;
106 extern float adin_gain;
107 extern float adin2_gain;
108
109
110 //! Reads an 8-bit register from the LTM9100 using the standard repeated start format.
111 //! @return Returns the state of the acknowledge bit after the I2C address write. 0=acknowledge, 1=no acknowledge.
112 int8_t LTM9100_register_read(uint8_t i2c_address, uint8_t register_address, uint8_t *register_data);
113
114 //! Read the specified ADC value (SENSE, ADIN, ADIN2) and output in human readable format to the serial console.
115 //! @return Returns the state of the acknowledge bit after the I2C address write. 0=acknowledge, 1=no acknowledge.
116 int8_t LTM9100_adc_read(uint8_t i2c_address, uint8_t base_address, float *register_data);
117
118 //! Writes to an 8-bit register inside the LTM9100 using the standard I2C repeated start format.
119 //! @return Returns the state of the acknowledge bit after the I2C address write. 0=acknowledge, 1=no acknowledge.
120 int8_t LTM9100_register_write(uint8_t i2c_address, uint8_t register_address, uint8_t register_data);
121
122 //! Sets any bit inside the LTM9100 using the standard I2C repeated start format.
123 //! @return Returns the state of the acknowledge bit after the I2C address write. 0=acknowledge, 1=no acknowledge.
124 int8_t LTM9100_bit_set(uint8_t i2c_address, uint8_t register_address, uint8_t bit_number);
125
126 //! Clears any bit inside the LTM9100 using the standard I2C repeated start format.
127 //! @return Returns the state of the acknowledge bit after the I2C address write. 0=acknowledge, 1=no acknowledge.
128 int8_t LTM9100_bit_clear(uint8_t i2c_address, uint8_t register_address, uint8_t bit_number);
129
130 //! Read the bit specified by bit_number from the LTM9100.
131 //! @return Returns the state of the acknowledge bit after the I2C address write. 0=acknowledge, 1=no acknowledge.
132 int8_t LTM9100_bit_read(uint8_t i2c_address, uint8_t register_address, uint8_t bit_number, uint8_t *register_data);
133
134 //! Attempts to read a byte from the I2C bus using the alert address (0xC) to ascertain pending alerts on the bus.
135 //! @return Returns the state of the acknowledge bit after the I2C address write. 0=acknowledge, 1=no acknowledge.
136 int8_t LTM9100_alert_read(uint8_t *register_data);
137
138 //! Read all LTM9100 registers and output to the serial console.
139 //! @return Returns the state of the acknowledge bit after the I2C address write. 0=acknowledge, 1=no acknowledge.
140 int8_t LTM9100_print_all_registers(uint8_t i2c_address);
141
142 //! Read all LTM9100 registers and output to the serial console every second until a key press is detected.
143 //! @return Returns the state of the acknowledge bit after the I2C address write. 0=acknowledge, 1=no acknowledge.
144 int8_t LTM9100_continuous_read_all_registers(uint8_t i2c_address);
145
146 //! Check if user_register is a valid register for the LTM9100.
147 //! @return Returns the validity of user_register against the the supplied register set.
148 boolean valid_register(uint8_t user_register, uint8_t register_array[], uint8_t array_length);
149
150 #endif
reg_write_list
uint8_t reg_write_list[9]
Definition: LTM9100.cpp:69
i2c_address
uint8_t i2c_address
LTM9100_print_all_registers
int8_t LTM9100_print_all_registers(uint8_t i2c_address)
Read all LTM9100 registers and output to the serial console.
Definition: LTM9100.cpp:163
LTM9100_bit_read
int8_t LTM9100_bit_read(uint8_t i2c_address, uint8_t register_address, uint8_t bit_number, uint8_t *register_data)
Read the bit specified by bit_number from the LTM9100.
Definition: LTM9100.cpp:146
adin_gain
float adin_gain
reg_read_list
uint8_t reg_read_list[10]
Definition: LTM9100.cpp:68
LTM9100_register_read
int8_t LTM9100_register_read(uint8_t i2c_address, uint8_t register_address, uint8_t *register_data)
Reads an 8-bit register from the LTM9100 using the standard repeated start format.
Definition: LTM9100.cpp:72
LTM9100_alert_read
int8_t LTM9100_alert_read(uint8_t *register_data)
Attempts to read a byte from the I2C bus using the alert address (0xC) to ascertain pending alerts on...
Definition: LTM9100.cpp:155
LTM9100_adc_read
int8_t LTM9100_adc_read(uint8_t i2c_address, uint8_t base_address, float *register_data)
Read the specified ADC value (SENSE, ADIN, ADIN2) and output in human readable format to the serial c...
Definition: LTM9100.cpp:80
sense_resistor
float sense_resistor
LTM9100_continuous_read_all_registers
int8_t LTM9100_continuous_read_all_registers(uint8_t i2c_address)
Read all LTM9100 registers and output to the serial console every second until a key press is detecte...
Definition: LTM9100.cpp:188
LTM9100_register_write
int8_t LTM9100_register_write(uint8_t i2c_address, uint8_t register_address, uint8_t register_data)
Writes to an 8-bit register inside the LTM9100 using the standard I2C repeated start format...
Definition: LTM9100.cpp:112
adin2_gain
float adin2_gain
LTM9100_bit_clear
int8_t LTM9100_bit_clear(uint8_t i2c_address, uint8_t register_address, uint8_t bit_number)
Clears any bit inside the LTM9100 using the standard I2C repeated start format.
Definition: LTM9100.cpp:133
valid_register
boolean valid_register(uint8_t user_register, uint8_t register_array[], uint8_t array_length)
Check if user_register is a valid register for the LTM9100.
Definition: LTM9100.cpp:212
LTM9100_bit_set
int8_t LTM9100_bit_set(uint8_t i2c_address, uint8_t register_address, uint8_t bit_number)
Sets any bit inside the LTM9100 using the standard I2C repeated start format.
Definition: LTM9100.cpp:120