製品概要
機能と利点
- Simple power connection using 6 V wall adapter and on-board LDO voltage regulators
- LDOs are easily bypassed for power measurements
- 8 ac-coupled differential LVPECL SMA connectors
- 2 ac-coupled LVPECL differential headers
- 2 dc-coupled differential LVDS SMA connectors that are reconfigurable to four CMOS SMA connectors
- 2 dc-coupled LVDS differential headers that are reconfigurable to four CMOS connectors
- SMA connectors for
- 2 reference inputs
- Charge pump output
- Clock distribution input
- USB connection to PC
- Microsoft Windows-based evaluation software with simple graphical user interface
- On-board PLL loop filter
- Easy access to digital I/O and diagnostic signals via I/O header
- Status LEDs for diagnostic signals
製品概要
The AD9516-x, AD9517-x, and AD9518-x are very low noise PLL clock synthesizers featuring an integrated VCO, clock dividers, and up to 14 outputs. The AD9516 features automatic holdover and a flexible reference input circuit allowing for very smooth reference clock switching. The AD9516 family also features the necessary provisions for an external VCXO.
The AD9516 evaluation board is a compact, easy-to-use platform for evaluating all features of the AD9516. The user guide covers all six versions of the AD9516 family, as well as the AD9517 and AD9518 families (hereafter referred to as AD951x). The AD9516, AD9517, and AD9518 differ only in package size, and the number of outputs. The evaluation software main window for the AD9517 and AD9518 reflects fewer outputs, but the operation is identical for all devices.
Although the Quick Start Guide to the AD9516 PLL section applies specifically to the AD9516-3, increasing the N (feed-back) divider and channel divider increases the VCO frequency to the allowable frequency range of other AD9516 versions.
For the AD9516-5, which lacks an internal VCO, certain portions of this document that apply to the internal VCO (such as VCO calibration) can be ignored.
Application
- Clocking of analog-to-digital and digital-to-analog converters up to 2.9 GHz
- Networking and communications line cards
- Test and measurement equipment
- Wireless base stations, controllers
- Clock cleanup/jitter attenuation
- Clock distribution
関連資料
-
ADIsimCLK 設計・評価 ソフトウェア2015/05/12
-
AD9516 Schematic (Rev. D)2007/07/27PDF217 K
-
UG-093: Evaluation Board User Guide for the Dual, Continuous Time Sigma-Delta Modulator2010/04/08PDF1449 kB
-
UG-075: AD9516-x, AD9517-x, and AD9518-x Evaluation Board User Guide2010/01/30PDF1089 kB
-
AD9516-3 Bill of Materials (Rev. D)2009/12/10XLS36 kB
-
AD9516 Evaluation Board Register Setup (stp, 2.20 KB)2007/07/27
-
AD9516 Simulation File for the ADIsimCLK (clk, 62.4 KB)2007/07/27
-
AD9516 Gerber Files (Rev. D)2007/07/27ZIP332 K