Data Sheet Errata
Documentation Errata for ADSP-TS101 TigerSHARC Processor Programming Reference
Doc ID: DOC-619
Change
Add the following text after the first paragraph under the heading "Function":
If the bit value in register Rn is greater than 6-bits (5-bits) for a long-word (normal-word) operation, the result in the destination register(s), Rsd (Rs), are unchanged. If an immediate value of greater than 6-bits (5-bits) is used, the immediate value gets truncated (via the opcode) to a 6-bit (5-bit) value, and therefore the appropriate bit is set/cleared/toggled via the instruction.
Also, add the following text (as an addendum) in the section titled "Example":
Example
r11:10 = btgl r7:6 by 0xf8;; // immediate value "0xf8" gets truncated to 6-bit value of "0x38"
If r7=0x00000000 and r6=0x00000000
then r11=0x01000000 and r10=0x00000000
r13:12 = btgl r7:6 by 0x38;; // immediate value "0x38" is a 6-bit valueIf r7=0x00000000 and r6=0x00000000
then r11=0x01000000 and r10=0x00000000
r11:10 = btgl r7:6 by r4;; // value in register r4 exceeds 6-bits, therefore no updates to r11 or r10If r7=0x00000000 and r6=0x00000000 and r4=0xfffffff8
then r11=0x00000000 and r10=0x00000000
r13:12 = btgl r7:6 by r1;; // value in register r1 is contained by 6-bits, therefore r13 or r12 are updatedIf r7=0x00000000 and r6=0x00000000 and r1=0x00000038
then r11=0x01000000 and r10=0x00000000
Last Update Date: 2017年05月08日