This application note describes how to determine the power down capacitance of a SCSI bus with a DS2107A terminator.
The DS2107A is used in SCSI systems to provide active termination for 9 signal lines. In the typical 8 bit-wide data configuration (A cable), two DS2107A's are required to fully terminate the bus (9 control lines + 8 data lines + 1 parity line). In the 16-bit wide data configuration (P cable), three DS2107A's are required to fully terminate the bus (9 control lines + 16 data lines + 2 parity lines). The two packages available are DS2107AS, 16-pin SOIC, and DS2107AE, 20-pin TSSOP (Thin Shrink Small Outline Package).
The SCSI bus is defined to use termination at the two physical ends of the bus. If a device is connected in the middle of the bus, the total lumped capacitance of the device is limited on each signal line. Section 7.1.4 of the SCSI-3 Parallel Interface specification defines this value as 25pF. Annex E defines the measurement of the pin capacitance:
"The objective of this procedure is to determine the lumped capacitance imposed on each signal conductor of the bus proper by an SCSI device connected thereto. The model for this procedure assumes the bus in ribbon cable form passing through an insulation-displacement SCSI connector, the mating part that is mounted on an SCSI device controller printed-wire board. The bus connector is removed from the device, along with every source of power.The DS2107A was measured using an HP4194A Impedance Bridge, and then verified using a lowpass RC network and an LC resonance circuit. The power down capacitance using the Impedance Bridge was measured to be 8.1pF. The RC network shown in Figure 1 yielded 8.0pF, and the LC resonance circuit of Figure 2 measured 8.6pF. VS of both Figure 1 and Figure 2 is comprised of Vdc = 0.5V, Vac = 0.4 p-p, and f = 1MHz.
One or more device connector circuit-common pins are connected together to form an effective circuit-common node. An R-F admittance bridge (or equivalent), operation at 1.0MHz, is connected successively to each signal pin in the device connector, with reference to the circuit- common node.
The signal applied during the measurement shall be biased to 0.5 Vdc.and shall be 0.4V peak to peak in amplitude.
The characteristics shall be determined in terms of a parallel combination of a conductance and a capacitive susceptance. The corresponding capacitance thus determined is the maximum signal capacitance referred to in clause 7.1.4."