The SPI Interfaces of the 71M65xx


This application note describes the SPI™ interfaces in the 71M6531–71M6534 and 71M6541–71M6545 electricity-metering ICs. The interface implements a system consisting of one master and one or more slave devices. Various operation modes are defined that differ in the definition of the clock-edge polarity and the type of clock edge used for PSDI and PSDO data. Read full article.