LT3094
Info : RECOMMENDED FOR NEW DESIGNS
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LT3094

−20V, 500mA, Ultralow Noise, Ultrahigh PSRR Negative Linear Regulator

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Info : RECOMMENDED FOR NEW DESIGNS tooltip
Info : RECOMMENDED FOR NEW DESIGNS tooltip
Part Models 14
1ku List Price Starting From $3.37
Features
  • Ultralow RMS Noise: 0.8µVRMS (10Hz to 100kHz)
  • Ultralow Spot Noise: 2.2nV/√Hz at 10kHz
  • Ultrahigh PSRR: 74dB at 1MHz
  • Output Current: 500mA
  • Wide Input Voltage Range: –1.8V to –20V
  • Single Capacitor Improves Noise and PSRR
  • 100µA SET Pin Current: ±1% Initial Accuracy
  • Single Resistor Programs Output Voltage
  • Programmable Current Limit
  • Low Dropout Voltage: 235mV
  • Output Voltage Range: 0V to –19.5V
  • Programmable Power Good and Fast Start-Up
  • Bipolar Precision Enable/UVLO Pin
  • VIOC Pin Controls Upstream Regulator to Minimize Power Dissipation and Optimize PSRR
  • Minimum Output Capacitor: 10µF Ceramic
  • 12-Lead MSOP and 3mm × 3mm DFN Packages
Additional Details
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The LT3094 is a high performance low dropout negative linear regulator featuring ADI’s ultralow noise and ultrahigh PSRR architecture for powering noise sensitive applications. The device can be easily paralleled to further reduce noise, increase output current and spread heat on a PCB.

The LT3094 supplies 500mA at a typical 235mV dropout voltage. Operating quiescent current is nominally 2.35mA and drops to 3µA in shutdown. The device’s wide output voltage range (0V to –19.5V) error amplifier operates in unity-gain and provides virtually constant output noise, PSRR, bandwidth, and load regulation independent of the programmed output voltage. Additional features are a bipolar enable pin, programmable current limit, fast startup capability and programmable power good to indicate output voltage regulation. The regulator incorporates a tracking function to control an upstream supply to maintain a constant voltage across the LT3094 to minimize power dissipation and optimize PSRR.

The LT3094 is stable with a minimum 10µF ceramic output capacitor. Built-in protection includes internal current limit with foldback and thermal limit with hysteresis. The LT3094 is available in thermally enhanced 12-Lead MSOP and 3mm × 3mm DFN Packages.

Applications

  • RF and Precision Power Supplies
  • Very Low Noise Instrumentation
  • High Speed/High Precision Data Converters
  • Medical Applications: Diagnostics and Imaging
  • Post-Regulator for Switching Supplies
Part Models 14
1ku List Price Starting From $3.37

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Documentation

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Mar 14, 2019

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Software & Part Ecosystem

Evaluation Kits 2

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DC2624A

LT3094 Demo Board | Ultralow Noise, Ultrahigh PSRR Negative RF LDO, −20V ≤ VIN ≤ −3.8V, VOUT = −3.3V@500mA

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DC2624A

LT3094 Demo Board | Ultralow Noise, Ultrahigh PSRR Negative RF LDO, −20V ≤ VIN ≤ −3.8V, VOUT = −3.3V@500mA

LT3094 Demo Board | Ultralow Noise, Ultrahigh PSRR Negative RF LDO, −20V ≤ VIN ≤ −3.8V, VOUT = −3.3V@500mA

Product Detail

Demonstration circuit 2624A features the LT3094, an ultralow noise, ultrahigh power supply rejection ratio (PSRR) negative low dropout (LDO) regulator. DC2624A operates over an input range of –3.8V to –20V, and can deliver up to 500mA output current. It features ultralow noise (0.8µVRMS from 10Hz to 100kHz) and very high PSRR (75dB at 1MHz).

The LT3094 enable function (EN/UVLO pin) is bidirectional and can be controlled with either a positive or a negative voltage. The LT3094 also offers programmable current limit functionality by connecting a resistor from ILIM to GND. Current monitoring is also achieved by sensing the ILIM pin voltage. The VIOC tracking function controls an upstream switching converter to maintain a constant voltage across the regulator and, hence, minimize power dissipation. The power good feedback (PGFB) pin is used to set a programmable power good threshold, and activates the fast start-up circuitry. To use the power good function, connect an external voltage source at VEXT. If power good and fast start-up functionality are not needed, tie PGFB to IN.

Built-in protection includes reverse battery protection, reverse current protection, internal current limit with foldback, and thermal limit with hysteresis.

The LT3094 data sheet gives a complete description of the part, operation and applications information. The data sheet must be read in conjunction with this demo manual for demonstration circuit DC2624A. The LT3094 is assembled in 12-lead MSOP and 3mm × 3mm DFN packages with an exposed pad on the bottom-side of the IC. Proper board layout is essential for maximum thermal performance.

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SCP-LT3094-EVALZ

LT3094 Signal Chain Evaluation Board | 500mA Ultra Low Noise Negative LDO

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SCP-LT3094-EVALZ

LT3094 Signal Chain Evaluation Board | 500mA Ultra Low Noise Negative LDO

LT3094 Signal Chain Evaluation Board | 500mA Ultra Low Noise Negative LDO

Product Detail

Demonstration circuit SCP-LT3094-EVALZ features the LT3094, an ultralow noise, ultrahigh power supply rejection ratio (PSRR) negative low dropout (LDO) regulator. The board operates over an input range of –3.8V to –20V, and can deliver up to 500mA output current.

Like all boards in the Signal Chain Power series, this board is designed to be easily plugged into other SCP boards to form a complete signal chain power system, enabling fast evaluation of low power signal chains. To evaluate this board, some universal SCP hardware is required, namely:

  • SCP-INPUT-EVALZ
  • SCP-OUTPUT-EVALZ
  • SCP-1X5BKOUT-EVALZ
  • SCP-THRUBRD-EVALZ
  • SCP-FILTER-EVALZ
  • SCP-1X2BKOUT-EVALZ
  • SCP-5X1-EVALZ

 

To properly evaluate SCP series demo boards, you will need the SCP Configurator companion software. SCP Configurator can help you choose the right board and topology for your design.

Note that the Demo Manual does not cover details important to the operation and configuration regarding the LT3094. Please refer to the LT3094 data sheet for a complete description of the part.

Tools & Simulations 1

LTspice® is a powerful, fast and free simulation software, schematic capture and waveform viewer with enhancements and models for improving the simulation of analog circuits.

To launch ready-to-run LTspice demonstration circuits for this part:

Step 1: Download and install LTspice on your computer.

Step 2: Click on the link in the section below to download a demonstration circuit.

Step 3: If LTspice does not automatically open after clicking the link below, you can instead run the simulation by right clicking on the link and selecting “Save Target As.” After saving the file to your computer, start LTspice and open the demonstration circuit by selecting ‘Open’ from the ‘File’ menu.

Reference Designs 2

Figure 1. CN0585 Simplified Block Diagram

Quad Channel, Low Latency, Data Acquisition and Signal Generation Module

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CN0585

Quad Channel, Low Latency, Data Acquisition and Signal Generation Module

CN0585

Circuits from the lab

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Quad Channel, Low Latency, Data Acquisition and Signal Generation Module

Features and Benefits

  • 4 Analog Input Channels with Configurable Voltage Ranges
  • 4 Analog Output Channels with Configurable Voltage Ranges
  • 200 ns Latency between ADC Measurement and DAC Settling
  • Analog Front End Interface Connector
  • Modeling and Simulation Compatible with MATLAB and Python
  • FMC Connector Interface to FPGA
View Detailed Reference Design external link

Design & Integration Tools

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32.13 M

Figure 1. CN0577 Simplified Block Diagram

Analog Front End and Digital Interface for Serial LVDS SAR ADCs

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CN0577

Analog Front End and Digital Interface for Serial LVDS SAR ADCs

CN0577

Circuits from the lab

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Analog Front End and Digital Interface for Serial LVDS SAR ADCs

Features and Benefits

  • 18-Bit Resolution, 15 MSPS Data Acquisition System
  • Arbitrary Voltage Inputs Supported
  • All Clocking and Power Requirements are Onboard
  • FMC Connector for FPGA Interfacing
View Detailed Reference Design external link

Design & Integration Tools

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6.81 M

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