AD9650
16-Bit, 25 MSPS/65 MSPS/80 MSPS/105 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC)
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Features
- 1.8 V analog supply operation
- 1.8 V CMOS or LVDS output supply
- SNR
- 82 dBFS at 30 MHz input and 105 MSPS data rate
- 83 dBFS at 9.7 MHz input and 25 MSPS data rate
- SFDR
- 90 dBc at 30 MHz input and 105 MSPS data rate
- 95 dBc at 9.7 MHz input and 25 MSPS data rate
- Low power
- 328 mW per channel at 105 MSPS
- 119 mW per channel at 25 MSPS
- Integer 1-to-8 input clock divider
- See data sheet for additional features
- Download AD9650-EP data sheet (pdf)
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The AD9650 is a dual, 16-bit, 25 MSPS/65 MSPS/80 MSPS/ 105 MSPS analog-to-digital converter (ADC) designed for digitizing high frequency, wide dynamic range signals with input frequencies of up to 300 MHz.
The dual ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth, differential sample-and-hold analog input amplifiers, and shared integrated voltage reference, which eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance.
The ADC output data can be routed directly to the two external 16-bit output ports or multiplexed on a single 16-bit bus. These outputs can be set to either 1.8 V CMOS or LVDS.
Flexible power-down options allow significant power savings, when desired.
Programming for setup and control is accomplished using a 3-wire SPI-compatible serial interface.
The AD9650 is available in a 64-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.
PRODUCT HIGHLIGHTS
- On-chip dither option for improved SFDR performance with low power analog input.
- Proprietary differential input that maintains excellent SNR performance for input frequencies up to 300 MHz.
- Operation from a single 1.8 V supply and a separate digital output driver supply accommodating 1.8 V CMOS or LVDS outputs.
- Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock DCS, power-down, and test modes.
- Pin compatible with the AD9268 and other dual families, AD9269, AD9251, AD9231, and AD9204. This allows a simple migration across resolutions and bandwidth.
APPLICATIONS
- Industrial instrumentation
- X-Ray, MRI, and ultrasound equipment
- High speed pulse acquisition
- Chemical and spectrum analysis
- Direct conversion receivers
- Multimode digital receivers
- Smart antenna systems
- General-purpose software radios
Ask a Question
Submit your question below and we will return the best answer from ADI’s knowledge database:
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Support
Analog Devices Support Portal is a one-stop shop to answer all your ADI questions.
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AD9650
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Application Note 7
AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs (Rev.0)
AN-807: Multicarrier WCDMA Feasibility (Rev.0)
AN-808: Multicarrier CDMA2000 Feasibility (Rev.0)
AN-812: MicroController-Based Serial Port Interface (SPI) Boot Circuit (Rev.0)
AN-878: High Speed ADC SPI Control Software (Rev.A)
AN-586: LVDS Outputs for High Speed A/D Converters (Rev.0)
AN-1142: Techniques for High Speed ADC PCB Layout
Technical Articles 1
Evaluation Design File 2
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
- AD9650BCPZ-105
- Pin/Package Drawing
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64-Lead LFCSP (9mm x 9mm w/ EP)
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Material Declaration
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HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
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Ultra Librarian
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SamacSys
- AD9650BCPZ-25
- Pin/Package Drawing
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64-Lead LFCSP (9mm x 9mm w/ EP)
- Documentation
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HTML
Material Declaration
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HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
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Ultra Librarian
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SamacSys
- AD9650BCPZ-65
- Pin/Package Drawing
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64-Lead LFCSP (9mm x 9mm w/ EP)
- Documentation
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HTML
Material Declaration
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HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
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Ultra Librarian
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SamacSys
- AD9650BCPZ-80
- Pin/Package Drawing
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64-Lead LFCSP (9mm x 9mm w/ EP)
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HTML
Material Declaration
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HTML
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Ultra Librarian
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SamacSys
- AD9650BCPZRL7-105
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64-Lead LFCSP (9mm x 9mm w/ EP)
- Documentation
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HTML
Material Declaration
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HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
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Ultra Librarian
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SamacSys
- AD9650BCPZRL7-25
- Pin/Package Drawing
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64-Lead LFCSP (9mm x 9mm w/ EP)
- Documentation
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HTML
Material Declaration
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HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
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Ultra Librarian
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SamacSys
- AD9650BCPZRL7-65
- Pin/Package Drawing
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64-Lead LFCSP (9mm x 9mm w/ EP)
- Documentation
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HTML
Material Declaration
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HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
-
Ultra Librarian
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SamacSys
- AD9650BCPZRL7-80
- Pin/Package Drawing
-
64-Lead LFCSP (9mm x 9mm w/ EP)
- Documentation
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HTML
Material Declaration
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HTML
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Ultra Librarian
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Product Lifecycle
PCN
Jun 9, 2021
- 20_0126
Conversion of Select Sizes LFCSP Products from Punched to Sawn and Transfer of Assembly Site to ASE Korea
AD9650BCPZ-105
PRODUCTION
AD9650BCPZ-25
PRODUCTION
AD9650BCPZ-65
PRODUCTION
AD9650BCPZ-80
PRODUCTION
AD9650BCPZRL7-105
PRODUCTION
AD9650BCPZRL7-25
PRODUCTION
AD9650BCPZRL7-65
PRODUCTION
AD9650BCPZRL7-80
PRODUCTION
Dec 23, 2015
- 14_0247
Assembly Transfer of Selected 12x12 TQFP_EP Pre-Plated Frame (PPF) Products to Amkor Philippines
AD9650USVZ-105EP
PRODUCTION
AD9650USVZR7-105EP
PRODUCTION
Filter by Model
Part Models
Product Lifecycle
PCN
Jun 9, 2021
- 20_0126
Conversion of Select Sizes LFCSP Products from Punched to Sawn and Transfer of Assembly Site to ASE Korea
AD9650BCPZ-105
PRODUCTION
AD9650BCPZ-25
PRODUCTION
AD9650BCPZ-65
PRODUCTION
AD9650BCPZ-80
PRODUCTION
AD9650BCPZRL7-105
PRODUCTION
AD9650BCPZRL7-25
PRODUCTION
AD9650BCPZRL7-65
PRODUCTION
AD9650BCPZRL7-80
PRODUCTION
Dec 23, 2015
- 14_0247
Assembly Transfer of Selected 12x12 TQFP_EP Pre-Plated Frame (PPF) Products to Amkor Philippines
AD9650USVZ-105EP
PRODUCTION
AD9650USVZR7-105EP
PRODUCTION
Software & Part Ecosystem
| Parts | Product Life Cycle | Description | ||
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Clock Distribution Devices3 |
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RECOMMENDED FOR NEW DESIGNS |
800 MHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs |
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RECOMMENDED FOR NEW DESIGNS |
1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs |
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RECOMMENDED FOR NEW DESIGNS |
1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Two Outputs |
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Clock Generation Devices3 |
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RECOMMENDED FOR NEW DESIGNS |
1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs |
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RECOMMENDED FOR NEW DESIGNS |
1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs |
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RECOMMENDED FOR NEW DESIGNS |
1.2 GHz Clock Distribution IC, Two 1.6 GHz Inputs, Dividers, Delay Adjust, Five Outputs |
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Digital Control VGAs2 |
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RECOMMENDED FOR NEW DESIGNS |
Ultralow Distortion IF Dual VGA |
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RECOMMENDED FOR NEW DESIGNS |
41 dB Range, 1 dB Step Size, Programmable Dual VGA |
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Fully Differential Amplifiers2 |
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RECOMMENDED FOR NEW DESIGNS |
2.9 GHz Ultralow Distortion RF/IF Differential Amplifier |
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RECOMMENDED FOR NEW DESIGNS |
3.3 GHz Ultralow Distortion RF/IF Differential Amplifier |
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Single-Ended to Differential Amplifiers2 |
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RECOMMENDED FOR NEW DESIGNS |
Ultralow Distortion Differential ADC Driver (Dual) |
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RECOMMENDED FOR NEW DESIGNS |
Ultralow Distortion Differential ADC Driver (Dual) |
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Can't find the software or driver you need?
Request a Driver/SoftwareEvaluation Kits 2
HSC-ADC-EVALCZ
FPGA-Based Data Capture Kit
Features and Benefits
- 64kB FIFO Depth
- Works with single and multi-channel ADCs
- Use with VisualAnalog® software
- Based on Virtex-4 FPGA
- May require adaptor to interface with some ADC eval boards
- Allows programming of SPI control Up to 644 MSPS SDR / 800MSPS DDR Encode Rates on each channel
- DDR Encode Rates on each channel
Product Detail
Resources
Software
ZIP
29.79 M
ZIP
ZIP
EVAL-AD9650
AD9650 Evaluation Board
Features and Benefits
- Full featured evaluation board for the AD9650
- SPI interface for setup and control
- External, on-board oscillator, or AD9517 clocking options
- Balun/transformer or amplifier input drive options
- LDO regulator or switching power supply options
- VisualAnalog® and SPI controller software interfaces
Product Detail
This page contains evaluation board documentation and ordering information for evaluating the AD9650.
The AD9650-105EBZ is an evaluation board for the AD9650, dual 16-bit ADC. This reference design provides all of the support circuitry to operate devices in their various modes and configurations. It is designed to interface directly with the HSC-ADC-EVALCZ data capture card, allowing users to download captured data for analysis. The Visual Analog software package, which is used to interface with the device's hardware, allows users to download captured data for analysis with a user-friendly graphical interface. The SPI controller software package is also compatible with this hardware and allows the user to access the SPI programmable features of the AD9650.
The AD9650 data sheet provides additional information related to device configuration and performance and should be consulted when using these tools. All documents and Visual Analog and SPI Controller are available at the High Speed ADC Evaluation Boards page. For additional information or questions, please email highspeed.converters@analog.com.
Resources
2699 kB
Tools & Simulations 5
Virtual Eval - BETA
S-Parameter 1
S-Parameter
IBIS Model 1
Visual Analog
MathWorks® 1
