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AD9525: Low Jitter Clock Generator with Eight LVPECL Outputs Data Sheet (Rev. A)10/11/2012PDF1296 kB
Overview
Features and Benefits
- Integrated ultra low noise synthesizer
- 8 differential 3.6 GHz LVPECL outputs and 1 LVPECL or 2 CMOS SYNC Outputs
- 2 differential reference inputs and 1 single-ended reference inputs
Product Details
The AD9525 is designed to support converter clock requirements for long-term evolution (LTE) and multicarrier GSM base station designs.The AD9525 provides a low power, multioutput, clock distribution function with low jitter performance, along with an on-chip PLL that can be used with an external VCO or VCXO. The VCO input and eight LVPECL outputs can operate up to a frequency of 3.6 GHz. All outputs share a common divider that can provide a division of 1 to 6.
The AD9525 offers a dedicated output that can be used to provide a programmable signal for resetting or synchronizing a data converter. The output signal is activated by a SPI write.
The AD9525 is available in a 48-lead LFCSP and can be operated from a single 3.3 V supply. The external VCXO or VCO can have an operating voltage of up to 5.5 V.
The AD9525 operates over the extended industrial temperature range of −40°C to +85°C.
Applications- LTE and multicarrier GSM base stations
- Clocking high speed ADCs, DACs
- ATE and high performance instrumentation
- 40/100Gb/s OTN Line Side Clocking
- Cable/DOCSIS CMTS Clocking
- Test and Measurement
Product Categories
Markets and Technologies
Product Lifecycle
Recommended for New Designs
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Evaluation Kits (1)
Documentation & Resources
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AD9525 Evaluation Board User Guide4/23/2014WIKI
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RF, Microwave, and Millimeter Wave Product Selection Guide7/13/2018PDF9M
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JESD204B vs. Serial LVDS Interface Considerations for Wideband Data Converter Applications8/1/2019
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Slay Your System Dragons with JESD204B8/1/2019
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High Speed Converter Survival Guide: Digital Data Outputs8/1/2019
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Clocking Wideband GSPS JESD204B ADCs8/1/2015
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A Test Method for Synchronizing Multiple GSPS Converters2/1/2015
Tools & Simulations
IBIS Models
Design Tools
ADIsimCLK Design and Evaluation Software
ADIsimCLK is the design tool developed specifically for Analog Devices' range of ultra-low jitter clock distribution and clock generation products. Whether your application is in wireless infrastructure, instrumentation, networking, broadband, ATE or other areas demanding predictable clock performance, ADIsimCLK will enable you to rapidly develop, evaluate and optimize your design.
Design Resources
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.
PCN-PDN Information
Support & Discussions
AD9525 Discussions
Sample & Buy
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Evaluation Boards
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Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.