AD9510
Info : RECOMMENDED FOR NEW DESIGNS
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AD9510

1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs

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Info : RECOMMENDED FOR NEW DESIGNS tooltip
Info : RECOMMENDED FOR NEW DESIGNS tooltip
Part Details
Part Models 2
1ku List Price Starting From $8.20
Features
  • Low phase noise phase-locked loop core
    • Reference input frequencies to 250 MHz
    • Programmable dual modulus prescaler
    • Programmable charge pump (CP) current
    • Separate CP supply (VCPS) extends tuning range
  • Two 1.6 GHz, differential clock inputs
  • 8 programmable dividers, 1 to 32, all integers
  • Phase select for output-to-output coarse delay adjust
  • 4 independent 1.2 GHz LVPECL outputs
    • Additive output jitter of 225 fs rms
  • 4 independent 800 MHz low voltage differential signaling
    • (LVDS) or 250 MHz complementary metal oxide conductor
    • (CMOS) clock outputs
    • Additive output jitter of 275 fs rms
    • Fine delay adjust on 2 LVDS/CMOS outputs
  • Serial control port
  • Space-saving 64-lead LFCSP
Additional Details
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The AD9510 provides a multi-output clock distribution function along with an on-chip phase-locked loop (PLL) core. The design emphasizes low jitter and phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements also benefit from this device.

The PLL section consists of a programmable reference divider (R); a low noise, phase frequency detector (PFD); a precision charge pump (CP); and a programmable feedback divider (N). By connecting an external voltage-controlled crystal oscillator (VCXO) or voltage-controlled oscillator (VCO) to the CLK2 and CLK2B pins, frequencies of up to 1.6 GHz can be synchronized to the input reference.

There are eight independent clock outputs. Four outputs are low voltage positive emitter-coupled logic (LVPECL) at 1.2 GHz, and four are selectable as either LVDS (800 MHz) or CMOS (250 MHz) levels.

Each output has a programmable divider that can be bypassed or set to divide by any integer up to 32. The phase of one clock output relative to another clock output can be varied by means of a divider phase select function that serves as a coarse timing adjustment. Two of the LVDS/CMOS outputs feature programmable delay elements with full-scale ranges up to 8 ns of delay. This fine tuning delay block has 5-bit resolution, giving 25 possible delays from which to choose for each full-scale setting (Register 0x36 and Register 0x3A = 00000b to 11000b).

The AD9510 is ideally suited for data converter clocking applications where maximum converter performance is achieved by encode signals with subpicosecond jitter.

The AD9510 is available in a 64-lead LFCSP and can be operated from a single 3.3 V supply. An external VCO, which requires an extended voltage range, can be accommodated by connecting the charge pump supply (VCP) to 5.5 V. The temperature range is −40°C to +85°C.

Applications

  • Low jitter, low phase noise clock distribution
  • Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, and mixed-signal front ends (MxFEs)
  • High performance wireless transceivers
  • High performance instrumentation
  • Broadband infrastructure
Part Models 2
1ku List Price Starting From $8.20

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Documentation

Documentation

Part Model Pin/Package Drawing Documentation CAD Symbols, Footprints, and 3D Models
AD9510BCPZ
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AD9510BCPZ-REEL7
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Product Lifecycle

PCN

Oct 9, 2013

- 13_0165

AD9510 data sheet update

AD9510BCPZ

PRODUCTION

AD9510BCPZ-REEL7

PRODUCTION

Filter by Model

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Part Models

Product Lifecycle

PCN

Oct 9, 2013

- 13_0165

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AD9510 data sheet update

AD9510BCPZ

PRODUCTION

AD9510BCPZ-REEL7

PRODUCTION

Software & Part Ecosystem

Software & Part Ecosystem

Evaluation Kit

Evaluation Kits 1

EVAL-AD9510

AD9510 Evaluation Board

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EVAL-AD9510

AD9510 Evaluation Board

AD9510 Evaluation Board

Product Detail

The user guide describes the AD9510 evaluation board hardware and software. The software provides a graphical user interface (GUI) for easy interface with the various on- chip functions of the AD9510. This allows for a thorough exploration and evaluation of the AD9510’s operation, performance, and capabilities. Note that the AD9510 evaluation board software should be installed before connecting the AD9510 evaluation board to the PC.

The AD9510 is a highly sophisticated, performance clock distribution part with numerous user programmable functions. To use the evaluation board properly, see the current data sheet for the AD9510 on the Analog Devices website.

Note that the user guide includes instructions for both the AD9510/PCB and AD9510-VCO/PCB, which includes a 245.76 MHz VCXO and loop filter.

Tools & Simulations

Tools & Simulations 2

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