AD9268
16-Bit, 125 MSPS/105 MSPS/80 MSPS, 1.8 V Dual Analog-to-Digital Converter
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Features
- SNR = 78.2 dBFS @ 70 MHz and 125 MSPS
- SFDR = 88 dBc @ 70 MHz and 125 MSPS
- Low power: 750 mW @ 125 MSPS
- 1.8 V analog supply operation
- 1.8 V CMOS or LVDS output supply
- Integer 1-to-8 input clock divider
- IF sampling frequencies to 300 MHz
- −153.6 dBm/Hz small-signal input noise with 200 Ω input impedance @ 70 MHz and 125 MSPS
- Optional on-chip dither
- Programmable internal ADC voltage reference
- See data sheet for additional features
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The AD9268 is a dual, 16-bit, 80 MSPS/105 MSPS/125 MSPS analog-to-digital converter (ADC). The AD9268 is designed to support communications applications where high performance, combined with low cost, small size, and versatility, is desired.
The dual ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth, differential sample-and-hold analog input amplifiers that support a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance.
The ADC output data can be routed directly to the two external 16-bit output ports. These outputs can be set to either 1.8 V CMOS or LVDS.
Flexible power-down options allow significant power savings, when desired.
Programming for setup and control is accomplished using a 3-wire SPI-compatible serial interface.
The AD9268 is available in a 64-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.
PRODUCT HIGHLIGHTS
- On-chip dither option for improved SFDR performance with low power analog input.
- Proprietary differential input that maintains excellent SNR performance for input frequencies up to 300 MHz.
- Operation from a single 1.8 V supply and a separate digital output driver supply accommodating 1.8 V CMOS or LVDS outputs.
- Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock DCS, power-down, test modes, and voltage reference mode.
- Pin compatibility with the AD9258, allowing a simple migration from 16 bits to 14 bits. The AD9268 is also pin compatible with the AD9251, AD9231, and AD9204 family of products for lower sample rate, low power applications.
APPLICATIONS
- Communications
- Diversity radio systems
- Multimode digital receivers (3G)
- GSM, EDGE, W-CDMA, LTE,
- CDMA2000, WiMAX, TD-SCDMA
- I/Q demodulation systems
- Smart antenna systems
- General-purpose software radios
- Broadband data applications
- Ultrasound equipment
Ask a Question
Submit your question below and we will return the best answer from ADI’s knowledge database:
Search
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Support
Analog Devices Support Portal is a one-stop shop to answer all your ADI questions.
Visit the ADI Support Page
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AD9268
Documentation
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Documentation
Data Sheet 1
User Guide 2
Application Note 11
AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs (Rev.0)
AN-807: Multicarrier WCDMA Feasibility (Rev.0)
AN-808: Multicarrier CDMA2000 Feasibility (Rev.0)
AN-812: MicroController-Based Serial Port Interface (SPI) Boot Circuit (Rev.0)
AN-878: High Speed ADC SPI Control Software (Rev.A)
AN-586: LVDS Outputs for High Speed A/D Converters (Rev.0)
AN-742: Frequency Domain Response of Switched Capacitor ADCs
AN-905: VisualAnalog™ Converter Evaluation Tool Version 1.0 User Manual
AN-935: Designing an ADC Transformer-Coupled Front End
AN-1211: Powering the AD9268 Dual Channel 16-Bit, 125 MSPS Analog-to-Digital Converter with the ADP2114 Synchronous Step-Down DC-to-DC Regulator for Increased Efficiency
AN-1142: Techniques for High Speed ADC PCB Layout
Technical Articles 1
Evaluation Design File 3
Circuit Note 1
Analog Dialogue 1
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
| Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
|---|---|---|---|
| AD9268BCPZ-105 |
64-Lead LFCSP (9mm x 9mm w/ EP)
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| AD9268BCPZ-125 |
64-Lead LFCSP (9mm x 9mm w/ EP)
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| AD9268BCPZ-80 |
64-Lead LFCSP (9mm x 9mm w/ EP)
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| AD9268BCPZRL7-105 |
64-Lead LFCSP (9mm x 9mm w/ EP)
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| AD9268BCPZRL7-125 |
64-Lead LFCSP (9mm x 9mm w/ EP)
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| AD9268BCPZRL7-80 |
64-Lead LFCSP (9mm x 9mm w/ EP)
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- AD9268BCPZ-105
- Pin/Package Drawing
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64-Lead LFCSP (9mm x 9mm w/ EP)
- Documentation
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HTML
Material Declaration
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HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
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Ultra Librarian
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SamacSys
- AD9268BCPZ-125
- Pin/Package Drawing
-
64-Lead LFCSP (9mm x 9mm w/ EP)
- Documentation
-
HTML
Material Declaration
-
HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
-
Ultra Librarian
-
SamacSys
- AD9268BCPZ-80
- Pin/Package Drawing
-
64-Lead LFCSP (9mm x 9mm w/ EP)
- Documentation
-
HTML
Material Declaration
-
HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
-
Ultra Librarian
-
SamacSys
- AD9268BCPZRL7-105
- Pin/Package Drawing
-
64-Lead LFCSP (9mm x 9mm w/ EP)
- Documentation
-
HTML
Material Declaration
-
HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
-
Ultra Librarian
-
SamacSys
- AD9268BCPZRL7-125
- Pin/Package Drawing
-
64-Lead LFCSP (9mm x 9mm w/ EP)
- Documentation
-
HTML
Material Declaration
-
HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
-
Ultra Librarian
-
SamacSys
- AD9268BCPZRL7-80
- Pin/Package Drawing
-
64-Lead LFCSP (9mm x 9mm w/ EP)
- Documentation
-
HTML
Material Declaration
-
HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
-
Ultra Librarian
-
SamacSys
Filter by Model
Part Models
Product Lifecycle
PCN
Jun 9, 2021
- 20_0126
Conversion of Select Sizes LFCSP Products from Punched to Sawn and Transfer of Assembly Site to ASE Korea
AD9268BCPZ-105
PRODUCTION
AD9268BCPZ-125
PRODUCTION
AD9268BCPZ-80
PRODUCTION
AD9268BCPZRL7-105
PRODUCTION
AD9268BCPZRL7-125
PRODUCTION
AD9268BCPZRL7-80
PRODUCTION
Filter by Model
Part Models
Product Lifecycle
PCN
Jun 9, 2021
- 20_0126
Conversion of Select Sizes LFCSP Products from Punched to Sawn and Transfer of Assembly Site to ASE Korea
AD9268BCPZ-105
PRODUCTION
AD9268BCPZ-125
PRODUCTION
AD9268BCPZ-80
PRODUCTION
AD9268BCPZRL7-105
PRODUCTION
AD9268BCPZRL7-125
PRODUCTION
AD9268BCPZRL7-80
PRODUCTION
Software & Part Ecosystem
| Parts | Product Life Cycle | Description | ||
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Baseband Programmable VGA-Filters1 |
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Obsolete |
31 MHz, Dual Programmable Filters and Variable Gain Amplifiers |
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Clock Distribution Devices3 |
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RECOMMENDED FOR NEW DESIGNS |
800 MHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs |
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RECOMMENDED FOR NEW DESIGNS |
1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs |
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RECOMMENDED FOR NEW DESIGNS |
1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Two Outputs |
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Clock Generation Devices3 |
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RECOMMENDED FOR NEW DESIGNS |
1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs |
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RECOMMENDED FOR NEW DESIGNS |
1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs |
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RECOMMENDED FOR NEW DESIGNS |
1.2 GHz Clock Distribution IC, Two 1.6 GHz Inputs, Dividers, Delay Adjust, Five Outputs |
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Digital Control VGAs2 |
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RECOMMENDED FOR NEW DESIGNS |
41 dB Range, 1 dB Step Size, Programmable Dual VGA |
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RECOMMENDED FOR NEW DESIGNS |
Ultralow Distortion IF Dual VGA |
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Fully Differential Amplifiers2 |
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RECOMMENDED FOR NEW DESIGNS |
2.9 GHz Ultralow Distortion RF/IF Differential Amplifier |
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RECOMMENDED FOR NEW DESIGNS |
3.3 GHz Ultralow Distortion RF/IF Differential Amplifier |
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Gain Blocks2 |
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RECOMMENDED FOR NEW DESIGNS |
20 MHz TO 1.0 GHz IF Gain Block |
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RECOMMENDED FOR NEW DESIGNS |
20 MHz TO 1.0 GHz IF Gain Block |
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Multiple Output Buck Regulators1 |
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PRODUCTION |
Configurable, Dual 2 A/Single 4 A, Synchronous Step-Down DC-to-DC Regulator |
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Single-Ended to Differential Amplifiers2 |
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RECOMMENDED FOR NEW DESIGNS |
Ultralow Distortion Differential ADC Driver (Dual) |
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RECOMMENDED FOR NEW DESIGNS |
Ultralow Distortion Differential ADC Driver (Dual) |
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Can't find the software or driver you need?
Request a Driver/SoftwareEvaluation Kits 2
HSC-ADC-EVALCZ
FPGA-Based Data Capture Kit
Features and Benefits
- 64kB FIFO Depth
- Works with single and multi-channel ADCs
- Use with VisualAnalog® software
- Based on Virtex-4 FPGA
- May require adaptor to interface with some ADC eval boards
- Allows programming of SPI control Up to 644 MSPS SDR / 800MSPS DDR Encode Rates on each channel
- DDR Encode Rates on each channel
Product Detail
Resources
Software
ZIP
29.79 M
ZIP
ZIP
EVAL-AD9268
AD9268 Evaluation Board
Features and Benefits
- Full featured evaluation board for the AD9650/AD9268/AD9258/AD9251/AD9231/AD9204/AD9269/AD6659
- SPI interface for setup and control
- External, on-board oscillator, or AD9517 clocking options
- Balun/transformer or amplifier input drive options
- LDO regulator or switching power supply options
- VisualAnalog® and SPI controller software interfaces
Product Detail
This page contains evaluation board documentation and ordering information for evaluating the AD9268.
The AD9268-125EBZ is an evaluation board for the AD9268, dual 16-bit ADC. This reference design provides all of the support circuitry to operate devices in their various modes and configurations. It is designed to interface directly with the HSC-ADC-EVALCZ data capture card, allowing users to download captured data for analysis. The Visual Analog software package, which is used to interface with the device's hardware, allows users to download captured data for analysis with a user-friendly graphical interface. The SPI controller software package is also compatible with this hardware and allows the user to access the SPI programmable features of the AD9268.
The AD9268 data sheet provides additional information related to device configuration and performance and should be consulted when using these tools. All documents and Visual Analog and SPI Controller are available at the High Speed ADC Evaluation Boards page. For additional information or questions, please email highspeed.converters@analog.com.
Resources
2699 kB
Tools & Simulations 5
Virtual Eval - BETA
IBIS Model 1
IBIS Model
Visual Analog
ADIsimRF
MathWorks® 1
Reference Designs 1
CN0171
Low Noise, Low Distortion Single-Ended Input Drive Circuit for Differential Input IF Sampling ADCs
Circuits from the lab
Info:Circuits from the lab
