AD9083
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AD9083

16-Channel, 125 MHz Bandwidth, JESD204B Analog-to-Digital Converter

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Info : RECOMMENDED FOR NEW DESIGNS tooltip
Info : RECOMMENDED FOR NEW DESIGNS tooltip
Part Details
Part Models 2
1ku List Price Starting From $326.33
Features
  • 1.0 V and 1.8 V supply operation
  • 125 MHz usable analog input bandwidth
  • Sample rate up to 2 GSPS
  • Noise spectral density in 100 MHz bandwidth = −145 dBFS/Hz, 2.0 GSPS encode
  • SNR = 66 dBFS in 100 MHz bandwidth, 2.0 GSPS encode
  • SNR = 82 dBFS in 15.625 MHz bandwidth, 2.0 GSPS encode
  • SFDR = 60 dBc in 100 MHz bandwidth, 2.0 GSPS encode
  • SFDR = 80 dBc in 15.625 MHz bandwidth, 2.0 GSPS encode
  • Large signal dither
  • 90 mW total power per channel at 2.0 GSPS (default settings), 35 mW power per channel (min)
  • Flexible input range: 0.5 V p-p to 2 V p-p differential
  • 90 dB channel crosstalk, 2.0 GSPS encode
  • Digital processor
    • CIC decimation filter
    • Programmable DDC
    • Data gating
  • JESD204B subclass 1 encoded outputs
    • Supports up to 16Gbps/lane
    • Flexible sample data processing
    • Flexible JESD204B lane configurations
  • Serial port control
Additional Details
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The AD9083 is a 16-channel, 125 MHz bandwidth, continuous time Σ-Δ (CTSD) ADC. The device features an on-chip, programmable, single-pole antialiasing filter and termination resistor that is designed for low power, small size, and ease of use.

The 16 ADC cores features a first-order, CTSD modulator architecture with integrated, background nonlinearity correction logic and self cancelling dither. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations.

The analog input and clock signals are differential inputs. Each ADC has a signal processing tile to filter out of band shaped noise from the Σ-Δ ADC and reduce the sample rate. Each tile contains a cascaded integrator comb (CIC) filter, a quadrature digital downconverter (DDC) with multiple finite input response (FIR) decimation filters (decimate by J block), or up to three quadrature DDC channels with averaging decimation filters for data gating applications.

Users can configure the Subclass 1 JESD204B based, high speed serialized output in a variety of lane configurations (up to four), depending on the DDC configuration and the acceptable lane rate of the receiving logic device. Multiple device synchronization is supported through the SYSREF±, TRIG±, and SYNCINB± input pins.

The AD9083 has flexible power-down options that allow significant power savings when desired. All of these features can be programmed using a 1.8 V capable 3-wire serial port interface (SPI).

The AD9083 is available in a Pb-free, 100-ball CSP_BGA and is specified over the −40°C to +85°C industrial temperature range.

This product is protected by a US patent.

APPLICATIONS

  • Millimeter wave imaging
  • Electronic beam forming and phased arrays
  • Multichannel wideband receivers
  • Electronic support measures

PRODUCT HIGHLIGHTS

  1. Continuous time, Σ-Δ analog-to-digital converters (ADCs) support signal bandwidths of up to 125 MHz with low power and minimal filtering.
  2. Integrated digital processing blocks reduce data payload and lower overall system cost.
  3. Configurable JESD204B interface reduces printed circuit board (PCB) complexity.
  4. Flexible power-down options.
  5. SPI interface controls various product features and functions to meet specific system requirements.
  6. Small, 9 mm × 9 mm, 100-ball CSP_BGA package, simple interface, and integrated digital processing save PCB space.
Part Models 2
1ku List Price Starting From $326.33

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Documentation

Documentation

Part Model Pin/Package Drawing Documentation CAD Symbols, Footprints, and 3D Models
AD9083BBCZ
  • HTML
  • HTML
AD9083BBCZ-RL7
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  • HTML
Software & Part Ecosystem

Software & Part Ecosystem

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Evaluation Kit

Evaluation Kits 2

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EVAL-AD9083

AD9083 Evaluation Board

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EVAL-AD9083

AD9083 Evaluation Board

AD9083 Evaluation Board

Features and Benefits

  • Fully functional evaluation board for the AD9083
  • PC software for control with ACE software
  • On-board clocking provided by the AD9528 manages device and FPGA clocking
  • Option to switch to external direct clocking

Product Detail

The AD9083EBZ evaluation board includes all of the support circuitry required to operate the AD9083 in various modes and configurations. The application software used to interface with the device is also described. The AD9083EBZ evaluation board connects to the Analog Devices, Inc., ADS8-V3EBZ for evaluation with the ACE software.

The ACE software allows the user to set up the AD9083 in various modes, and capture analog-to-digital converter (ADC) data for analysis.

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ADS8-V3EBZ

ADS8-V3EBZ FPGA Controller Board

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ADS8-V3EBZ

ADS8-V3EBZ FPGA Controller Board

ADS8-V3EBZ FPGA Controller Board

Features and Benefits

  • Xilinx Kintex UltraScale XCKU040-3FFVA1156E FPGA
  • Twenty (20) 16.375 Gbps transceivers supported by one (1) FMC+ connector
  • Dual-bank DDR4 SDRAM
  • Simple USB 3.0 serial port interface
  • One (1) micro SD card is included for high speed converter evaluation board support

Product Detail

When connected to a specified Analog Devices high speed converter evaluation board, the ADS8-V3EBZ works with ADI evaluation software as a data capture/transmit and control interface. Designed to support high speed data converters with JESD204B/C serial line rates up to 16.375 Gbps, the FPGA on the ADS8-V3EBZ acts as the data receiver for high speed ADC's, and as the transmitter for high speed DAC's.

Limited to use cases where lane rates are less than 16.375 Gbps due to the FPGA capability. (Applies to AD9081 and AD9082.)

Tools & Simulations

Tools & Simulations 4

LTspice® is a powerful, fast and free simulation software, schematic capture and waveform viewer with enhancements and models for improving the simulation of analog circuits.

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