AD5750-2
Info: : PRODUCTION
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AD5750-2

Industrial Current/Voltage Output Driver with Programmable Ranges

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Info: : PRODUCTION tooltip
Info: : PRODUCTION tooltip
Part Details
Part Models 2
1ku List Price Starting From $4.04
Features
  • Current output ranges:
    4 mA to 20 mA, 0 mA to 20 mA, 0 mA to 24 mA,
    ±20 mA, and ±24 mA
    ±0.03% full-scale range (FSR) total unadjusted error (TUE)
    ±5 ppm/°C typical output drift
  • Voltage output ranges:
    0 V to 5 V, 0 V to 10 V,
    ±5 V, and ±10 V with 20% overrange
    ±0.02% FSR TUE
    ±3 ppm/°C typical output drift
  • On-chip output fault detection
  • Packet error checking (PEC)
  • Asynchronous CLEAR function
  • Flexible power-up condition to 0 V or tristate
  • Power supply range
    AVDD: +12 V (± 10%) to
    +24 V (± 10%)
    AVSS: −12 V (± 10%) to
    −24 V (± 10%)
  • See data sheet for additional features
Additional Details
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The AD5750 / AD5750-1 / AD5750-2 are single-channel, low cost, precision voltage/current output drivers with hardware- or software-programmable output ranges. The software ranges are configured via an SPI-/MICROWIRE-compatible serial interface. The AD5750 / AD5750-1 / AD5750-2 target applications in PLC and industrial process control. The analog input to the AD5750 / AD5750-1 / AD5750-2 is provided from a low voltage, single-supply digital-to-analog converter (DAC) and is internally conditioned to provide the desired output current/voltage range. Analog input ranges available are 0 V to 2.5 V (AD5750-1/AD5750-2) or 0 V to 4.096 V (AD5750).

The output current range is programmable across five current ranges: 4 mA to 20 mA, 0 mA to 20 mA, 0 mA to 24 mA, ±20 mA, and ±24 mA. An overrange of 2% is available on the unipolar current ranges.

Voltage output is provided from a separate pin that can be configured to provide 0 V to 5 V, 0 V to 10 V, ±5 V, or ±10 V output ranges. An overrange of 20% is available on the voltage ranges.

Analog outputs are short-circuit and open-circuit protected and can drive capacitive loads of 1 μF and inductive loads of 0.1 H.

The devices are specified to operate with a power supply range from ±12 V to ±24 V. Output loop compliance is 0 V to AVDD − 2.75 V.

The flexible serial interface is SPI and MICROWIRE compatible and can operate in 3-wire mode to minimize the digital isolation required in isolated applications. The interface also features an optional PEC feature using CRC-8 error checking, useful in industrial environments where data communication corruption can occur.

The devices also include a power-on-reset function, ensuring that the devices power up in a known state (0 V or tristate), and an asynchronous CLEAR pin that sets the outputs to a zero scale/mid-scale voltage output or the low end of the selected current range.

The HW SELECT pin is used to configure the parts for hardware or software mode on power-up.

APPLICATIONS

  • Process controls
  • Actuator controls
  • PLCs
Part Models 2
1ku List Price Starting From $4.04

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Documentation

Documentation

Part Model Pin/Package Drawing Documentation CAD Symbols, Footprints, and 3D Models
AD5750-2BCPZ
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AD5750-2BCPZ-RL7
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Product Lifecycle

PCN

May 7, 2014

- 13_0192

AD5748/AD5750/AD5750-1/AD5750-2 Metal Edit and Reduced Package Type

Filter by Model

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Part Models

Product Lifecycle

PCN

May 7, 2014

- 13_0192

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AD5748/AD5750/AD5750-1/AD5750-2 Metal Edit and Reduced Package Type

Software & Part Ecosystem

Software & Part Ecosystem

Tools & Simulations

Tools & Simulations 1

Reference Designs

Reference Designs 1

Simplified Schematic of the Analog Output Circuit

4-Channel, Flexible, Configurable, Voltage, and Current Output Circuit for I/O Card and PLC Applications

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CN0229

4-Channel, Flexible, Configurable, Voltage, and Current Output Circuit for I/O Card and PLC Applications

CN0229

Circuits from the lab

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4-Channel, Flexible, Configurable, Voltage, and Current Output Circuit for I/O Card and PLC Applications

Features and Benefits

  • Quad channel Current and Voltage Outputs
  • 16-bit Resolution for PLC Systems
  • Digitally Isolated from Application
View Detailed Reference Design external link

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