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Evaluation Hardware

Part Numbers with "Z" indicate RoHS Compliance. Boards checked are needed to evaluate this circuit.

  • AD8368-EVALZ ($117.92) 800 MHz, Linear-in-dB VGA with AGC Detector
  • ADL5902-EVALZ ($123.29) 50 MHz to 9 GHz 65 dB TruPwr™ Detector
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Features & Benefits

  • Measures true rms power to 800MHz
  • 95dB detection range
  • Single supply

Circuit Function & Benefits

Figure 1. 95 dB RMS Responding RF Detector


The circuit in Figure 1 is a true rms responding power detector using a variable gain amplifier (VGA) and an rms-responding power detector to provide an extremely wide detection range of approximately 95 dB. RMS detectors are useful in many applications such as receivers and transmitters where accurate measurement of signal power is required. Because the circuit measures rms power, it is suitable for use in systems with diverse or varying crest factors. Examples of such systems include GSM/EDGE, CDMA, WCDMA, TD-SCDMA and LTE based wireless base stations along with any system that uses QAM modulation.

The detection range of the ADL5902 rms detector is 65 dB and is extended to 95 dB by the addition of the linear-in-dB AD8368 VGA. The ADL5902 TADJ function is used to provide temperature stability for the complete circuit. A SAW filter is placed between the VGA to reduce noise and increase sensitivity. This also reduces the frequency range of the circuit to the pass-band range of the SAW filter.

Circuit Description

The 65 dB range of the ADL5902 linear-in-dB true rms-responding RF detector can be extended using a stand-alone variable gain amplifier (VGA). The gain control input of the VGA is derived directly from the ADL5902 VOUT pin. This extends the dynamic range by the gain control range of the VGA (in practice the achieved range extension is slightly less). When this VGA also provides a linear-in-dB (exponential) gain control function, the overall measurement remains linearly scaled in decibels. The VGA gain must decrease with an increase in its gain bias in the same way as the ADL5902. All of these conditions are met by the AD8368. Figure 1 shows the circuit schematic.

The ADL5902 rms computation circuit uses a VGA leveling architecture. An internal linear-in-dB VGA with a negative gain control slope drives the input of a low-range rms detector. The output level of this detector is compared to the output of second setpoint detector using a current balancing architecture; one detector sources current and the other sinks current. If the output levels of the two detectors are not equal, the residual current charges or discharges a capacitor (capacitance is equal to the parallel combination of the internal 26 pF capacitance and the external capacitance on Pin 6 (CLPF) of the ADL5902. The integration increases or decreases the value of VOUT. With VOUT tied directly the gain control input of the ADL5902 VGA, this increases or decreases the VGA gain until the output levels from the two detectors are equal. When this point is reached, VOUT and the gain of the VGA settles. Because the ADL5902 VGA has a linear-in-dB transfer function, the resulting VOUT voltage is proportional to the log of the rms value of the input signal.

The detection range of the ADL5902 is primarily determined by the gain control range of its internal VGA. As the input signal decreases in size, VGA control voltage decrease until the VGA reaches maximum gain. For large and increasing input signals, the VGA gain control voltage increases (thereby decreasing the VGA gain) until minimum gain is reached.

Adding additional variable gain to the signal path extends the detection range of the circuit. The fed-back VOUT signal now drives both the ADL5902 VGA gain control input along with the gain control input of the AD8368 VGA. The AD8368 MODE pin must be tied low to make the gain control slope negative. Because the AD8368 VGA provides both gain and attenuation (GMAX = 22 dB GMIN = −12 dB), this extends the detection range at both the top and bottom end of the ADL5902 nominal range. However, to optimize the range extension, the voltage driving the gain control pin of the AD8368 must be correctly scaled.

While the nominal output voltage range of the ADL5902 rms detector is 0 V to 3.5 V, the AD8368 VGA requires a control voltage range from 0 V to 1 V to fully exercise its 34 dB gain control range. Therefore, the fed-back voltage from VOUT must be scaled down by a factor of 3.5. This is easily implemented using a resistor divider (R1 and R15 in Figure 1).

Figure 2 shows the resulting transfer function when the input power is swept at 167 MHz. Optimum linearity is achieved using a 4-point calibration with calibration points at +15 dBm, −15 dBm, −55 dB, and −70 dBm. A 2-point calibration can also be used, but results in degraded linearity across the input power range.

Note that the AD8368 on-board RF detector and automatic level control (ALC) function are not used in this circuit. Therefore, the DETI and DETO pins on the AD8368 can be left open.

Figure 2. Transfer Function of 95 dB RMS Responding RF Detector, Measured at 167 MHz


RF Input Power Sensitivity

To achieve the excellent sensitivity shown in Figure 2, a narrow-band filter must be placed between the VGA and the detector as shown in Figure 1. Without a filter, the broadband output noise of the AD8368 swamps the low-end sensitivity of the ADL5902. Figure 3 shows a screenshot of the output noise calculation of the AD8368 performed in ADIsimRF. The AD8368 VGA is at maximum gain when the smallest input signals are present. With a 3 dB bandwidth of 800 MHz and assuming a first order roll-off, an equivalent noise bandwidth of 1272 MHz (that is, 800 MHz times 1.57) was used to calculate the output noise power from the VGA. This results in an output noise power level of approximately −51 dBm, which is almost 10 dB above the nominal input sensitivity of the ADL5902. Therefore, some filtering is essential to maximize low-end sensitivity.

Figure 4 shows the same noise calculation when an EPCOS B5070 SAW filter is added to the circuit with a center frequency of 167 MHz. In this calculation, the analysis bandwidth has been reduced to be equal to the bandwidth of the SAW filter (18 MHz).

With the dramatic narrowing of the noise bandwidth along with the 7.3 dB insertion loss of the filter, the integrated output noise of the VGA/SAW combination drops dramatically to −77 dBm, well below the input sensitivity of the ADL5902 rms detector. This ensures that the circuit is not noise limited when the VGA is at its maximum gain.

Figure 3. ADIsimRF Calculation of Output Noise of the AD8368 VGA at Maximum Gain


Figure 4. ADIsimRF Calculation of Output Noise of the AD8368 VGA with 167 MHz SAW Filter with 18 MHz Bandwidth


Temperature Stability

The ADL5902 incorporates a temperature compensation function. By setting the voltage on the TADJ pin (Pin 1), the detector’s intercept temperature stability at a particular operating frequency can be optimized. In the range extension circuit shown in Figure 1, any temperature variations in the gain of the VGA will degrade the overall drift of the circuit one-for-one (i.e. a 1 dB drift vs. temperature in the gain of the VGA will degrade the overall temperature stability by 1 dB). In the case of the AD8368 VGA, Figure 5 in the AD8368 datasheet shows that the gain drifts vs. temperature by approximately ±0.7 dB. Note that the intercept of the VGA transfer function drifts (that is, gain drift error is constant at all gains). Therefore, the detector and the VGA have similar temperature drift signatures. By adjusting the voltage on the ADL5902 TADJ pin, the combined temperature drift of the detector and VGA can be compensated. For the 167 MHz operating frequency, it was experimentally determined that a TADJ voltage of 0.2 V provided the optimum temperature compensation that is achieved in Figure 2.

Common Variations

The circuit can be modified to accommodate a different center frequency, bandwidth, and filter insertion loss. As already noted, using the B5070 filter, the input noise to the ADL5902 is −77 dBm when the AD8368 VGA is a maximum gain. Increasing the bandwidth of the filter will increase the noise level. The output noise level of the VGA should ideally be kept below the input sensitivity level of the detector (approximately −60 dBm).

The center frequency of the filter can also be increased or decreased. Increases in the center frequency are ultimately limited by degradation in the linearity and gain control range of the AD8368 VGA, which has a 3 dB corner frequency of 800 MHz. A SAW filter with a lower center frequency can also be chosen, but low frequency operation is limited by the ADL5902, which operates at frequencies down to 50 MHz. This frequency limit is driven by internal ac-coupling in the ADL5902.

A discrete LC filter could be used as an alternative to the SAW filter. Consideration should be given to the bandwidth and insertion loss of the filter.

It is also possible to operate the circuit without a filter. However as already noted, this will significantly limit the low end sensitivity. Figure 5 shows a plot of output voltage vs. input power where no filter is used. The long non-linear arc in the output voltage and error plot at low input power levels indicates the decreasing input signal is being swamped by the noise of the VGA.

The matching network at the input of the AD8368 VGA (L1, R3) is not a narrowband matching circuit. Therefore if an operating frequency other than 167 MHz is chosen, it should remain in place.

Figure 5. Transfer Function of the Circuit with the SAW Filter Removed


As an alternative to the ADL5902, the ADL5906 linear-in-dB rms detector could also be used. However, the temperature compensation function in this device compensates the temperature drift of the detector’s SLOPE (the ADL5902 TADJ function compensates for INTERCEPT drift). Since the temperature drift of the AD8368 VGA is primarily INTERCEPT-based, the ADL5906 temperature compensation function does not reduce the contribution of the VGA to the overall temperature drift.

The operating frequency range of the circuit can be expanded using a broadband front-end mixer and frequency agile PLL synthesizer. In this case, the frequency to be measured is mixed down to the center frequency of the SAW filter. The operating frequency range of such a circuit would be limited only by the frequency ranges of the mixer and PLL synthesizer.

Circuit Note CN-0178 describes how the output of the ADL5902 can be interfaced to the 12-bit precision AD7466 ADC.

Complete schematics, layout files, and bill of materials for CN-0340 can be found in the CN-0340 Design Support Package (www.analog.com/CN0340-DesignSupport)

Circuit Evaluation & Test

The circuit can be easily built up using standard evaluation boards with some slight modifications and adjustments of jumper settings. Fully populated evaluation boards for the AD8368 and the ADL5902 are available from Analog Devices (ADL5902-EVALZ, AD8368-EVALZ). A fully populated evaluation board for the B5070 SAW filter can be obtained from EPCOS. This board includes the four required matching components (LS1, LP2, LS3, LP4 shown in Figure 1). A functional diagram of the test setup is shown in Figure 6.

Figure 6. Measurement Setup


Equipment Needed

The following equipment (or equivalent) is required to make the measurements described in this circuit note:

  • AD8368 evaluation board (AD8368-EVALZ)
  • ADL5902 evaluation board (ADL5902-EVALZ) (modified as described below)
  • SAW filter on evaluation board (EPCOS B5070, 167 MHz or equivalent)
  • RF Signal Generator: Agilent 8648C, Rohde & Schwarz SMT03 or SMIQ
  • 5 V, 400 mA Power Supply: Agilent E3631A
  • Multimeter: Agilent 34401A

Setup and Test

Since all three evaluation boards have 50 Ω interfaces, they can be connected directly using barrel SMA connectors. The connection from the output of the ADL5902 detector back to the gain control input of the AD8368 VGA can be conveniently implemented with an SMA cable or with clip leads since it is a low speed signal. The resistor divider that is required to scale down the ADL5902 detector’s output voltage can be implemented by placing surface mount resistors on the R1 (3.83 kΩ) and R15 (1.5 kΩ) pads on the ADL5902 evaluation board. The TADJ voltage that optimizes the temperature stability of the circuit at 167 MHz can be set by the R9/R12 resistor divider, which is derived from the 2.3 V on-chip voltage reference. To set the TADJ voltage to the recommended 0.2 V level, change R9 to 3.09 kΩ (R12 keeps its existing value of 301 Ω).

The primary measurement equipment that was used to evaluate the circuit was an RF signal generator operating at 167 MHz (for example, Agilent 8648C, Rohde & Schwarz SMT03, SMIQ or equivalent), a 5 V power supply (Agilent E3631A or equivalent), and a digital voltmeter (for example, Agilent 34401A or equivalent).

For precision RF detector power sweeps, it is normally recommended that the source power to the detector be measured using an RF power meter (for example, signal from the signal generator is split with half going to the detector and half going to the RF power meter). However, in this case, covering the 95 dB detection range with an RF power meter was quite difficult. Therefore, the signal generator output power display was used as the source power reading. It is therefore advisable to choose an RF signal generator whose output power level display is known to be accurate, particularly at low and high power levels.

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