Design & Integration Files
- Bill of Materials
- Gerber Files
- PADS Files
- Assembly Drawing
Part Numbers with "Z" indicate RoHS Compliance. Boards checked are needed to evaluate this circuit.
- EVAL-CN0253-SDPZ () A Robust, Low Power, Battery Monitoring Circuit Front End
- EVAL-SDP-CB1Z () Eval Control Board
Features & Benefits
- Robust battery monitor
- Latch-up proof
- Overvoltage protected
- Low power
Markets and Technologies
Circuit Note (1)
Circuit Function & Benefits
The circuit shown in Figure 1 is a robust battery monitoring front end designed for environments where transients are likely to occur, such as in industrial or process automation environments. The circuit uses the ADG5408 8-channel CMOS multiplexer followed by the AD8226 instrumentation amplifier to provide accurate voltage monitoring of individual cells at low power and low cost, and requires no additional external transient protection circuitry.
Transient overvoltage conditions may cause traditional CMOS switches to experience latch up. In junction isolation technology, the N- and P-wells of the PMOS and NMOS transistors form a parasitic silicon-controlled rectifier (SCR) circuit. An overvoltage condition triggers this SCR, causing a significant amplification of current that, in turn, leads to latch-up. Latch-up is an undesirable, high current state that can lead to device failure and can persist until the power supply is turned off.
Latch-up can occur if either the input or the output pin voltage exceeds the supply rail by more than a diode drop, or by improper power supply sequencing. If a fault occurs on the channel, and the signal exceeds the maximum rating, the fault can trigger the latch-up state in an typical CMOS part.
During circuit power up, it is also possible for voltages to occur on inputs before power is applied to the CMOS switch, especially if multiple supplies are used to power the circuit. This condition may exceed the maximum rating of the device and trigger a latch-up state.
The two multiplexers and the instrumentation amplifier (IA) used in this design have robust inputs. The ADG5408 is a high voltage 8:1 multiplexer that is latch-up proof. The trench isolation technology used in the fabrication of the ADG5408 prevents the latch-up state and reduces the need for external protection circuitry. Latch-up proof does not guarantee overvoltage protection and only means the switch does not enter the high current SCR mode. The ADG5408 also has an electrostatic discharge (ESD) rating of 8 kV human body model (ANSI/ESDA/JEDEC JS-001-2010).
The AD8226 is a low cost, low power, instrumentation amplifier with robust inputs and can handle input voltages up to 40 V from the opposite supply rail, while restricting the output to within the rails. For instance, with ±18 V supplies, the positive or negative input of the AD8226 can swing between ±22 V with no damage. All inputs of the AD8226 are protected against ESD with internal diodes.
Battery monitoring systems (BMS) require the individual voltage across each battery in a battery stack to assess the state of charge (SOC) and state of health (SOH) of the battery. By multiplexing the terminals of a stack of batteries with two multiplexers, as shown in Figure 1, the voltage across each battery can be assessed.
One multiplexer is used for the positive terminal and another for the negative terminal. This differential multiplexing allows the use of a single instrumentation amplifier for up to eight channels. The amplifier then removes the common-mode voltage from each of the batteries for use by the BMS.
The ADG5408 has a low on-resistance per channel, typically 13.5 Ω, and a maximum of 22 Ω over temperature. With a maximum of 2 nA input offset current, there is a maximum of 44 nV error voltage across the channel resistances.
Figure 2 shows the comparison of results between a typical CMOS switch, with epitaxial layer, and the ADG5408 when subjected to a latch-up test. During the test, a stress current is applied to the pin for 1 ms, called the trigger, and the current at the pin is measured after the trigger. This particular test is conducted with the switch set to open, the drain (D) set to VDD, and the source (S) set to VSS, as depicted in Figure 3. The voltage of the source is then driven beyond VSS until the required trigger current is achieved. If latch-up has not occurred, then the current at the pin returns to its pretrigger value. After latch-up has occurred, the pin continues to draw current without being driven by the trigger voltage. This can only be stopped by powering down the part.
From Figure 2, it can be seen that this typical CMOS switch reaches a latch-up current at −290 mA, while the ADG5408 did not latch up until the test ended at −510 mA.
For applications where four or less batteries are used in a stack, the four differential channels of a single ADG5409 can be used. The ADG5409 switches four differential inputs to a single differential output and has the same latch-up proof construction as the ADG5408.
Circuit Evaluation & Test
This circuit uses the EVAL-CN0253SDPZ board and can be used as a standalone board, or in conjunction with the EVAL-SDP-CS1Z system demonstration platform (SDP) evaluation board. In the standalone mode, the A0, A1, A2, and EN logic levels can be controlled by links on the board or from external sources connected to the board via SMB connectors.
If computer control is desired, the EVAL-SDP-CS1Z is connected to the EVAL-CN0253-SDPZ board using 120-pin mating connectors.
- EVAL-CN0253-SDPZ board
- ±18 V power supply
- L-ion batteries
- Digital voltmeter to measure output
If controlling the EVAL-CN0253-SDPZ board using a PC is required, additional requirements include the following:
- PC with a USB port and Windows® XP or Windows Vista® (32/64-bit) or Windows 7 (32/64-bit)
- EVAL-SDP-CS1Z SDP
- CN-0253 evaluation software
In standalone usage only, the EVAL-CN0253-SDPZ, power supplies, and test batteries are required.
To program the board with the PC, install the evaluation software. To do this, load the evaluation software by placing the CN-0253 evaluation software CD in the CD drive of the PC. Using My Computer, locate the drive that contains the evaluation software CD and open the Readme file and follow the instructions for installing and using the evaluation software.
Functional Block Diagram of Test Setup
Figure 4 shows the test setup functional block diagram. The EVAL-CN0253-SDPZ-SCH-Rev0.pdffile contains the complete circuit schematics for the board. This file is contained in the CN-0253 Design Support Package: (http://www.analog.com/CN0253-DesignSupport).
With the power output of the supply off, connect a +18 V power supply to the J3-1 pin (VDD_EXT), a −18 V power supply to the J3-3 pin (VSS_EXT), and the ground connection to the J3-2 pin (GND_EXT). Attach the test battery cells to the battery connections. Ensure that the link headers are retained on the battery connections that do not have batteries connected; that is, if only using four batteries, the remaining four battery connections should remain connected.
If computer control of the board is required, it is important to remove the link headers: EN, A0, A1, and A2. If using the EVAL-SDP-CS1Z, connect the EVAL-SDP-CS1Z to the EVAL-CN0253-SDPZ using the 120-pin connector. Secure the connection using the Nylon hardware.
Apply power to the ±18 V supply. Use the EN link on the board to enable the outputs from the ADG5408 multiplexers. Use the A0, A1, and A2 links on the board to select the battery for testing. The SMB connector, VOUT, can be used to connect to a separate ADC evaluation board, such as the EVAL-AD7298SDZ or manually tested using a digital voltmeter.
If computer control is required, connect the EVAL-SDP-CS1Z to the PC using the USB cable. Launch the CN-0253 evaluation software. The battery voltage can be tested as per the manual test. An additional 5 V power supply pin is provided if using the EVAL-SDP-CS1Z.
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Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.