Interfacing FPGAs to an ADC Converter’s Digital Data Output

Tutorial: MT-201 (pdf)

JESD204 Interface Standard

  • JESD204 is a JEDEC standard for high speed serial links between a single host, such as an FPGA or ASIC, and one or more data converters.
  • Fewer interconnects simplifies layout and allows smaller form factor realization without impacting overall system performance.
  • Analog Devices, an original participating member of the JEDEC JESD204 standards committee, have concurrently developed compliant data converter technology and tools enabling our customers with the advantages of this significant interfacing breakthrough.

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