新闻
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2009年05月21日
模数转换器简化用于变电站控制的电力线监控系统设计
ADI的新型多通道、同步采样ADC可实现每通道高达200 kSPS 的采样率，采用5V电源供电。 -
2009年05月04日
ADI新推18款低功耗ADC，重拳出击通信、工业、便携产品及仪器仪表市场
ADI公司新型的引脚兼容、低功耗、双通道ADC提高了通道密度，并降低了功耗，可提供多个速度等级。 -
2009年04月14日
八通道超声接收器现可实现高质量连续波多普勒处理
ADI 公司的新型八通道超声接收器可减小中端和高端手推式超声系统的系统尺寸、复杂性和功耗。
新产品
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AD7194- 8-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA
The AD7194 is a low noise, complete analog front end for high precision measurement applications. It contains a low noise, 24-bit sigma-delta (Σ-Δ) analog-to-digital converter (ADC). The on-chip low noise gain stage means that signals of small amplitude can interface directly to the ADC. The device can be configured to have eight differential inputs or sixteen pseudo differential inputs. The More
中文产品数据手册 Rev 0, 11/2009 (pdf 996kB)
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AD7985- 16-Bit, 2.5 MSPS PulSAR 11 mW ADC in QFN
The AD7985 is a 16-bit, 2.5 MSPS successive approximation analog-to-digital converter (SAR ADC). It contains a low power, high speed, 16-bit sampling ADC, an internal conversion clock, an internal reference (and buffer), error correction circuits, and a versatile serial interface port. On the rising edge of CNV, the AD7985 samples an analog input, IN+, between 0 V and REF with respect to a ground More
中文产品数据手册 Rev 0, 09/2009 (pdf 656kB)
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AD9277- Octal LNA/VGA/AAF/14-Bit ADC and CW I/Q Demodulator
The AD9277 is designed for low cost, low power, small size, and ease of use. It contains eight channels of a variable gain amplifier (VGA) with a low noise preamplifier (LNA); an anti-aliasing filter (AAF); a 14-bit, 10 MSPS to 50 MSPS analog-to-digital converter (ADC); and an I/Q demodulator with programmable phase rotation.
Each channel features a variable gain range of 42 dB, a fully More
中文产品数据手册 Rev 0, 08/2009 (pdf 979kB)
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AD9251- 14-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 1.8 V Dual Analog-to-Digital Converter
The AD9251 is a monolithic, dual-channel, 1.8 V supply, 14-bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS analog-to-digital converter (ADC). It features a high performance sample-and-hold circuit and on-chip voltage reference.
The product uses multistage differential pipeline architecture with output error correction logic to provide 14-bit accuracy at 80 MSPS data rates and to guarantee no missing More
中文产品数据手册 Rev A, 11/2009 (pdf 789kB)
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