The ADCMP572/ADCMP573 are ultrafast comparators fabricated on Analog Devices, Inc.’s proprietary XFCB3 Silicon Germanium (SiGe) bipolar process. The ADCMP572 features CML output drivers, and the ADCMP573 features reduced swing PECL (RSPECL) output drivers.

Both devices offer 150 ps propagation delay and 100 ps minimum pulse width for 10 Gbps operation with 200 fs RMS random jitter (RJ). Overdrive and slew rate dispersion is typically less than 15 ps.

A flexible power supply scheme allows either device to operate with a single +3.3 V positive supply and a -0.2 V to +1.2 V input signal range, or with split input/output supplies to support a wider -0.2 V to +3.2 V input signal range and an independent range of output levels. 50 Ω on-chip termination resistors are provided at both inputs with the optional capability to leave open (on an individual pin basis) for applications requiring high impedance inputs.

The CML output stage is designed to directly drive 400 mV into 50 Ω transmission lines terminated to between 3.3 V to 5.2 V. The RSPECL output stage is designed to drive 400 mV into 50 Ω terminated to V_CCO - 2 V and is compatible with several commonly used PECL logic families. The comparator input stage offers robust protection against large input overdrive, and the outputs do not phase reverse when the valid input signal range is exceeded. High speed latch and programmable hysteresis features are also provided.

The ADCMP572/ADCMP573 are available in a 16-lead LFCSP package.

Part#	Prop Delay (ns)typ	# Per Pkg	Total Power (mW)	Voltage Supply (V)	No of Supplies	Input Range (V)	Logic Output	Adjustable Hysteresis	Min Pulse Width
AD790	45	1	250	+/-15	3	-Vs to Vs -2V	TTL/CMOS	Fixed	-
AD8561	7	1	65	+/- 5	2	-5.0V to +3.0V	Diff/TTL	-	-
AD8564	8	4	150	+/- 5	2	-5.0V to +3.0V	TTL/CMOS	-	-
AD8611	5.5	1	50	3 to 5	1	0 to 3V	Diff/TTL	-	-
AD8612	5.5	2	100	3 to 5	1	0 to 3V	Diff/TTL	-	-
AD96685	6	1	120	5, -5.2	2	-2.5V to +5.0V	Diff/ECL	-	-
AD96687	6	2	240	5, -5.2	2	-2.5V to +5.0V	Diff/ECL	-	-
ADCMP551	0.75	2	60	3.3 to 5	1	-0.2 to Vcc-2V	PECL	-	700ps
ADCMP552	0.75	2	60	3.3 to 5	1	-0.2 to Vcc-2V	PECL	X	700ps
ADCMP553	0.75	1	30	3.3 to 5	1	-0.2 to Vcc-2V	PECL	-	700ps
ADCMP561	0.75	2	160	5, -5.2	2	-2 to 3V	PECL	-	700ps
ADCMP562	0.75	2	160	5, -5.2	2	-2 to 3V	PECL	X	700ps
ADCMP563	0.75	2	120	5, -5.2	2	-2 to 3V	ECL	-	700ps
ADCMP564	0.75	2	120	5, -5.2	2	-2 to 3V	ECL	X	700ps
ADCMP572	0.15	1	145	3.3 to 5	1	-0.2 to Vcci-2.1V	CML	X	80ps
ADCMP573	0.15	1	145	3.3 to 5	1	-0.2 to Vcci-2.1V	PECL	X	80ps
ADCMP580	0.15	1	240	5, -5.2	2	-2 to 3V	CML	X	80ps
ADCMP581	0.15	1	240	5, -5.2	2	-2 to 3V	ECL	X	80ps
ADCMP582	0.15	1	240	5, -5.2	2	-2 to 3V	PECL	X	80ps
ADCMP600	3	1	6	2.5 to 5.5	1	-0.2 to Vcc+0.2V	TTL/CMOS	-	3ns
ADCMP601	3	1	6	2.5 to 5.5	1	-0.2 to Vcc+0.2V	TTL/CMOS	X	3ns
ADCMP602	3	1	6	2.5 to 5.5	2	-0.2 to Vcc+0.2V	TTL/CMOS	X	3ns
ADCMP603	3	1	6	2.5 to 5.5	3	-0.5 to Vcc+0.5V	TTL/CMOS	X	3ns
ADCMP604	1.5	1	42	2.5 to 5.5	1	-0.2 to Vcc+0.2V	LVDS	-	1ns
ADCMP605	1.5	1	42	2.5 to 5.5	2	-0.2 to Vcc+0.2V	LVDS	X	1ns
ADCMP606	1	1	62	2.5 to 5.5	1	-0.2 to Vcc+0.2V	CML	-	600ps
ADCMP607	1	1	62	2.5 to 5.5	2	-0.2 to Vcc+0.2V	CML	X	600ps
ADCMP608	30	1	1	2.5 to 5.5	1	-0.2 to Vcc+0.2V	TTL/CMOS	-	35ns
ADCMP609	30	1	1	2.5 to 5.5	1	-0.2 to Vcc+0.2V	TTL/CMOS	X	35ns
CMP401	23	4	110	+/- 5	2	-5.0V to +4.0V	TTL/CMOS	-	-

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