Automotive Signal Processing

Audi Engineers Turn to Blackfin and Sharc Processors for the Audi A5 In-Vehicle Audio Subsystem, continued

High Performance Audio: SHARC Processor

ADI's ADSP-21362 SHARC processor was selected for its high performance, rich audio feature set, and its well earned reputation in the audio market to serve as the foundation of a Bang & Olufsen amplifier. The third generation SHARC processor executes filter algorithms that optimize the audio, adapting it to the acoustics of the car cabin. The Bang & Olufsen amplifier is an option for the Audi A5 coupe.

Development Tools, Hardware Evaluation Kits, and Software Support Modules Aid System Development

Today's automotive designers can reduce their time to market and aid systems development by choosing a robust ecosystem that brings them nearer to the capabilities of their end products. Analog Devices provides industry-leading tools and training, starter kits, and support, including the familiar ADI CROSSCORE® software and hardware tools that support the Blackfin and SHARC processor families.


Technical Workshops and Online Training

System development and programming workshops provide comprehensive hands-on training on Blackfin and SHARC processors. Courses cover DSP architecture, assembly language syntax, I/O interface, hardware, and software development tools. From lecture sessions and hands-on exercises, attendees learn how easy it is to use Analog Devices' embedded processors and DSPs.

Online training courses cover a wide range of topics that address different stages of the development cycle—from the fundamentals of Analog Devices' development tools to tips on how developers can optimize their system performance. These modules are designed to be used independently or in combination, depending on the experience and interest of the viewer.

Blackfin Processor Features

  • Media transceiver (MXVR) for connection to a MOST® automotive multimedia network
  • Powerful and flexible cache architecture suitable for soft real-time control tasks and industry-standard operating systems, plus difficult real-time signal processing tasks
  • Applications-tuned peripherals provide glueless connectivity to general-purpose converters in data acquisition applications
  • Enhanced dynamic power management with on-chip voltage regulation
  • High performance embedded processor core: 16-bit or 32-bit
  • 10-stage RISC MCU/DSP pipeline with mixed 16-bit or 32-bit ISA for optimal code density
  • Full SIMD architecture, including instructions for accelerated video and image processing
  • Memory management unit (MMU) supporting full memory protection for an isolated and secure environment

SHARC Processor Features

  • 333 MHz/1.8 GFLOPs SIMD SHARC core supporting IEEE 32-bit floating-point, 40-bit floating-point, and 32-bit fixed-point data types
  • 25 zero-overhead DMA channels
  • Digital audio interface (DAI) enabling user-definable access to peripherals including an S/PDIF Tx/Rx, 8-channel asynchronoussample rate converter, and data transmission content protection hardware accelerator
  • 6 serial ports supporting I2S, left-justified sample pair, and TDM modes
  • 2 SPI-compatible ports supporting master and slave modes
  • 16 pulse-width modulation (PWM) channels
  • 3 full featured timers
  • Package options: 136-ball CSP_BGA and 144-lead LQFP_EP
  • Commercial and industrial temperature ranges

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