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C o n t e n t s
16-Bit ADCs Deliver Ease of Use >>
Benefits of Continuous Time Σ-Δ ADCs >>
24-Bit Σ-Δ ADC for Faster Precision Measurement >>
High Speed ADCs Use 50% Less PCB Surface >>
Receivers Optimize Image Quality and Power >>
Pin-Programmable, Low Power Σ-Δ ADC Is Easy to Implement >>
ADC Simulation, Software, and Behavioral Tools >>
New Family of PulSAR ADCs Delivers High Resolution >>
Dual Channel, SAR ADCs with Highest Performance at Lowest Power >>
Top Considerations for Avoiding Differential ADC Driver Accidents >>
ADC Drivers Designed to Get Peak Performance Out of Your ADC >>
VGAs for Driving High Speed ADCs >>
Fully Differential IF Amplifiers >>
Current Feedback Differential ADC Drivers for High Gain >>
16-Bit ADC Driver Simplifies Signal Conditioning >>
ADC Driver Supports Converter Performance >>
All prices in this bulletin are in USD in quantities greater than 1000 (unless otherwise noted), recommended lowest grade resale, FOB U.S.A.


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16-Bit ADCs Achieve High Dynamic Range and Wide Bandwidth, Deliver a New Level of Ease of Use
Applications such as wireless communications, medical imaging, and instrumentation demand ever increasing sampling speeds in combination with higher resolution, superior noise performance, and lower power consumption. Typically, designers must compromise among these requirements. With the advent of continuous time Σ-Δ (CTSD) ADCs, designers can achieve breakthrough performance in their designs without compromising on bandwidth, noise performance, or power consumption, while improving upon ease of use.
Utilizing this innovative Σ-Δ converter architecture, ADI's AD926x family of 16-bit CTSD ADCs offers 84.5 dBFS SNR over a dc to 10 MHz bandwidth with a programmable output data rate of 30 MSPS to 160 MSPS. In addition, the unique attributes of the CTSD architecture significantly simplify system level design and help reduce the time to market of the end product.
The AD926x CTSD converters employ an easy to drive 1 kΩ resistive input structure, which reduces or eliminates the requirements for a driver amplifier. In addition, a highly oversampled continuous time loop filter architecture attenuates alias components and eliminates the need for external antialiasing filters. Finally, a high dynamic range of 86 dB makes it possible to reduce or eliminate automatic gain control circuitry commonly employed in many communication systems. The result is an ADC that provides system level benefits by reducing component count, cost, power consumption, and design complexity. The AD926x family is available in several different versions including channel count, bandwidth, and level of integration.

Part Number |
Resolution (Bits) |
Bandwidth (MHz) |
Number of Channels |
SNR (dBFS) |
Power (mW) |
Output Interface |
Price ($U.S.) |
| AD9262 |
16 |
2.5 |
2 |
90.5 |
580 |
16-bit CMOS |
30.00 |
| AD9262-5 |
16 |
5 |
2 |
87.5 |
630 |
16-bit CMOS |
37.00 |
| AD9262-10 |
16 |
10 |
2 |
84.5 |
675 |
16-bit CMOS |
48.00 |
| AD9267* |
4-bit modulator |
10 |
2 |
85 |
400 |
4-bit LVDS |
40.00 |
| AD9261-10 |
16 |
10 |
1 |
84.5 |
350 |
16-bit CMOS |
28.00 |
*AD9267 is a CTSD modulator providing 4-bit, 640 MSPS LVDS output.


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