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C o n t e n t s
16-Bit ADCs Deliver Ease of Use >>
Benefits of Continuous Time Σ-Δ ADCs >>
24-Bit Σ-Δ ADC for Faster Precision Measurement >>
High Speed ADCs Use 50% Less PCB Surface >>
Receivers Optimize Image Quality and Power >>
Pin-Programmable, Low Power Σ-Δ ADC Is Easy to Implement >>
ADC Simulation, Software, and Behavioral Tools >>
New Family of PulSAR ADCs Delivers High Resolution >>
Dual Channel, SAR ADCs with Highest Performance at Lowest Power >>
Top Considerations for Avoiding Differential ADC Driver Accidents >>
ADC Drivers Designed to Get Peak Performance Out of Your ADC >>
VGAs for Driving High Speed ADCs >>
Fully Differential IF Amplifiers >>
Current Feedback Differential ADC Drivers for High Gain >>
16-Bit ADC Driver Simplifies Signal Conditioning >>
ADC Driver Supports Converter Performance >>
All prices in this bulletin are in USD in quantities greater than 1000 (unless otherwise noted), recommended lowest grade resale, FOB U.S.A.


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4-Channel, 12-Bit High Speed ADCs Use 50% Less PCB Surface Area Than Other ADCs in Their Class
The AD9239 and AD9639 quad ADCs with unique serial data output schemes require a total of only eight pins and traces compared to up to 26 as typically required in competing dual-channel devices. This feature set yields space savings in high speed signal processing applications including cable infrastructure, point-to-point wireless communications equipment, and spectrum analyzers.
The 250 MSPS AD9239 incorporates an efficient packetized output scheme, while the AD9639, operating at up to 210 MSPS, supports a JESD204-compliant output scheme. Both ADCs feature on-chip PLL (phase-locked loop) and input buffer circuits that are designed for low cost, low power, small size, and ease of use. The new ADCs require a single 1.8 V power supply, dissipating 1.5 W in normal mode and 145 mW per channel (typical) when standby mode is enabled with the digital link remaining in operation. The new devices are also the first high speed ADCs to feature an on-chip temperature sensor to allow engineers to conduct thermal monitoring for optimized system operation. The quad ADCs offer excellent noise performance and achieve SNR of 65 dBFS, SFDR of 77 dBc, and ENOB (effective number of bits) of 10.5—all at an 85 MHz input frequency.

Both devices support an LVDS (low voltage differential signal-compatible sample-rate) clock input and provide four serial digital output streams with coded data from each ADC channel. Clock information is also coded into each serial stream so that the receiving logic can extract the necessary clocking information. The AD9239 and AD9639 are available with ADI's VisualAnalog® evaluation and ADIsimADC™ behavioral software modeling tools.
The AD9239 and AD9639 are also available in 210 MSPS/ 170 MSPS and 170 MSPS models, respectively—all at a reduced cost. As part of a complete receive-path signal chain solution, the AD9239 and AD9639 quad ADCs are compatible with ADI's variable gain amplifiers, including the AD8372 and AD8376. These quad ADCs are fabricated on an advanced CMOS process and are available in a Pb-free and RoHS-compliant, 72-lead LFCSP package. All are specified over the industrial temperature range of –40°C to +85°C.
AD9239 Features
- Packetized 4.0 Gbps serial output link reduces pin count, includes error correction code
- Crosstalk: –95 dB channel-to-channel
- SFDR: 77 dBc with AIN of 85 MHz @ 250 MSPS
- Flexible synchronization schemes and programmable mode pins
- On-chip temperature sensor
- Four ADCs in a small, space-saving package
Part Number |
Sampling Rate (MSPS) |
SNR (dBF) |
SFDR (dBc) |
Output Logic |
Price ($U.S.) |
| AD9239-250 |
250 |
64.1 |
80 |
Packet serial |
169.15 |
| AD9239-210 |
210 |
64.2 |
81 |
Packet serial |
121.55 |
| AD9239-170 |
170 |
64.5 |
83 |
Packet serial |
101.15 |
| AD9639-210 |
210 |
65 |
80 |
JESD204 |
121.55 |
| AD9639-170 |
170 |
65 |
82 |
JESD204 |
101.15 |

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