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This ZIP File is associated with Rev x of the Application Note


    Title (EE-xxx)  


that can be found at http://www.analog.com/ee-notes.


Date Created:	April 14th, 2008


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The archive provides 1 code example:

Directory $(VDSP)\PMP_Hibernation_Example illustrates one example that does not run on standard hardware.  The PMP reference design is not provided by ADI.  However, this example allows the customer to step through advanced features such as 1.8V I/O operation with an external voltage regulator and mobile SDRAM.  The Engineer can see how external latches were read/write, how SDRAM SDCKE was tristated, how regulators were turned on/off, etc.

There are 4 main threads:
1.Main Thread (priority 5)  Configures the peripherals and creates the Hibernate and BlinkLED threads.
2.BlinkLED Thread (priority 6)  Simply blinks LED4 15 times on the PMP reference board.
3.Hibernate Thread (priority 7)  Shuts down peripherals, saves the state of system into SDRAM and puts the processor into hibernate mode.  Before the thread goes into hibernate mode, the real time clock (RTC) is configured and SDRAM is placed into self-refresh mode.  Upon wakeup, the processor returns to this thread and the peripherals are re-configured.
4. Idle Thread (lowest priority thread)  default VDK thread.  The processor executes this thread when there in nothing to do. 

**Note that the engineer must flash these examples into the flash to allow for context restore operations at bootup.





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All code examples have been written and tested with

	VisualDSP++ 4.5 June 2007 update

	ADSP-BF533 revision 0.3 or later

	PMP Reference Design Rev 1.3


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