/* This file includes the initialization codes for FIR, IIR and FFT Accelerators */

#include "def21469.h"

.global _Init_FFT;

/* Declaring the external buffers needed for FFT Accelerator*/
.extern  FFT_IP_buff;
.extern  FFT_OP_buff;
.extern  FFT_VCF_buff;
.extern  FFT_HCF_buff;
.extern  FFT_IM_OP_buff;
.extern  FFT_SP_CF_buff;


/*Adding the TCBs for FFT Accelerator*/

.section/dm seg_dmda;



/*N=2048, V=32, H=64 */

/************** PHASE I: V Point FFT of the original input****************/

/*Coefficient TCB for loading V cofficients */


	.var FFT_VCF_TCB[6]={
				FFT_VIP_TCB+5-0x80000,
				FFT_VCF_buff,
				64,
				64,
				1,
				FFT_VCF_buff
			};



/*TCB for loading 2*N-1 Input data points  cofficients (modifier = 2*H) */
	.var FFT_VIP_TCB[6]={
				FFT_VLASTIP_TCB+5-0x80000,
				FFT_IP_buff,
				4095,
				4095,
				128,
				FFT_IP_buff
			};



/*TCB for loading 2*N-1 Input data points  cofficients (modifier = 2*H) */
	.var FFT_VLASTIP_TCB[6]={
				0x100000|(FFT_PWCF_TCB1+5-0x80000),
				FFT_IP_buff,
				4096,
				1,
				1,
				FFT_IP_buff+4095
			};


	.var FFT_IMOP_TCB[6]={
				FFT_IMOP_TCB1+5-0x80000,
				FFT_IM_OP_buff,
				4096,
				4096,
				1,
				FFT_IM_OP_buff
			};


	.var FFT_PWCF_TCB1[6]={
				FFT_IMIP_TCB1+5-0x80000,
				FFT_SP_CF_buff,
				8192,
				512,
				1,
				FFT_SP_CF_buff+0
			};


	.var FFT_IMIP_TCB1[6]={
				0x100000|(FFT_PWCF_TCB2+5-0x80000),
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+0
			};


	.var FFT_IMOP_TCB1[6]={
				FFT_IMOP_TCB2+5-0x80000,
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+0
			};


	.var FFT_PWCF_TCB2[6]={
				FFT_IMIP_TCB2+5-0x80000,
				FFT_SP_CF_buff,
				8192,
				512,
				1,
				FFT_SP_CF_buff+512
			};


	.var FFT_IMIP_TCB2[6]={
				0x100000|(FFT_PWCF_TCB3+5-0x80000),
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+256
			};


	.var FFT_IMOP_TCB2[6]={
				FFT_IMOP_TCB3+5-0x80000,
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+256
			};


	.var FFT_PWCF_TCB3[6]={
				FFT_IMIP_TCB3+5-0x80000,
				FFT_SP_CF_buff,
				8192,
				512,
				1,
				FFT_SP_CF_buff+1024
			};


	.var FFT_IMIP_TCB3[6]={
				0x100000|(FFT_PWCF_TCB4+5-0x80000),
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+512
			};


	.var FFT_IMOP_TCB3[6]={
				FFT_IMOP_TCB4+5-0x80000,
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+512
			};


	.var FFT_PWCF_TCB4[6]={
				FFT_IMIP_TCB4+5-0x80000,
				FFT_SP_CF_buff,
				8192,
				512,
				1,
				FFT_SP_CF_buff+1536
			};


	.var FFT_IMIP_TCB4[6]={
				0x100000|(FFT_PWCF_TCB5+5-0x80000),
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+768
			};


	.var FFT_IMOP_TCB4[6]={
				FFT_IMOP_TCB5+5-0x80000,
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+768
			};


	.var FFT_PWCF_TCB5[6]={
				FFT_IMIP_TCB5+5-0x80000,
				FFT_SP_CF_buff,
				8192,
				512,
				1,
				FFT_SP_CF_buff+2048
			};


	.var FFT_IMIP_TCB5[6]={
				0x100000|(FFT_PWCF_TCB6+5-0x80000),
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+1024
			};


	.var FFT_IMOP_TCB5[6]={
				FFT_IMOP_TCB6+5-0x80000,
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+1024
			};


	.var FFT_PWCF_TCB6[6]={
				FFT_IMIP_TCB6+5-0x80000,
				FFT_SP_CF_buff,
				8192,
				512,
				1,
				FFT_SP_CF_buff+2560
			};


	.var FFT_IMIP_TCB6[6]={
				0x100000|(FFT_PWCF_TCB7+5-0x80000),
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+1280
			};


	.var FFT_IMOP_TCB6[6]={
				FFT_IMOP_TCB7+5-0x80000,
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+1280
			};


	.var FFT_PWCF_TCB7[6]={
				FFT_IMIP_TCB7+5-0x80000,
				FFT_SP_CF_buff,
				8192,
				512,
				1,
				FFT_SP_CF_buff+3072
			};


	.var FFT_IMIP_TCB7[6]={
				0x100000|(FFT_PWCF_TCB8+5-0x80000),
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+1536
			};


	.var FFT_IMOP_TCB7[6]={
				FFT_IMOP_TCB8+5-0x80000,
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+1536
			};


	.var FFT_PWCF_TCB8[6]={
				FFT_IMIP_TCB8+5-0x80000,
				FFT_SP_CF_buff,
				8192,
				512,
				1,
				FFT_SP_CF_buff+3584
			};


	.var FFT_IMIP_TCB8[6]={
				0x100000|(FFT_PWCF_TCB9+5-0x80000),
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+1792
			};


	.var FFT_IMOP_TCB8[6]={
				FFT_IMOP_TCB9+5-0x80000,
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+1792
			};


	.var FFT_PWCF_TCB9[6]={
				FFT_IMIP_TCB9+5-0x80000,
				FFT_SP_CF_buff,
				8192,
				512,
				1,
				FFT_SP_CF_buff+4096
			};


	.var FFT_IMIP_TCB9[6]={
				0x100000|(FFT_PWCF_TCB10+5-0x80000),
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+2048
			};


	.var FFT_IMOP_TCB9[6]={
				FFT_IMOP_TCB10+5-0x80000,
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+2048
			};


	.var FFT_PWCF_TCB10[6]={
				FFT_IMIP_TCB10+5-0x80000,
				FFT_SP_CF_buff,
				8192,
				512,
				1,
				FFT_SP_CF_buff+4608
			};


	.var FFT_IMIP_TCB10[6]={
				0x100000|(FFT_PWCF_TCB11+5-0x80000),
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+2304
			};


	.var FFT_IMOP_TCB10[6]={
				FFT_IMOP_TCB11+5-0x80000,
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+2304
			};


	.var FFT_PWCF_TCB11[6]={
				FFT_IMIP_TCB11+5-0x80000,
				FFT_SP_CF_buff,
				8192,
				512,
				1,
				FFT_SP_CF_buff+5120
			};


	.var FFT_IMIP_TCB11[6]={
				0x100000|(FFT_PWCF_TCB12+5-0x80000),
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+2560
			};


	.var FFT_IMOP_TCB11[6]={
				FFT_IMOP_TCB12+5-0x80000,
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+2560
			};


	.var FFT_PWCF_TCB12[6]={
				FFT_IMIP_TCB12+5-0x80000,
				FFT_SP_CF_buff,
				8192,
				512,
				1,
				FFT_SP_CF_buff+5632
			};


	.var FFT_IMIP_TCB12[6]={
				0x100000|(FFT_PWCF_TCB13+5-0x80000),
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+2816
			};


	.var FFT_IMOP_TCB12[6]={
				FFT_IMOP_TCB13+5-0x80000,
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+2816
			};


	.var FFT_PWCF_TCB13[6]={
				FFT_IMIP_TCB13+5-0x80000,
				FFT_SP_CF_buff,
				8192,
				512,
				1,
				FFT_SP_CF_buff+6144
			};


	.var FFT_IMIP_TCB13[6]={
				0x100000|(FFT_PWCF_TCB14+5-0x80000),
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+3072
			};


	.var FFT_IMOP_TCB13[6]={
				FFT_IMOP_TCB14+5-0x80000,
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+3072
			};


	.var FFT_PWCF_TCB14[6]={
				FFT_IMIP_TCB14+5-0x80000,
				FFT_SP_CF_buff,
				8192,
				512,
				1,
				FFT_SP_CF_buff+6656
			};


	.var FFT_IMIP_TCB14[6]={
				0x100000|(FFT_PWCF_TCB15+5-0x80000),
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+3328
			};


	.var FFT_IMOP_TCB14[6]={
				FFT_IMOP_TCB15+5-0x80000,
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+3328
			};


	.var FFT_PWCF_TCB15[6]={
				FFT_IMIP_TCB15+5-0x80000,
				FFT_SP_CF_buff,
				8192,
				512,
				1,
				FFT_SP_CF_buff+7168
			};


	.var FFT_IMIP_TCB15[6]={
				0x100000|(FFT_PWCF_TCB16+5-0x80000),
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+3584
			};


	.var FFT_IMOP_TCB15[6]={
				FFT_IMOP_TCB16+5-0x80000,
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+3584
			};


	.var FFT_PWCF_TCB16[6]={
				FFT_IMIP_TCB16+5-0x80000,
				FFT_SP_CF_buff,
				8192,
				512,
				1,
				FFT_SP_CF_buff+7680
			};


	.var FFT_IMIP_TCB16[6]={
				0x100000|(FFT_HCF_TCB+5-0x80000),
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+3840
			};


	.var FFT_IMOP_TCB16[6]={
				FFT_OP_TCB+5-0x80000,
				FFT_IM_OP_buff,
				4096,
				256,
				1,
				FFT_IM_OP_buff+3840
			};




	.var FFT_HCF_TCB[6]={
				FFT_HIP_TCB+5-0x80000,
				FFT_HCF_buff,
				128,
				128,
				1,
				FFT_HCF_buff
			};


	.var FFT_HIP_TCB[6]={
				FFT_HLASTIP_TCB+5-0x80000,
				FFT_IM_OP_buff,
				4095,
				4095,
				64,
				FFT_IM_OP_buff
			};


	.var FFT_HLASTIP_TCB[6]={
				0,
				FFT_IM_OP_buff,
				4096,
				1,
				1,
				FFT_IM_OP_buff+4095
			};


	.var FFT_OP_TCB[6]={
				FFT_LASTOP_TCB+5-0x80000,
				FFT_OP_buff,
				4095,
				4095,
				64,
				FFT_OP_buff
			};


	.var FFT_LASTOP_TCB[6]={
				0,
				FFT_OP_buff,
				4096,
				1,
				1,
				FFT_OP_buff+4095
			};



/* Adding the FFT Initialization Code Now */

.section/pm seg_pmco;

_Init_FFT:

		//Mapping the FFT DMA interrupt
		ustat3=dm(PICR0);
		bit clr ustat3 P0I0|P0I1|P0I2|P0I3|P0I4;
		bit set ustat3 P0I0|P0I1|P0I3|P0I4;
		dm(PICR0)=ustat3;

		//Unamsking the FFT DMA interrupt
		bit set IMASK P0I;

		//Selecting the FFT Accelerator
		ustat1=dm(PMCTL1);
		bit clr ustat1 BIT_17|BIT_18;
		bit set ustat1 FFTACCSEL;
		dm(PMCTL1)=ustat1;

		//PMCTL1 effect latency
		nop;nop;nop;nop;

		//Clearing the FFTCTL registers
		ustat1=0;
		dm(FFTCTL2)=ustat1;

		ustat1=FFT_RST;
		dm(FFTCTL1)=ustat1;

		nop;nop;nop;nop;

		//Initializing the chain pointer registers
		ustat1=0x100000|(FFT_VCF_TCB+5-0x80000);
		dm(CPIFFT)=ustat1;

		ustat1=FFT_IMOP_TCB+5-0x80000;
		dm(CPOFFT)=ustat1;

		//Configuring the FFTCTL2 Register
		ustat1=VDIMDIV16_2|FFT_LOG2VDIM_5|HDIMDIV16_4|FFT_LOG2HDIM_6|NOVER256_8|FFT_CPACKIN|FFT_CPACKOUT;
		dm(FFTCTL2)=ustat1;

		//Configuring the FFTCTL1 Register
		ustat1=FFT_EN|FFT_START|FFT_DMAEN;
		dm(FFTCTL1)=ustat1;

		rts;


_Init_FFT.END: